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* usegcc: (usegcc).			Using the GNU C compiler.
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INFO-DIR-SECTION Programming
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* gcc: (gcc).                  The GNU Compiler Collection.
END-INFO-DIR-ENTRY
   This file documents the use of the GNU compilers.

   Published by the Free Software Foundation
59 Temple Place - Suite 330
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File: gcc.info,  Node: RS/6000 and PowerPC Options,  Next: Darwin Options,  Prev: M88K Options,  Up: Submodel Options

IBM RS/6000 and PowerPC Options
-------------------------------

   These `-m' options are defined for the IBM RS/6000 and PowerPC:
`-mpower'
`-mno-power'
`-mpower2'
`-mno-power2'
`-mpowerpc'
`-mno-powerpc'
`-mpowerpc-gpopt'
`-mno-powerpc-gpopt'
`-mpowerpc-gfxopt'
`-mno-powerpc-gfxopt'
`-mpowerpc64'
`-mno-powerpc64'
     GCC supports two related instruction set architectures for the
     RS/6000 and PowerPC.  The "POWER" instruction set are those
     instructions supported by the `rios' chip set used in the original
     RS/6000 systems and the "PowerPC" instruction set is the
     architecture of the Motorola MPC5xx, MPC6xx, MPC8xx
     microprocessors, and the IBM 4xx microprocessors.

     Neither architecture is a subset of the other.  However there is a
     large common subset of instructions supported by both.  An MQ
     register is included in processors supporting the POWER
     architecture.

     You use these options to specify which instructions are available
     on the processor you are using.  The default value of these
     options is determined when configuring GCC.  Specifying the
     `-mcpu=CPU_TYPE' overrides the specification of these options.  We
     recommend you use the `-mcpu=CPU_TYPE' option rather than the
     options listed above.

     The `-mpower' option allows GCC to generate instructions that are
     found only in the POWER architecture and to use the MQ register.
     Specifying `-mpower2' implies `-power' and also allows GCC to
     generate instructions that are present in the POWER2 architecture
     but not the original POWER architecture.

     The `-mpowerpc' option allows GCC to generate instructions that
     are found only in the 32-bit subset of the PowerPC architecture.
     Specifying `-mpowerpc-gpopt' implies `-mpowerpc' and also allows
     GCC to use the optional PowerPC architecture instructions in the
     General Purpose group, including floating-point square root.
     Specifying `-mpowerpc-gfxopt' implies `-mpowerpc' and also allows
     GCC to use the optional PowerPC architecture instructions in the
     Graphics group, including floating-point select.

     The `-mpowerpc64' option allows GCC to generate the additional
     64-bit instructions that are found in the full PowerPC64
     architecture and to treat GPRs as 64-bit, doubleword quantities.
     GCC defaults to `-mno-powerpc64'.

     If you specify both `-mno-power' and `-mno-powerpc', GCC will use
     only the instructions in the common subset of both architectures
     plus some special AIX common-mode calls, and will not use the MQ
     register.  Specifying both `-mpower' and `-mpowerpc' permits GCC
     to use any instruction from either architecture and to allow use
     of the MQ register; specify this for the Motorola MPC601.

`-mnew-mnemonics'
`-mold-mnemonics'
     Select which mnemonics to use in the generated assembler code.
     With `-mnew-mnemonics', GCC uses the assembler mnemonics defined
     for the PowerPC architecture.  With `-mold-mnemonics' it uses the
     assembler mnemonics defined for the POWER architecture.
     Instructions defined in only one architecture have only one
     mnemonic; GCC uses that mnemonic irrespective of which of these
     options is specified.

     GCC defaults to the mnemonics appropriate for the architecture in
     use.  Specifying `-mcpu=CPU_TYPE' sometimes overrides the value of
     these option.  Unless you are building a cross-compiler, you
     should normally not specify either `-mnew-mnemonics' or
     `-mold-mnemonics', but should instead accept the default.

`-mcpu=CPU_TYPE'
     Set architecture type, register usage, choice of mnemonics, and
     instruction scheduling parameters for machine type CPU_TYPE.
     Supported values for CPU_TYPE are `rios', `rios1', `rsc', `rios2',
     `rs64a', `601', `602', `603', `603e', `604', `604e', `620', `630',
     `740', `7400', `7450', `G4', `750', `G3',  `power', `power2',
     `powerpc', `403', `505', `801', `821', `823', `860', `970', `G5'
     and `common'.

     `-mcpu=common' selects a completely generic processor.  Code
     generated under this option will run on any POWER or PowerPC
     processor.  GCC will use only the instructions in the common
     subset of both architectures, and will not use the MQ register.
     GCC assumes a generic processor model for scheduling purposes.

     `-mcpu=power', `-mcpu=power2', `-mcpu=powerpc', and
     `-mcpu=powerpc64' specify generic POWER, POWER2, pure 32-bit
     PowerPC (i.e., not MPC601), and 64-bit PowerPC architecture machine
     types, with an appropriate, generic processor model assumed for
     scheduling purposes.

     The other options specify a specific processor.  Code generated
     under those options will run best on that processor, and may not
     run at all on others.

     The `-mcpu' options automatically enable or disable other `-m'
     options as follows:

    `common'
          `-mno-power', `-mno-powerpc'

    `power'
    `power2'
    `rios1'
    `rios2'
    `rsc'
          `-mpower', `-mno-powerpc', `-mno-new-mnemonics'

    `powerpc'
    `rs64a'
    `602'
    `603'
    `603e'
    `604'
    `620'
    `630'
    `740'
    `7400'
    `7450'
    `G4'
    `750'
    `G3'
    `505'
    `970'
    `G5'
          `-mno-power', `-mpowerpc', `-mnew-mnemonics'

    `601'
          `-mpower', `-mpowerpc', `-mnew-mnemonics'

    `403'
    `821'
    `860'
          `-mno-power', `-mpowerpc', `-mnew-mnemonics', `-msoft-float'

`-mtune=CPU_TYPE'
     Set the instruction scheduling parameters for machine type
     CPU_TYPE, but do not set the architecture type, register usage, or
     choice of mnemonics, as `-mcpu=CPU_TYPE' would.  The same values
     for CPU_TYPE are used for `-mtune' as for `-mcpu'.  If both are
     specified, the code generated will use the architecture,
     registers, and mnemonics set by `-mcpu', but the scheduling
     parameters set by `-mtune'.

`-maltivec'
`-mno-altivec'
     These switches enable or disable the use of built-in functions that
     allow access to the AltiVec instruction set.  You may also need to
     set `-mabi=altivec' to adjust the current ABI with AltiVec ABI
     enhancements.

`-mabi=spe'
     Extend the current ABI with SPE ABI extensions.  This does not
     change the default ABI, instead it adds the SPE ABI extensions to
     the current ABI.

`-mabi=no-spe'
     Disable Booke SPE ABI extensions for the current ABI.

`-misel=YES/NO'
`-misel'
     This switch enables or disables the generation of ISEL
     instructions.

`-mspe=YES/NO'
`-mspe'
     This switch enables or disables the generation of SPE simd
     instructions.

`-mfloat-gprs=YES/NO'
`-mfloat-gprs'
     This switch enables or disables the generation of floating point
     operations on the general purpose registers for architectures that
     support it.  This option is currently only available on the
     MPC8540.

`-mfull-toc'
`-mno-fp-in-toc'
`-mno-sum-in-toc'
`-mminimal-toc'
     Modify generation of the TOC (Table Of Contents), which is created
     for every executable file.  The `-mfull-toc' option is selected by
     default.  In that case, GCC will allocate at least one TOC entry
     for each unique non-automatic variable reference in your program.
     GCC will also place floating-point constants in the TOC.  However,
     only 16,384 entries are available in the TOC.

     If you receive a linker error message that saying you have
     overflowed the available TOC space, you can reduce the amount of
     TOC space used with the `-mno-fp-in-toc' and `-mno-sum-in-toc'
     options.  `-mno-fp-in-toc' prevents GCC from putting floating-point
     constants in the TOC and `-mno-sum-in-toc' forces GCC to generate
     code to calculate the sum of an address and a constant at run-time
     instead of putting that sum into the TOC.  You may specify one or
     both of these options.  Each causes GCC to produce very slightly
     slower and larger code at the expense of conserving TOC space.

     If you still run out of space in the TOC even when you specify
     both of these options, specify `-mminimal-toc' instead.  This
     option causes GCC to make only one TOC entry for every file.  When
     you specify this option, GCC will produce code that is slower and
     larger but which uses extremely little TOC space.  You may wish to
     use this option only on files that contain less frequently
     executed code.

`-maix64'
`-maix32'
     Enable 64-bit AIX ABI and calling convention: 64-bit pointers,
     64-bit `long' type, and the infrastructure needed to support them.
     Specifying `-maix64' implies `-mpowerpc64' and `-mpowerpc', while
     `-maix32' disables the 64-bit ABI and implies `-mno-powerpc64'.
     GCC defaults to `-maix32'.

`-mxl-call'
`-mno-xl-call'
     On AIX, pass floating-point arguments to prototyped functions
     beyond the register save area (RSA) on the stack in addition to
     argument FPRs.  The AIX calling convention was extended but not
     initially documented to handle an obscure K&R C case of calling a
     function that takes the address of its arguments with fewer
     arguments than declared.  AIX XL compilers access floating point
     arguments which do not fit in the RSA from the stack when a
     subroutine is compiled without optimization.  Because always
     storing floating-point arguments on the stack is inefficient and
     rarely needed, this option is not enabled by default and only is
     necessary when calling subroutines compiled by AIX XL compilers
     without optimization.

`-mpe'
     Support "IBM RS/6000 SP" "Parallel Environment" (PE).  Link an
     application written to use message passing with special startup
     code to enable the application to run.  The system must have PE
     installed in the standard location (`/usr/lpp/ppe.poe/'), or the
     `specs' file must be overridden with the `-specs=' option to
     specify the appropriate directory location.  The Parallel
     Environment does not support threads, so the `-mpe' option and the
     `-pthread' option are incompatible.

`-malign-natural'
`-malign-power'
     On AIX, Darwin, and 64-bit PowerPC Linux, the option
     `-malign-natural' overrides the ABI-defined alignment of larger
     types, such as floating-point doubles, on their natural size-based
     boundary.  The option `-malign-power' instructs GCC to follow the
     ABI-specified alignment rules.  GCC defaults to the standard
     alignment defined in the ABI.

`-msoft-float'
`-mhard-float'
     Generate code that does not use (uses) the floating-point register
     set.  Software floating point emulation is provided if you use the
     `-msoft-float' option, and pass the option to GCC when linking.

`-mmultiple'
`-mno-multiple'
     Generate code that uses (does not use) the load multiple word
     instructions and the store multiple word instructions.  These
     instructions are generated by default on POWER systems, and not
     generated on PowerPC systems.  Do not use `-mmultiple' on little
     endian PowerPC systems, since those instructions do not work when
     the processor is in little endian mode.  The exceptions are PPC740
     and PPC750 which permit the instructions usage in little endian
     mode.

`-mstring'
`-mno-string'
     Generate code that uses (does not use) the load string instructions
     and the store string word instructions to save multiple registers
     and do small block moves.  These instructions are generated by
     default on POWER systems, and not generated on PowerPC systems.
     Do not use `-mstring' on little endian PowerPC systems, since those
     instructions do not work when the processor is in little endian
     mode.  The exceptions are PPC740 and PPC750 which permit the
     instructions usage in little endian mode.

`-mupdate'
`-mno-update'
     Generate code that uses (does not use) the load or store
     instructions that update the base register to the address of the
     calculated memory location.  These instructions are generated by
     default.  If you use `-mno-update', there is a small window
     between the time that the stack pointer is updated and the address
     of the previous frame is stored, which means code that walks the
     stack frame across interrupts or signals may get corrupted data.

`-mfused-madd'
`-mno-fused-madd'
     Generate code that uses (does not use) the floating point multiply
     and accumulate instructions.  These instructions are generated by
     default if hardware floating is used.

`-mno-bit-align'
`-mbit-align'
     On System V.4 and embedded PowerPC systems do not (do) force
     structures and unions that contain bit-fields to be aligned to the
     base type of the bit-field.

     For example, by default a structure containing nothing but 8
     `unsigned' bit-fields of length 1 would be aligned to a 4 byte
     boundary and have a size of 4 bytes.  By using `-mno-bit-align',
     the structure would be aligned to a 1 byte boundary and be one
     byte in size.

`-mno-bit-word'
`-mbit-word'
     On System V.4 and embedded PowerPC systems do not (do) force
     structures and unions that contain bit fields to align the bit
     field within the structure to the base type of the bitfield.
     Unlike `-mbit-align' and `-mno-bit-align', the alignment of the
     structure itself is not changed, just the alignment of bitfields
     within the structure.

     For example, by default, the structure:

          struct A
          {
            int :0;
            int i2:20;
            int i3:17;
          };

     would normally put the field I3 starting at bit 20, and it would
     cross the word boundary.  If you use `-mno-bit-word', the field
     will begin on the next word boundary so that it does not cross a
     word boundary.

`-mbranch-cost=N'
     Set the value of the internal macro `BRANCH_COST' to be N.  Higher
     values mean branches are more costly, so the compiler will try
     harder to generate code that does not use branches.  The default
     is 3.

`-mno-strict-align'
`-mstrict-align'
     On System V.4 and embedded PowerPC systems do not (do) assume that
     unaligned memory references will be handled by the system.

`-mrelocatable'
`-mno-relocatable'
     On embedded PowerPC systems generate code that allows (does not
     allow) the program to be relocated to a different address at
     runtime.  If you use `-mrelocatable' on any module, all objects
     linked together must be compiled with `-mrelocatable' or
     `-mrelocatable-lib'.

`-mrelocatable-lib'
`-mno-relocatable-lib'
     On embedded PowerPC systems generate code that allows (does not
     allow) the program to be relocated to a different address at
     runtime.  Modules compiled with `-mrelocatable-lib' can be linked
     with either modules compiled without `-mrelocatable' and
     `-mrelocatable-lib' or with modules compiled with the
     `-mrelocatable' options.

`-mno-toc'
`-mtoc'
     On System V.4 and embedded PowerPC systems do not (do) assume that
     register 2 contains a pointer to a global area pointing to the
     addresses used in the program.

`-mlittle'
`-mlittle-endian'
     On System V.4 and embedded PowerPC systems compile code for the
     processor in little endian mode.  The `-mlittle-endian' option is
     the same as `-mlittle'.

`-mbig'
`-mbig-endian'
     On System V.4 and embedded PowerPC systems compile code for the
     processor in big endian mode.  The `-mbig-endian' option is the
     same as `-mbig'.

`-mdynamic-no-pic'
     On Darwin and Mac OS X systems, compile code so that it is not
     relocatable, but that its external references are relocatable.  The
     resulting code is suitable for applications, but not shared
     libraries.

`-mprioritize-restricted-insns=PRIORITY'
     This option controls the priority that is assigned to
     dispatch-slot restricted instructions during the second scheduling
     pass.  The argument PRIORITY takes the value 0/1/2 to assign
     NO/HIGHEST/SECOND-HIGHEST priority to dispatch slot restricted
     instructions.

`-msched-costly-dep=DEPENDENCE_TYPE'
     This option controls which dependences are considered costly by
     the target during instruction scheduling.  The argument
     DEPENDENCE_TYPE takes one of the following values: NO: no
     dependence is costly, ALL: all dependences are costly,
     TRUE_STORE_TO_LOAD: a true dependence from store to load is costly,
     STORE_TO_LOAD: any dependence from store to load is costly,
     NUMBER: any dependence which latency >= NUMBER is costly.

`-minsert-sched-nops=SCHEME'
     This option controls which nop insertion scheme will be used during
     the second scheduling pass. The argument SCHEME takes one of the
     following values: NO: Don't insert nops.  PAD: Pad with nops any
     dispatch group which has vacant issue slots, according to the
     scheduler's grouping.  REGROUP_EXACT: Insert nops to force costly
     dependent insns into separate groups.  Insert exactly as many nops
     as needed to force an insn to a new group, according to the
     estimatied processor grouping.  NUMBER: Insert nops to force
     costly dependent insns into separate groups.  Insert NUMBER nops
     to force an insn to a new group.

`-mcall-sysv'
     On System V.4 and embedded PowerPC systems compile code using
     calling conventions that adheres to the March 1995 draft of the
     System V Application Binary Interface, PowerPC processor
     supplement.  This is the default unless you configured GCC using
     `powerpc-*-eabiaix'.

`-mcall-sysv-eabi'
     Specify both `-mcall-sysv' and `-meabi' options.

`-mcall-sysv-noeabi'
     Specify both `-mcall-sysv' and `-mno-eabi' options.

`-mcall-solaris'
     On System V.4 and embedded PowerPC systems compile code for the
     Solaris operating system.

`-mcall-linux'
     On System V.4 and embedded PowerPC systems compile code for the
     Linux-based GNU system.

`-mcall-i960-old'
     On System V.4 and embedded PowerPC systems compile code so that
     structure layout is compatible with the Intel i960 compiler using
     the `-mold-align', `-mno-strict-align', and `-mca' switches.  The
     `-mcall-i960-old' option sets the `-mlittle', `-meabi',
     `-mno-bit-word', and `-mno-strict-align' PowerPC options, and also
     forces the type `wchar_t' to be an `int' instead of `long int'.

`-mcall-gnu'
     On System V.4 and embedded PowerPC systems compile code for the
     Hurd-based GNU system.

`-mcall-netbsd'
     On System V.4 and embedded PowerPC systems compile code for the
     NetBSD operating system.

`-maix-struct-return'
     Return all structures in memory (as specified by the AIX ABI).

`-msvr4-struct-return'
     Return structures smaller than 8 bytes in registers (as specified
     by the SVR4 ABI).

`-mabi=altivec'
     Extend the current ABI with AltiVec ABI extensions.  This does not
     change the default ABI, instead it adds the AltiVec ABI extensions
     to the current ABI.

`-mabi=no-altivec'
     Disable AltiVec ABI extensions for the current ABI.

`-mprototype'
`-mno-prototype'
     On System V.4 and embedded PowerPC systems assume that all calls to
     variable argument functions are properly prototyped.  Otherwise,
     the compiler must insert an instruction before every non
     prototyped call to set or clear bit 6 of the condition code
     register (CR) to indicate whether floating point values were
     passed in the floating point registers in case the function takes
     a variable arguments.  With `-mprototype', only calls to
     prototyped variable argument functions will set or clear the bit.

`-msim'
     On embedded PowerPC systems, assume that the startup module is
     called `sim-crt0.o' and that the standard C libraries are
     `libsim.a' and `libc.a'.  This is the default for
     `powerpc-*-eabisim'.  configurations.

`-mmvme'
     On embedded PowerPC systems, assume that the startup module is
     called `crt0.o' and the standard C libraries are `libmvme.a' and
     `libc.a'.

`-mads'
     On embedded PowerPC systems, assume that the startup module is
     called `crt0.o' and the standard C libraries are `libads.a' and
     `libc.a'.

`-myellowknife'
     On embedded PowerPC systems, assume that the startup module is
     called `crt0.o' and the standard C libraries are `libyk.a' and
     `libc.a'.

`-mvxworks'
     On System V.4 and embedded PowerPC systems, specify that you are
     compiling for a VxWorks system.

`-mwindiss'
     Specify that you are compiling for the WindISS simulation
     environment.

`-memb'
     On embedded PowerPC systems, set the PPC_EMB bit in the ELF flags
     header to indicate that `eabi' extended relocations are used.

`-meabi'
`-mno-eabi'
     On System V.4 and embedded PowerPC systems do (do not) adhere to
     the Embedded Applications Binary Interface (eabi) which is a set of
     modifications to the System V.4 specifications.  Selecting `-meabi'
     means that the stack is aligned to an 8 byte boundary, a function
     `__eabi' is called to from `main' to set up the eabi environment,
     and the `-msdata' option can use both `r2' and `r13' to point to
     two separate small data areas.  Selecting `-mno-eabi' means that
     the stack is aligned to a 16 byte boundary, do not call an
     initialization function from `main', and the `-msdata' option will
     only use `r13' to point to a single small data area.  The `-meabi'
     option is on by default if you configured GCC using one of the
     `powerpc*-*-eabi*' options.

`-msdata=eabi'
     On System V.4 and embedded PowerPC systems, put small initialized
     `const' global and static data in the `.sdata2' section, which is
     pointed to by register `r2'.  Put small initialized non-`const'
     global and static data in the `.sdata' section, which is pointed
     to by register `r13'.  Put small uninitialized global and static
     data in the `.sbss' section, which is adjacent to the `.sdata'
     section.  The `-msdata=eabi' option is incompatible with the
     `-mrelocatable' option.  The `-msdata=eabi' option also sets the
     `-memb' option.

`-msdata=sysv'
     On System V.4 and embedded PowerPC systems, put small global and
     static data in the `.sdata' section, which is pointed to by
     register `r13'.  Put small uninitialized global and static data in
     the `.sbss' section, which is adjacent to the `.sdata' section.
     The `-msdata=sysv' option is incompatible with the `-mrelocatable'
     option.

`-msdata=default'
`-msdata'
     On System V.4 and embedded PowerPC systems, if `-meabi' is used,
     compile code the same as `-msdata=eabi', otherwise compile code the
     same as `-msdata=sysv'.

`-msdata-data'
     On System V.4 and embedded PowerPC systems, put small global and
     static data in the `.sdata' section.  Put small uninitialized
     global and static data in the `.sbss' section.  Do not use
     register `r13' to address small data however.  This is the default
     behavior unless other `-msdata' options are used.

`-msdata=none'
`-mno-sdata'
     On embedded PowerPC systems, put all initialized global and static
     data in the `.data' section, and all uninitialized data in the
     `.bss' section.

`-G NUM'
     On embedded PowerPC systems, put global and static items less than
     or equal to NUM bytes into the small data or bss sections instead
     of the normal data or bss section.  By default, NUM is 8.  The `-G
     NUM' switch is also passed to the linker.  All modules should be
     compiled with the same `-G NUM' value.

`-mregnames'
`-mno-regnames'
     On System V.4 and embedded PowerPC systems do (do not) emit
     register names in the assembly language output using symbolic
     forms.

`-mmpc860c0[=NUM]'
     This option is only applicable to MPC860 chips when producing ELF
     executables with the GNU linker.  It does not cause any changes to
     the .o files but causes the linker to perform a check for
     "problematic" conditional branches and implement a work around.

     The problem is that some chips may treat the target instruction as
     a no-op, given the following conditions:

          1/ The processor is an MPC860, version C0 or earlier.
          2/ A forward conditional branch is executed.
          3/ The branch is predicted as not taken.
          4/ The branch is taken.
          5/ The branch is located in the last 5 words of a page.
          6/ The branch target is located on a subsequent page.

     The optional argument is the number of words that are checked at
     the end of each text page.  It may be any value from 1 to 10 and
     defaults to 5.

`-mlongcall'
`-mno-longcall'
     Default to making all function calls via pointers, so that
     functions which reside further than 64 megabytes (67,108,864
     bytes) from the current location can be called.  This setting can
     be overridden by the `shortcall' function attribute, or by
     `#pragma longcall(0)'.

     Some linkers are capable of detecting out-of-range calls and
     generating glue code on the fly.  On these systems, long calls are
     unnecessary and generate slower code.  As of this writing, the AIX
     linker can do this, as can the GNU linker for PowerPC/64.  It is
     planned to add this feature to the GNU linker for 32-bit PowerPC
     systems as well.

     In the future, we may cause GCC to ignore all longcall
     specifications when the linker is known to generate glue.

`-pthread'
     Adds support for multithreading with the "pthreads" library.  This
     option sets flags for both the preprocessor and linker.


File: gcc.info,  Node: Darwin Options,  Next: RT Options,  Prev: RS/6000 and PowerPC Options,  Up: Submodel Options

Darwin Options
--------------

   These options are defined for all architectures running the Darwin
operating system.  They are useful for compatibility with other Mac OS
compilers.

`-all_load'
     Loads all members of static archive libraries.  See man ld(1) for
     more information.

`-arch_errors_fatal'
     Cause the errors having to do with files that have the wrong
     architecture to be fatal.

`-bind_at_load'
     Causes the output file to be marked such that the dynamic linker
     will bind all undefined references when the file is loaded or
     launched.

`-bundle'
     Produce a Mach-o bundle format file.  See man ld(1) for more
     information.

`-bundle_loader EXECUTABLE'
     This specifies the EXECUTABLE that will be loading the build
     output file being linked. See man ld(1) for more information.

`-allowable_client  CLIENT_NAME'

`-arch_only'

`-client_name'

`-compatibility_version'

`-current_version'

`-dependency-file'

`-dylib_file'

`-dylinker_install_name'

`-dynamic'

`-dynamiclib'

`-exported_symbols_list'

`-filelist'

`-flat_namespace'

`-force_cpusubtype_ALL'

`-force_flat_namespace'

`-headerpad_max_install_names'

`-image_base'

`-init'

`-install_name'

`-keep_private_externs'

`-multi_module'

`-multiply_defined'

`-multiply_defined_unused'

`-noall_load'

`-nofixprebinding'

`-nomultidefs'

`-noprebind'

`-noseglinkedit'

`-pagezero_size'

`-prebind'

`-prebind_all_twolevel_modules'

`-private_bundle'

`-read_only_relocs'

`-sectalign'

`-sectobjectsymbols'

`-whyload'

`-seg1addr'

`-sectcreate'

`-sectobjectsymbols'

`-sectorder'

`-seg_addr_table'

`-seg_addr_table_filename'

`-seglinkedit'

`-segprot'

`-segs_read_only_addr'

`-segs_read_write_addr'

`-single_module'

`-static'

`-sub_library'

`-sub_umbrella'

`-twolevel_namespace'

`-umbrella'

`-undefined'

`-unexported_symbols_list'

`-weak_reference_mismatches'

`-whatsloaded'
     This options are available for Darwin linker. Darwin linker man
     page describes them in detail.


File: gcc.info,  Node: RT Options,  Next: MIPS Options,  Prev: Darwin Options,  Up: Submodel Options

IBM RT Options
--------------

   These `-m' options are defined for the IBM RT PC:

`-min-line-mul'
     Use an in-line code sequence for integer multiplies.  This is the
     default.

`-mcall-lib-mul'
     Call `lmul$$' for integer multiples.

`-mfull-fp-blocks'
     Generate full-size floating point data blocks, including the
     minimum amount of scratch space recommended by IBM.  This is the
     default.

`-mminimum-fp-blocks'
     Do not include extra scratch space in floating point data blocks.
     This results in smaller code, but slower execution, since scratch
     space must be allocated dynamically.

`-mfp-arg-in-fpregs'
     Use a calling sequence incompatible with the IBM calling
     convention in which floating point arguments are passed in
     floating point registers.  Note that `stdarg.h' will not work with
     floating point operands if this option is specified.

`-mfp-arg-in-gregs'
     Use the normal calling convention for floating point arguments.
     This is the default.

`-mhc-struct-return'
     Return structures of more than one word in memory, rather than in a
     register.  This provides compatibility with the MetaWare HighC (hc)
     compiler.  Use the option `-fpcc-struct-return' for compatibility
     with the Portable C Compiler (pcc).

`-mnohc-struct-return'
     Return some structures of more than one word in registers, when
     convenient.  This is the default.  For compatibility with the
     IBM-supplied compilers, use the option `-fpcc-struct-return' or the
     option `-mhc-struct-return'.


File: gcc.info,  Node: MIPS Options,  Next: i386 and x86-64 Options,  Prev: RT Options,  Up: Submodel Options

MIPS Options
------------

   These `-m' options are defined for the MIPS family of computers:

`-march=ARCH'
     Generate code that will run on ARCH, which can be the name of a
     generic MIPS ISA, or the name of a particular processor.  The ISA
     names are: `mips1', `mips2', `mips3', `mips4', `mips32',
     `mips32r2', and `mips64'.  The processor names are: `4kc', `4kp',
     `5kc', `20kc', `m4k', `r2000', `r3000', `r3900', `r4000', `r4400',
     `r4600', `r4650', `r6000', `r8000', `rm7000', `rm9000', `orion',
     `sb1', `vr4100', `vr4111', `vr4120', `vr4300', `vr5000', `vr5400'
     and `vr5500'.  The special value `from-abi' selects the most
     compatible architecture for the selected ABI (that is, `mips1' for
     32-bit ABIs and `mips3' for 64-bit ABIs).

     In processor names, a final `000' can be abbreviated as `k' (for
     example, `-march=r2k').  Prefixes are optional, and `vr' may be
     written `r'.

     GCC defines two macros based on the value of this option.  The
     first is `_MIPS_ARCH', which gives the name of target
     architecture, as a string.  The second has the form
     `_MIPS_ARCH_FOO', where FOO is the capitalized value of
     `_MIPS_ARCH'.  For example, `-march=r2000' will set `_MIPS_ARCH'
     to `"r2000"' and define the macro `_MIPS_ARCH_R2000'.

     Note that the `_MIPS_ARCH' macro uses the processor names given
     above.  In other words, it will have the full prefix and will not
     abbreviate `000' as `k'.  In the case of `from-abi', the macro
     names the resolved architecture (either `"mips1"' or `"mips3"').
     It names the default architecture when no `-march' option is given.

`-mtune=ARCH'
     Optimize for ARCH.  Among other things, this option controls the
     way instructions are scheduled, and the perceived cost of
     arithmetic operations.  The list of ARCH values is the same as for
     `-march'.

     When this option is not used, GCC will optimize for the processor
     specified by `-march'.  By using `-march' and `-mtune' together,
     it is possible to generate code that will run on a family of
     processors, but optimize the code for one particular member of
     that family.

     `-mtune' defines the macros `_MIPS_TUNE' and `_MIPS_TUNE_FOO',
     which work in the same way as the `-march' ones described above.

`-mips1'
     Equivalent to `-march=mips1'.

`-mips2'
     Equivalent to `-march=mips2'.

`-mips3'
     Equivalent to `-march=mips3'.

`-mips4'
     Equivalent to `-march=mips4'.

`-mips32'
     Equivalent to `-march=mips32'.

`-mips32r2'
     Equivalent to `-march=mips32r2'.

`-mips64'
     Equivalent to `-march=mips64'.

`-mfused-madd'
`-mno-fused-madd'
     Generate code that uses (does not use) the floating point multiply
     and accumulate instructions, when they are available.  These
     instructions are generated by default if they are available, but
     this may be undesirable if the extra precision causes problems or
     on certain chips in the mode where denormals are rounded to zero
     where denormals generated by multiply and accumulate instructions
     cause exceptions anyway.

`-mfp32'
     Assume that floating point registers are 32 bits wide.

`-mfp64'
     Assume that floating point registers are 64 bits wide.

`-mgp32'
     Assume that general purpose registers are 32 bits wide.

`-mgp64'
     Assume that general purpose registers are 64 bits wide.

`-mint64'
     Force int and long types to be 64 bits wide.  See `-mlong32' for an
     explanation of the default, and the width of pointers.

`-mlong64'
     Force long types to be 64 bits wide.  See `-mlong32' for an
     explanation of the default, and the width of pointers.

`-mlong32'
     Force long, int, and pointer types to be 32 bits wide.

     The default size of ints, longs and pointers depends on the ABI.
     All the supported ABIs use 32-bit ints.  The n64 ABI uses 64-bit
     longs, as does the 64-bit Cygnus EABI; the others use 32-bit
     longs.  Pointers are the same size as longs, or the same size as
     integer registers, whichever is smaller.

`-mabi=32'
`-mabi=o64'
`-mabi=n32'
`-mabi=64'
`-mabi=eabi'
`-mabi=meabi'
     Generate code for the given ABI.

     Note that there are two embedded ABIs: `-mabi=eabi' selects the
     one defined by Cygnus while `-meabi=meabi' selects the one defined
     by MIPS.  Both these ABIs have 32-bit and 64-bit variants.
     Normally, GCC will generate 64-bit code when you select a 64-bit
     architecture, but you can use `-mgp32' to get 32-bit code instead.

`-mabi-fake-default'
     You don't want to know what this option does.  No, really.  I mean
     it.  Move on to the next option.

     What?  You're still here?  Oh, well....  Ok, here's the deal.  GCC
     wants the default set of options to get the root of the multilib
     tree, and the shared library SONAMEs without any
     multilib-indicating suffixes.  This is not convenience for
     `mips64-linux-gnu', since we want to default to the N32 ABI, while
     still being binary-compatible with `mips-linux-gnu' if you stick
     to the O32 ABI.  Being binary-compatible means shared libraries
     should have the same SONAMEs, and libraries should live in the
     same location.  Having O32 libraries in a sub-directory named say
     `o32' is not acceptable.

     So we trick GCC into believing that O32 is the default ABI, except
     that we override the default with some internal command-line
     processing magic.  Problem is, if we stopped at that, and you then
     created a multilib-aware package that used the output of `gcc
     -print-multi-lib' to decide which multilibs to build, and how, and
     you'd find yourself in an awkward situation when you found out that
     some of the options listed ended up mapping to the same multilib,
     and none of your libraries was actually built for the multilib that
     `-print-multi-lib' claims to be the default.  So we added this
     option that disables the default switcher, falling back to GCC's
     original notion of the default library.  Confused yet?

     For short: don't ever use this option, unless you find it in the
     list of additional options to be used when building for multilibs,
     in the output of `gcc -print-multi-lib'.

`-mmips-as'
     Generate code for the MIPS assembler, and invoke `mips-tfile' to
     add normal debug information.  This is the default for all
     platforms except for the OSF/1 reference platform, using the
     OSF/rose object format.  If the either of the `-gstabs' or
     `-gstabs+' switches are used, the `mips-tfile' program will
     encapsulate the stabs within MIPS ECOFF.

`-mgas'
     Generate code for the GNU assembler.  This is the default on the
     OSF/1 reference platform, using the OSF/rose object format.  Also,
     this is the default if the configure option `--with-gnu-as' is
     used.

`-msplit-addresses'
`-mno-split-addresses'
     Generate code to load the high and low parts of address constants
     separately.  This allows GCC to optimize away redundant loads of
     the high order bits of addresses.  This optimization requires GNU
     as and GNU ld.  This optimization is enabled by default for some
     embedded targets where GNU as and GNU ld are standard.

`-mrnames'
`-mno-rnames'
     The `-mrnames' switch says to output code using the MIPS software
     names for the registers, instead of the hardware names (ie, A0
     instead of $4).  The only known assembler that supports this option
     is the Algorithmics assembler.

`-mmemcpy'
`-mno-memcpy'
     The `-mmemcpy' switch makes all block moves call the appropriate
     string function (`memcpy' or `bcopy') instead of possibly
     generating inline code.

`-mmips-tfile'
`-mno-mips-tfile'
     The `-mno-mips-tfile' switch causes the compiler not postprocess
     the object file with the `mips-tfile' program, after the MIPS
     assembler has generated it to add debug support.  If `mips-tfile'
     is not run, then no local variables will be available to the
     debugger.  In addition, `stage2' and `stage3' objects will have
     the temporary file names passed to the assembler embedded in the
     object file, which means the objects will not compare the same.
     The `-mno-mips-tfile' switch should only be used when there are
     bugs in the `mips-tfile' program that prevents compilation.

`-msoft-float'
     Generate output containing library calls for floating point.
     *Warning:* the requisite libraries are not part of GCC.  Normally
     the facilities of the machine's usual C compiler are used, but
     this can't be done directly in cross-compilation.  You must make
     your own arrangements to provide suitable library functions for
     cross-compilation.

`-mhard-float'
     Generate output containing floating point instructions.  This is
     the default if you use the unmodified sources.

`-mabicalls'
`-mno-abicalls'
     Emit (or do not emit) the pseudo operations `.abicalls',
     `.cpload', and `.cprestore' that some System V.4 ports use for
     position independent code.

`-mxgot'
`-mno-xgot'
     Lift (or do not lift) the usual restrictions on the size of the
     global offset table.

     GCC normally uses a single instruction to load values from the GOT.
     While this is relatively efficient, it will only work if the GOT
     is smaller than about 64k.  Anything larger will cause the linker
     to report an error such as:

          relocation truncated to fit: R_MIPS_GOT16 foobar

     If this happens, you should recompile your code with `-mxgot'.  It
     should then work with very large GOTs, although it will also be
     less efficient, since it will take three instructions to fetch the
     value of a global symbol.

     Note that some linkers can create multiple GOTs.  If you have such
     a linker, you should only need to use `-mxgot' when a single object
     file accesses more than 64k's worth of GOT entries.  Very few do.

     These options have no effect unless GCC is generating position
     independent code.

`-mlong-calls'
`-mno-long-calls'
     Do all calls with the `JALR' instruction, which requires loading
     up a function's address into a register before the call.  You need
     to use this switch, if you call outside of the current 512
     megabyte segment to functions that are not through pointers.

`-membedded-pic'
`-mno-embedded-pic'
     Generate PIC code suitable for some embedded systems.  All calls
     are made using PC relative address, and all data is addressed
     using the $gp register.  No more than 65536 bytes of global data
     may be used.  This requires GNU as and GNU ld which do most of the
     work.  This currently only works on targets which use ECOFF; it
     does not work with ELF.

`-membedded-data'
`-mno-embedded-data'
     Allocate variables to the read-only data section first if
     possible, then next in the small data section if possible,
     otherwise in data.  This gives slightly slower code than the
     default, but reduces the amount of RAM required when executing,
     and thus may be preferred for some embedded systems.

`-muninit-const-in-rodata'
`-mno-uninit-const-in-rodata'
     When used together with `-membedded-data', it will always store
     uninitialized const variables in the read-only data section.

`-msingle-float'
`-mdouble-float'
     The `-msingle-float' switch tells gcc to assume that the floating
     point coprocessor only supports single precision operations, as on
     the `r4650' chip.  The `-mdouble-float' switch permits gcc to use
     double precision operations.  This is the default.

`-mmad'
`-mno-mad'
     Permit use of the `mad', `madu' and `mul' instructions, as on the
     `r4650' chip.

`-m4650'
     Turns on `-msingle-float', `-mmad', and, at least for now,
     `-mcpu=r4650'.

`-mips16'
`-mno-mips16'
     Enable 16-bit instructions.

`-EL'
     Compile code for the processor in little endian mode.  The
     requisite libraries are assumed to exist.

`-EB'
     Compile code for the processor in big endian mode.  The requisite
     libraries are assumed to exist.

`-G NUM'
     Put global and static items less than or equal to NUM bytes into
     the small data or bss sections instead of the normal data or bss
     section.  This allows the assembler to emit one word memory
     reference instructions based on the global pointer (GP or $28),
     instead of the normal two words used.  By default, NUM is 8 when
     the MIPS assembler is used, and 0 when the GNU assembler is used.
     The `-G NUM' switch is also passed to the assembler and linker.
     All modules should be compiled with the same `-G NUM' value.

`-nocpp'
     Tell the MIPS assembler to not run its preprocessor over user
     assembler files (with a `.s' suffix) when assembling them.

`-mfix7000'
     Pass an option to gas which will cause nops to be inserted if the
     read of the destination register of an mfhi or mflo instruction
     occurs in the following two instructions.

`-mfix-sb1'
`-mno-fix-sb1'
     Work around certain SB-1 CPU core errata.  (This flag currently
     works around the SB-1 revision 2 "F1" and "F2" floating point
     errata.)

`-no-crt0'
     Do not include the default crt0.

`-mflush-func=FUNC'
`-mno-flush-func'
     Specifies the function to call to flush the I and D caches, or to
     not call any such function.  If called, the function must take the
     same arguments as the common `_flush_func()', that is, the address
     of the memory range for which the cache is being flushed, the size
     of the memory range, and the number 3 (to flush both caches).  The
     default depends on the target gcc was configured for, but commonly
     is either `_flush_func' or `__cpu_flush'.

`-mbranch-likely'
`-mno-branch-likely'
     Enable or disable use of Branch Likely instructions, regardless of
     the default for the selected architecture.  By default, Branch
     Likely instructions may be generated if they are supported by the
     selected architecture.  An exception is for the MIPS32 and MIPS64
     architectures and processors which implement those architectures;
     for those, Branch Likely instructions will not be generated by
     default because the MIPS32 and MIPS64 architectures specifically
     deprecate their use.

`-malign-loops=NUM'
     Align loops to a 2 raised to a NUM byte boundary.  If
     `-malign-loops' is not specified, the default is 2.  Note specific
     MIPS targets may override the default value.

`-malign-jumps=NUM'
     Align instructions that are only jumped to to a 2 raised to a NUM
     byte boundary.  If `-malign-jumps' is not specified, the default
     is 2.  Note specific MIPS targets may override the default value.

`-malign-functions=NUM'
     Align the start of functions to a 2 raised to NUM byte boundary.
     If `-malign-functions' is not specified, the default is 2.  Note
     specific MIPS targets may override the default value.

`-mmax-skip-loops=NUM'
     Maximum number of padding bytes allowed to satisfy a loop alignment
     request.  The default value is zero which specifies no limit on
     the number of padding bytes.  Note specific MIPS targets may
     override the default value.

`-mmax-skip-jumps=NUM'
     Maximum number of padding bytes allowed to satisfy a loop alignment
     request.  The default value is zero which specifies no limit on
     the number of padding bytes.  Note specific MIPS targets may
     override the default value.

`-mmax-skip-functions=NUM'
     Maximum number of padding bytes allowed to satisfy a loop alignment
     request.  The default value is zero which specifies no limit on
     the number of padding bytes.  This option may have no effect when
     combined with other options such as `-ffunction-sections'.  Note
     specific MIPS targets may override the default value.

