6502 SERIES VOLUME Il

6502 applications

RODNAY ZAKS

: 2)

Every effort has been made to supply complete and accurate information. How- ever, Sybex assumes no responsibility for its use; nor any infringements of patents or other rights of third parties which would result. No license is granted by the equipment manufacturers under any patent or patent rights. Manufacturers reserve the right to change circuitry at any time without notice.

In particular, technical characteristics and prices are subject to rapid change. Comparisons and evaluations are presented for their educational value and for guidance principles. The reader is referred to the manufacturer’s data for exact specifications.

Copyright © 1979 SYBEX Inc. World Rights reserved. No part of this publica- tion may be stored in a retrieval system, copied, transmitted, or reproduced in any way, including, but not limited to, photocopy, photography, magnetic or other recording, without the prior written permission of the publisher.

Library of Congress Card Number: 78-73740 ISBN 0-89588-015-6

Printed in the United States of America Printing 109876543

ACKNOWLEDGEMENTS

Many persons have contributed to the checkout, development or improvement of these programs. Special acknowledgements are due by the author to: Pierre Le Beux, Daniel David, Jaff Lin, Eric Martinot, Tricourt, and to Eric Novikoff (ASM65 assembler).

The following persons have also contributed valuable comments on the final draft of the manuscript, and their contribution is gratefully acknowledged: John McClenon, Doug Trusty, Philip Hooper, Daniel David, Robert Chitsum, and John Smith.

The following companies have provided access to valuable information or resources at an early date, and their contribution is gratefully acknowledged: Rockwell Interna- tional, Synertek Systems, Apple.

The listings of Chapter Four, part 1 have been produced on a Rockwell System 65. The listings of part 2 have been produced with the ASM65 assembler listed in Appendix A.

Art Credits: Daniel Lenoury (Cover Design) Barry Janoff and Renate Woodbury (Technical Art)

THE 6502 SERIES

BOOKS Vol. 1—Programming the 6502 (Ref. C202) Vol. 2—Programming Exercises for the 6502 (Ref. C203) Vol. 3—6502 Applications Book (Ref. D302) Vol. 4—6502 Games Book

SOFTWARE 6502 Assembler in BASIC Games Cassette for SYM Application Programs 8080 Simulator for 6502 (KIM and APPLE versions)

EDUCATIONAL SYSTEM

Computeacher™ Games Board™

PREFACE

This book presents practical application techniques for the 6502 microprocessor. It assumes an elementary knowledge of microproces- sOr programming on the level of the preceding book in this series (Ref- erence C202: Programming the 6502). Understanding how to program the microprocessor chip itself (the 6502) is only a prerequisite for the actual programming of a microprocessor board connected to real devices. The next problem is to learn how to write actual applica- tion programs involving the input/output ports and other facilities available in a real system. This book addresses itself to this problem. It will present the techniques and programs required for typical appli- cations, using the actual input-output chips available on a board.

The programs presented in this book will require a minimum of ac- tual hardware to be effectively implemented. The user is therefore en- couraged to practice the concepts and techniques presented here on actual hardware. A realistic description of possible applications boards will be presented. The programs are applicable to any 6502-based mi- crocomputer board such as the KIM, the SYM, the AIM 65, or others. Many programs can be run directly on one or more of these boards while others will require some changes. However, the concepts and techniques are common to all.

The application programs presented in this book will allow the reader to build a complete home alarm system, which includes fire detection and other features, an electronic piano, a motor speed regulator, an appli- ance or hobby-train controller, a time-of-day clock, a simulated traf- fic control system, a morse code generator, an industrial control loop for temperature control, including analog-to-digital conversion, and more.

This book is intended to teach all the basic skills required to apply the 6502 to real life applications. It is preceded in our 6502 series by **C202 - Programming the 6502,’’ and followed by ‘‘G402 - 6502 Games.’’

TABLE OF CONTENTS

TABLE OF ILLUSTRATIONS .........cccecceceseel

I. IT.

Il.

IV.

VI.

INTRODUCTION .......... ccc cc esevevece ll THE INPUT OUTPUT CHIPS ..............15

Introduction. Basic Definitions. The 6520 PIA, The 6522. Programming the 6522. The 6530 ROM-RAM I/O Timer (RRIOT). The 6532. Summary.

6502 SYSTEMS......... cece cece cece cscs O4

Introduction. Standard 6502 System. The KIM-1. The SYM-1. The AIM 65. Other boards.

BASIC TECHNIQUES ............ cece 000s 18

Introduction

SECTION I: THE TECHNIQUES

Relays. Switches. Speaker. A Morse Generator. Time of Day Clock. A Home Control Program. A Telephone Dialer.

SECTION 2; COMBINATIONS OF TECHNIQUES

Introduction. Generating a Siren Sound. Sensing an Input Pulse. Pulse Measurement. A Simple Music Program. KIM Traffic Control. Learn the Multiplication Table. Summary.

INDUSTRIAL AND HOME APPLICATIONS 145

Introduction. A Traffic Control System. Dot Matrix LED. Displaying Switch Values. Tone Generation. Music. A Burglar Alarm. DC Motor Control. Analog to Digital Conversion (A Heat Sensor). Summary.

THE PERIPHERALS ...............+0+2+-216

Introduction. Keyboard. Paper Tape Reader or ASCII Keyboard. Micro- printer. Summary.

VIT. CONCLUSIONS. ..........c ccc ccvcccccece 241 APPENDIX A - A 6502 ASSEMBLER IN BASIC.... 243

Introduction. General Description. Using the Assembler. Syntax. HP2000F BASIC.

APPENDIX B -MULTIPLICATION GAME:

THE PROGRAM .......cccccccccccccccccs 259 APPENDIX C - PROGRAM LISTINGS (Chapter 4 Part 1) ......ccccccccccccvvcces 262

- Program 4-1: Morse

- Program 4-2: Time of Day

- Program 4-3: Home Control - Program 4-4: Phone Dialer

APPENDIX D - HEXADECIMAL CONVERSION TABLE .............2ceee. 273

APPENDIX E - ASCII CONVERSION TABLE ..... 274

APPENDIX F - 6502 INSTRUCTIONS ............ 275

TABLE OF ILLUSTRATIONS

Standard Programming Form .............sccsccsecescescacecceses

TY pial PIO eocasccesc srece rica caaren weairoe cna sene yews ceo suas aewiees NCOIZO PIA seocoaceaveinwesanaisuvsuweuten wes ccwatepadeatesended

6520 Memory Map Goi veciasesciyscdociss tears ceedtesataveacacecutees

6520 Register Selection ...........cccccccsccecccecceteccsscenvecececs 6520 Control Registers ..........cccscccccssccsccsecccecsceccceccscess

6520: CA2 Control icuscissescsescisi cciesceciatesevasdenssunenaeiians 6520 CB2 Control cise sacsswtiavinctaes west voteeaiebiencnduesaoecteass

Interrupt Control (CA1, CBI Inputs) ................cescessesees Identifying the PIO ............cccccscsstcuccescesescccscsucenesecacs

Identifying the POrts .:2ccceiessiscsevevinisssaciensietoosgeanaceweoses 6522 Internal Architecture .............cccsceccsscsccesccnccscenece

6522 VIA Memory Map ...........ccccescccccsevccccrsssccccctessess 6522 ReBIS(EIS: cud ccecuseseoce re stasscernsaecoveseatnesad oieeacnsenetes Using the 6522: STA DDRA, .......csccscccsscsscecccecscccsceecces Using the 6522: STA DDRB ...............cccecscscensceeescscsoees Using the.6522°STA ORA sess cases ex cescsiecetecstevereteetaieaves Using the 6522: LDA ORB. ..............csceccsecscsscoscessecceces Peripheral Control Register ...........cccccsccsesscescenceecssccees Interrupt Flag Enable Register (IFR/IER) ...........scecsecsees Control Lines Function (ACR) ...........ssessscsecvcecccceseccees PCR Detailed Operation (courtesy:Rockwell) ..............08.

Continued: PCR Detailed Operation ...............ccsescseecees

Reading Data When Ready ...............ccescsccseceseeesesesseces 6522-Auxiliary Control Register ............sescecsscesceseeseeees Interrupt ROGIStCES sg ciicd sos cn vcntincetesecdveadaveistwaseedsesses

6522-Auxiliary Control Register Controls Timer 1 Modes... 6522-Auxiliary Control Register Selects Timer 1

Operating MOGES cso.cussess casiesedicecivedesasewadeen daseeahvarv enews "Fimer- AGO ressing ss sein seicv ces tivawtien cee seastactantnasmaxecons

Timer | in Free Running Mode ...............ccccccesscceccesccees Shift Register Control ...........cccscescccescsccesccecescscccceseves 6522 Register Selection is Direct ............c.ccscccsssccvsvccncecs Connecting Multiple 6522’s-Generating an IRQ .............. 6530 Intermal Architecture ...........cccsccccecccnsccvesccsensceeees 6530 Memory Mapisisccaccssccsvesscecsocsidecvessacesseneeseiersesss 6532 Internal Architecture ...........ccccccessccccscccessccctscecses G53.2: AGGreSSING sci pets aesiatepied sexesewiaainaen coumssdtoawienines Comparison Chart of the Four PIO’S ............ccscesscsecceees

Organization of a ‘‘Standard’’ 6520 System ..............cee00 Photo OF RIMEY ficcas vn vcasavinnavasedade daw sduccevecnswnatetewuctes

OAOAnANUN AWD — ©

KIM-1 Internal Organization ..............cccscsceccecsscsccscnces KIM-1 Memory Map ............ccccccccccvacccnccecccccscsscsessees

KIM Application Connector .........ssssccccsssccsecsececscscsaces KIM Expansion Connector ..........ccccsecccscsvccccccvcscessccess SYM: Photo sisscisciccsinscticcenscosses ere ron sadvateieeniuxese SYM-1 Internal Organization ...............scescscvsceccssceccnses System Memory Map ............ccsccsccscecsecccccccesevccsesccsens RAM Memory Map .........ccsscscsscsssssccscccncssseccsscccvcseces Expansion Connector (E) .........csccscssscssccesccccvecececeescess Application Connector (A) ........secscecsecsccccccccccceecnscnsnes Auxiliary Application Connector (AA) ..........ccccsssssceceees Memory Map for the 6522's .........csscscscsccscscsscscencccsevers Memory Map for the 6532 ...........cscssescesecccsvaccecccscnceens The Four Buffered Outputs ............sceccescsscevncssccccescence Keyboard and LED Connection .............cccccsccsssevsccvecees AIM 65 is a Board with Mini-Printer and Full Keyboard .... KIM/SYM/AIM Connector Compatibility..............

Complete System with Power Supply, Microcomputer

Board, Tape Recorder and Applications Board ...............

TO BuUliers esse ctiuinciesates ecssooveubeod tedesariesseadcosweniee sis) 6530 Relay Interface cesisecesisiccscnteseicistacseversvedsevsssones Connecting a Simple Relay ...............cceccccssceccsecscnceseees Precautions on Device Side ...........ccsccsvceccsccccccsscnceescees Connecting a Double Pole Relay ................scecsesesescescees Connecting Two Relays to the PIO ............sssssecssveccsscees External Circuit for the Relays ..............cssessesccscsesrsceces

Memory Map for 6522 #3 .........cssccscsscescesccescssceseensonses Port B Of G5.22 #3 syoccssvadececueticertsucwervaskentaceresesnguneneees Detail of Relay Connection on the Applications Board ...... Connecting an:SPST iis sassecsesirictsbedssausdeestieresvsssaneees Connecting an SPDT sasisscssccoccvesestecvescdes cee vevesee'esssees Connecting Four SPDT Switches to the SYM ..............000 AN SPDT. Switch vcsccssenscocsesscavend eens. cuwsncwvei view adeens

Connecting the Speaker ...........ccsscesscccccsccsccccscceccevesecs Obtaining a Louder Output ..............ccccccsceesccvesvcecscsers Memory Allocation for the Morse Program ..............ss000 Morse Transmission Flowchart ...........cccccscecsccccscecseees Converting Morse to Binary ........cscccccsccccccscssctscccceseces Converting ASCII to Morse .........cescsccssssecscccssssvesccssees Morse Equivalence Table ...........cscscscsecscsscsscsscsecscssenes Flowchart for Generating Hexadecimal Morse Code ........ Square Wave Generates Tone in Speaker ...........secccssseees 6522 Auxiliary REgister ic ucscctiiccssawewsecenactesdedecevencesnens Timing Diagram for Tone Generation .............scescscescsees Program for Using Timer 1 .............cccsccscscsccscccevcscesess Generating Tone of Set Duration with Timer 1..,.............. 6522 ACR Selects Timer Modes ...........ccsccscecescscosceseeees Bits 6.and’7 of ACR \ssssscs coccsenicicsninscduataccswesssensesatonevoss THE MOrse Program siicsscscstesisicsatevswiseicaescaeivoceusseyes Using Indexed Addressing to Retrieve Morse Code........... Memory Map for Timer 1 .............scsccscesccsccscesscrscescees Flow Chart for Delay ........... bai haudasiaceapncescas Sevoeeeuniuess Time-of-Day Memory Map .........-..sssscscseseccccecesscsscvees Time-of Day Clock .........ccccseseeees adepcbiaceseg vanes taceseewees

The Time-of-Day Program ...........cccccccccscscescvncesccccecees Home Control Program ...........ccccscsccecccccvccccccccsevcccens The Telephone Frequencies .............scesccovscvsccscccessecsees Phone Dialer Flow Chart ..........cscscccscssssccssvscssscssccosess Phone Dialer Program ............ccccesssscccscscccvscsccccscvecces

Telephone Dialer: Indirect Indexed Access and

MeCMORY: Mat achcsessiccraccceatieicsccingciiee scteiesetaeSecdiwecees Loading the Timer ............scsseees cavetaurtatameterececesaaunens Computing the Timer Constants .............csccccvscccscsccesecs Suggested Hardware Improvement for Cleaner Frequencies AC SITEN SOUMNG Siivscnciiwsceccidiavcccnersnauceticsa cénveaceueteerueess Siren Flowchart-Up Ramp. ............ccscssccscsesscscccccsccccces Stopping at NMaX a osdideiccsvevissvcdecscorcesocke a ccecessveweswees Siren Program for the Flowchart of Fig 4-47 . ............0008 Connecting a Speaker (Improved) ..........ccsceccscescessscesees Connecting Switch and Speaker .............ccscessesscosscenceves Detailed Flowchart .............scccccsscescccscccsccsscscccesccsecs Switch Closure Measurement Program ...........cccsscssesecees Switch Time Measure ........sccccscccecsccssccccccocsccsesesessveces

The Switch Time Program: Measurement and

Tome Generation ........ccccccccccsccccccccccsevcccvecseccccccecccccece

250 ms Delay Flowchart

250 MS Delay ccvcicivsescccsecesctavscuccseaseesses esiuddastecovines) Time 10 Flow Chart’ 2ccssccctsdseencisccdacastancieserveskiceteusagees Generating a 0.1 Second Delay ..............ccsccsscssccesecsecees Mo Zart SOnatine os snide sscccidevnc jeseedcnsaeeevestsevvdveussvcs cons Bach Choral cccs costs cccadunasacestacuaussiasoveiewesedensweeecss ones

Play Sound Flowchart

Playin @& DUNG sesaceven seectiverinces dine a ieceaustecses Codessawessen

Traffic Flowchart

Tal tic COntronlet ic50icio. vices vctccrcewsiatcaciveserveia de xbssweee’

The Application Board #2 ..........ccccccsccvscesccvevcssccsesevess Underside Shows Wire-Wrap ........cccssscssccsscscnscccccsceess For Convenience, Application Cables Connect to Board .... Board Lavout 2. cc cacavccscdapiincsw cewseecans ices decveyaetseeiwersedax H1 & HZ Conmnectols iss csccisiviscsvecwssevesetoassaseeviensdsees H3 & 4 Connectors ecesiccds cesecisiascassuvevsstixeteseconccanevn The Traffic Control System ............cccescescsecscecccsscesccees Connecting the LED'S: o.cisiwscscanccastcsvccsinsaaercavavecensasees Actual LED Connection ............ccccccceccccsssccccecscceucecece Night Patter ty ins Acti sscccwcesudcawsescenc nseceoreswrabuseeenaabe Traffic Light Simulation—Night Mode (Program 5-1)....... Pattern for Addressing the LED Pairs.............cccscsssserees LOQOD Tuning’ =. sserisictinncssxesiecowendenccnsnassa ested destereears Day: MOde scccashcscavtasistevescataee sews eceicccseu tec teeuna aes

Connecting the 5X7 LED ............cccccscccesccccesccccescrences The Connectors to the LED ..............ccsccccecccccecccscesceecs Displayinis a." Oasis cudeicarasevaascatia cea Gastouatsosasnessetedivws Displaying "1" sscccesicccsacacidedicesosudatiet thivivas evans eee Driving a Dot Matrix LED ...............ccccsccecccevcccceresececs A Dot Matrix Table ..............sccccscesccsesscscscces ieee Gaates

Displaying a Switch Value .................ccesceesccsscceccesaceess Advanced LED Matrix Display (Program 5-4) ............000. Speaker Connection i isicss iiss ccccnscsccviscnscccccssscvsessveceveeve Basic Speaker Activation (Program 5-5) ..........scsssssscveees Binary Switches Specify Tone ...........ccccescsosesccescscenscees Music Frequency Table ..............ccsccesccssccevcccsecevccscenes Music Program Flowchart — ..........scccsssscssceesscessceeseees The Music Program (Program 5-6) ..........scsscscssssccescceses Connections for MuSic Program .............ccccssssecsscscccvacs The Photo-Transistor Circuit (on Socket M3)............ss+00. Alarni-FlowChatt ssccscssicanstieccacsteesnuetsscssxinaiuesetureaees

Digital Speed Control ............cccccesccssccsccscesesccescesssencs

Simplified Speed Diagram .............cscccccsccecscecccssscccecess DC Motor Speed Curve ..........ccccsecsscccevcescccsscesscessceess ThE CONNECHIONS % vaciwsn canccaecawens ese counasinsanvidecss cosedeuneve DC Motor Flowchart

"TNE WAVGlOIMS s2sdccesadavusexexcsweccarciwsaudenccvavesveestevecoued Motor Control (Program 5-8) ...........ccssccssccecccsscscvcesess Connection for ADC vss csesicesssiseccavsserteveiversssavestesenes

Successive APProximatiOns ..........csccccsecvsccssceccescesccees

Successive Approximation Flowchart

ADC Interl aCe 2accercuseaevac taut couse vseuss ooncew cua saceeeaieiad

ADC Memory Map........... ery rere eee er ADC Flowchalt ...........cccccscccceccesccsscvcrecscessacevasencess Analog-Digital Converter (Program 5-9). ...............scesses

Connecting the Keyboard .............cccccscccccccccccvcvccetecsees

Step 2: Reading IORA after Key Closure ................000000 .

Steps Wiiting TOR A cack ceiecas seweicccsadtadesasscedcaresaursents Step 4: Read back IORA .........ccccscenccsscsccscsccccersccessees Keyboard Character Codes Table ...............sccccsccccsccseens Keyboard Flowchart .............ccccccsscesceccccscscvecscesecrens Keyboard Program (Program 621) ..........csccssscsscsceseescees Indexed Addressing for Table ACCESS .........scccsecescesceecees Converting the Character ID # to ASCII ............ccecsscenes Punched 8-Level Paper Tape ............sccccscsccscescecesccecess Paper Tape Reader Hardwafe .............sscccserscscececserssees PTR Connection Details .............cescsceccccscscsccscsccsccesess Paper-Tape Reader Interface .............scescescsscescescvssceecs PTR FIOWGNALC. : sieves sinnswsesGeseasadedencsaveanee even sesueseseees PTR: Memory: MAD discccs cenetoceacesind ivestexenctatiawcsteeeedees PTR/Keyboard Program (Program 6-2) ........sccesecssssseees Indirect Indexed Access: STA ($00), Y .........ccscsccescseesees Basic Printer Interface ..........cccccccscorscccceccccscssccesecccees Printer CONNECCION :essicocostansbacecdeaivesdcsaseacbedeteacdavvassae’s Flowchart for Printer Program ..........sccssecsscesesccnsescsecs Printer Memory Map ......scssesescascccssscscsconsevscsecscssacss Printer Program (Program 6-3) .......c.ccscsccseccsceesccscescees Indexed Indirect ACCESS ........scccsevscvercsccssccsccsceescssceeees

Sample Run with ASM65 .............scecsccssecscccscccscessvececs THE SYMBOL T ADO sa vsccdvcscdecessctstcne coucecsescacsussteesseseosene 6502 Assembler Listing (copyright © 1979,Sybex Inc.) .....scseeseres

CHAPTER 1

INTRODUCTION

When learning how to program, understanding the operation of the microprocessor itself is only the first problem which must be solved. This is the problém addressed by our book, ref C202, Programming the 6502. The next problem is to learn how to program effectively, us- ing input/output devices connected to the microprocessor board. This is the purpose of this book. Naturally, no book can completely cover all possible devices. A selection, therefore, has been made among the important input/output devices usually connected to a 6502, and ap- plication programs are presented, which are likely to fit a majority of applications.

First, you will learn how to effectively program a PIO, the parallel input/output chip. You will learn to use polling or interrupts. You will learn to generate pulses, measure delays, and control actual input/ output devices such as switches, relays, or more complex devices such as a digital to analog converter, a motor, and others. You will also learn how to use more complex input/output chips such as a program- mable timer. Additional interfaces will be presented for simple de- vices, so that you may actually build an applications board and prac- tice On it.

In order to learn programming effectively, you are strongly encour- aged to practice. It is indeed the only real way of becoming a proficient programmer. In order to practice, you will need a microcomputer board such as the KIM, the SYM, the AIM65, or any other 6502 board. Because all boards normally provide at least one PIO (often 2), and at least 2 timers (sometimes more), all programs presented in this book should run on any of these boards with minor variations, if any.

11

6502 APPLICATIONS BOOK

The additional hardware which you will need in order to run speci- fic programs will be discussed in Chapters 4, 5 and 6. It is minimal and easily obtainable. In particular, you will find in Chapters 4, 5 and 6 the description of suggested applications boards which can be constructed from common components at low cost. It will allow you to run the programs in the chapter, using your microcomputer board and the applications board. It is suggested that you consider building it in order to practice.

However, it is not indispensable. You will learn all the basic tech- niques by merely reading the book. If you wish to grow from there, then actual practice is strongly recommended.

Connecting Your Microprocessor to the Real World

Connecting the microprocessor itself to the real world first involves building a basic microprocessor board, then connecting it to actual de- vices. Both hardware and software interfaces will be required to con- nect actual devices to the board. This book will present in detail both the hardware components and the programs required for the most commonly used devices. In order to design industrial programs nor- mally involving expensive devices such as traffic signals, simulated devices will be used on the applications board, using LED’s for exam- ple. If the program were to be applied to a real traffic system, only the interface hardware would usually be changed. The program would re- main essentially identical. The skills you will learn are, therefore, ap- plicable to real life situations.

The Pedagogy

When reading this book, you will usually ‘‘learn by doing.” Each program will be presented in detail: its purpose, its flow-chart, the hardware interface, the devices, the program itself, and the com- plete analysis of the techniques used. Each chapter is essentially self- contained. For example it is not necessary that you understand all the PIO features of Chapter 2 to read Chapter 3. However, sequential read- ing is recommended for a complete understanding. The contents of Chapter 2 introduce all the usual parallel I/O chips used in a 6502 system, from the 6520 to the 6532. Since all existing 6502 boards to date use these standard chips, this chapter should be read by all those who are not familiar with them.

12

INTRODUCTION

Chapter Three presents the ‘‘Standard 6502 Board’’, and some well- known variations: KIM, SYM, AIM65 (others exist). Most examples presented in the book will run directly on a SYM, and with simple changes, on a KIM, or other boards.

Chapter Four introduces the basic application techniques for con- necting simple devices: relays, switches, speaker. The first applica- tions board will be used for applications ranging from a Morse gen- erator to a telephone dialer.

Chapter Five presents more complex home and industrial applica- tions. The second applications board will be used for applications ranging from simulated traffic control and analog-to-digital conver- sion to a complete home burglar alarm or an electronic piano.

In Chapter Six actual low-cost peripherals are connected to a micro- computer board: from paper-tape-reader to keyboard and printer.

Finally, a summary and synthesis are presented in Chapter Seven.

You will also find in Appendix A a complete assembler for the 6502, written in BASIC, to facilitate your development of complex programs requiring an assembler.

You will find on the next page a Standard Programming Form de- signed to facilitate writing your 6502 programs.

13

6502 APPLICATIONS BOOK

COMMENT

SYMBOLIC ASSEMBLER INSTRUCTIONS OPERAND

PROGRAM

STANDARD PROGRAMMING FORM

HEXADECIMAL

ADDRESS

(a)

Fig. 1-1: Standard Programming Form

14

copyright © SYBEX 1978

CHAPTER 2

THE INPUT OUTPUT CHIPS

INTRODUCTION

In this book, we will connect a variety of input-output devices to a 6502 board in order to realize practical microcomputer applications. It is therefore essential to understand the input-output resources of a 6502 system. The reader who is not familiar with the basic terms or with the basic techniques (such as ‘‘polling’’) is encouraged to review them in the previous volume of this series, reference C202 (Program- ming the 6502).

In this chapter, we will review systematically the parallel input- Output chips used on nearly every 6502 board to provide the required input-output facilities. It is indispensable to understand at least how a ‘*PIO,”’ such as a 6522 works, before proceeding to the application chapters. The exact details of the timer operation or other exotic resources (such as a shifter) are not essential in a first reading and could be skipped. Also, the exact details and formats of the various registers inside the 6520, 6522, 6530, and 6532 are not important to memorize. They are provided here as a reference for the following chapters.

It is therefore suggested that you read carefully at least one of the sections on a PIO such as the 6520 or the 6522, without trying to remember all the details, but focussing on the way they operate. Nearly every application will make use of a PIO, i.e. of one of the chips presented in this section.

15

6502 APPLICATIONS BOOK

In addition to these chips, most microcomputer boards will provide some other specialized input-output interfaces, such as a cassette in- terface or a CRT interface. The interested reader is referred to the manufacturer’s literature or to the reference book C207 (‘“‘Micro- processor Interfacing Techniques’’) for details on these specific interfaces.

BASIC DEFINITIONS

This section is a reminder of the terms we will use in this chapter.

The three essentiai input-output facilities on nearly every micro- computer board, are the ‘‘PIO,”’ the ‘‘UART,”’’ and the ‘‘timer. Let us examine them:

CAI CA2

2] oO '~ >

a9] |B8sl |Bo3 DATA BUS <= a 3 a5> are a> PORTA

REGISTER \——v? PORTB SELECT (IRQA CB2 RQB CBI

Fig. 2-1: Typical PIO

The PIO

The ‘‘PIO”’’ or ‘‘parallel input-output chip,’’ is a component which provides at least two parallel eight-bit ports. In a PIO, the use of each line of each port is usually programmable in direction. The direc- tion of each line is usually determined by the contents of a ‘‘data- direction register’’ associated with each port. Whenever a specific bit

16

THE INPUT OUTPUT CHIPS

of the data direction register is ‘‘0’’, for example, the corresponding line on the port will be an input. Prior to using the PIO, the program- mer will first have to load the contents of the data-direction register of each port, in order to define in which direction the lines will be used. Specific additional constraints may be imposed by manufacturer such as restricting lines to be programmable in direction in groups of four, or else assigning special functions to some bit positions such as bit six and bit seven. Some of these restrictions will be encountered in the chips presented in this chapter. The internal block diagram of the ‘*standard PIO”’ is shown in Fig 2-1. The two buffers for port A and port B appear on the right of the illustration. The data-direction regis- ter associated with each port appears to the left of these buffers. Addi- tionally, two control registers are provided in this simplified diagram. The control register is required to specify the function of the control signals which are provided by this PIO. In particular, it must deter- mine and control the ‘‘hand-shaking’’ procedure, and whether the control signals will trigger flags or interrupts, and also whether a low- to-high transition, or a high-to-low transition, should be used for ex- ample. Typically, the programmer will have to specify the contents of the control register prior to making any use of the control lines sup- plied by the component. Also the programmer will look up the con- tents of the control register to determine whether an internal interrupt or other special condition has been detected (status information).

In addition to the two data ports, a PIO should also supply control lines to allow automated hand-shaking with a peripheral. These con- trol lines are shown on the right side of the standard PIO of Fig 2-1, and are labeled respectively CA1, CA2 for port A, and CB1, CB2 for port B.

As an example of a hand-shaking procedure, the external peripheral might supply a ‘‘DATA READY’’ signal on CA1. The microproces- sor would then respond with a ‘‘DATA REQUEST”’ signal on CA2. Additionally, when a ‘‘data ready’’ signal is received on CA1, it should be flagged in the control register, and an interrupt request might be generated externally in order to alert the 6502 to this event. This is a typical simple example of the control sequence required for effective hand-shaking. Much of this procedure is automated inside the stan- dard PIO, and the options are defined by the contents of the control register. The specific details will be presented for each of the PIO’s we will describe, beginning on page 20.

17

6502 APPLICATIONS BOOK

The Timer

A basic requirement in most practical applications is the ability to generate specific delays. Delays can be measured by software tech- niques or else by hardware timers. As long as no interrupts are used in the system, delays can usually be generated conveniently by software loops (see reference C202 for details). However, in more complex situations, or in situations where interrupts may occur, it is desirable to use one or more external hardware timers to generate or measure fixed delays.

Using the Timer on Output

In its simplest form, a hardware timer is a counter equipped with a register (8 bits or 16 bits). When used in output mode, the timer’s register is loaded with a given value by the program. It is then given a “*go ahead”’ signal and it starts counting. Most timers will use the system clock, but not necessarily (usually a one MHz clock=one- microsecond pulses). The number placed in the counter’s register will be decremented by one for every successive clock pulse. If the value placed in the register was N, the contents of the counter will have decremented to zero after N pulses, that is after N microseconds, assuming one-microsecond pulses. Whenever the counter decrements to zero, a signal will be generated which will set a status flag in the timer chip and/or generate an external interrupt. Depending on the preci- sion required, the program will either poll timer devices or else accept interrupts. Typical programs will be presented in this chapter.

If the timer were equipped with a single 8-bit register, it could count only from one to 256. The maximum delay would only be 256 micro- seconds with a standard clock. This delay is too short for most appli- cations. Naturally, it would be possible to use the interrupt generated at the end of the 256 microseconds to update a memory location, then test whether this memory location had reached a specific value. However, this would result in inaccurate time measurement and a somewhat cumbersome process. Therefore, a timer which is equipped with an 8-bit register would be insufficient. Two techniques are used to overcome this limitation. Conceptually, the simpplest one is to use a 16-bit register for the counter. The counter may then count from 1 to 64K, i.e., from one microsecond to 65,536 micro- seconds or approximately 65 milliseconds. This is indeed sufficient for most applications. However, this technique requires that the timer be

18

THE INPUT OUTPUT CHIPS

loaded in at least two operations, since the data-bus is only 8-bit wide. First, the program must load one half of the register, then it must load the other half, an inconvenience.

The other technique to generate delays over a wide range is to use internal divide circuits within the timer. Such a timer will then appear to the programmer as a device equipped with perhaps four registers. For example, if the first register is used, then the delay generated will be expressed in clock units (1 microsecond typical). If the second register is used, then the delay unit will be 8 times the clock cycle; in the third one the timing unit will be 64 times the clock cycle, and in the next one the timing will be 1,024 times the clock cycle (or approximately one millisecond, assuming a 1 MHz clock). This approach is somewhat more convenient to the programmer and offers the possibility of load- ing the timer in a single operation, yet using it over a wide range. How- ever, the internal complexity of the device is increased.

Using the Timer On Input

A timer may be used on input to measure the duration of an exter- nal pulse, or else the time elapsed between two successive pulses. In this case, the initial contents of the timer counter are zero and the counter will increment its internal register with each timing interval. Once the delay has been measured, a flag will be set by the device or else an external interrupt may be generated, and the program will be responsible for reading the contents of the counter register which in- dicate the external event duration.

Pulse Trains

A timer may be used not only to generate or measure a pulse, but also to generate or count a train of pulses. Whenever a delay is generated or measured for a pulse, the timer mode is usually called a ‘‘one-shot’’ mode. When a train of pulses is generated, it is often called a ‘‘free-running’’ mode. Additionally, a number of options can be pro- vided to specify whether a high-to-low transition or else a low-to-high transition of the signal should be used to activate or stop the timer, or else whether levels should be considered rather than pulses. Addi- tionally, the timing and logical value of interrupt flags can be specified. Further, the conditions under which the internal status is set and reset are usually programmable. Because of the large number of possible variations, each timer device tends to have a strong personal- ity and needs to be studied in detail before being used.

19

6502 APPLICATIONS BOOK

The UART

‘‘UART”’’ stands for ‘‘Universal Asynchronous Receiver Trans- ceiver.’’ The essential function of the UART is to perform serial-to- parallel, and parallel-to-serial conversions. Additionally, the standard UART provides a number of options usually required for serial com- munications with external devices such as parity (checking, inhibition or generation) and start and stop bits. The conversion 1s performed by an internal shifter. Such a shifter may also be incorporated in some input-output chips.

Actual 6502 Input-Output Devices

Virtually every 6502-based board will require at least 2 PIO’s and one timer. These functions will be typically provided by a combination of 6520 and 6530 chips or by a combination of 6522 and 6532 chips. The 6520 and 6530, which will be described below, are the original input-output chips which were introduced by MOS Technology. The 6502 is now manufactured by several other manufacturers, such as Synertek and Rockwell, and additional support chips have been intro- duced, such as the 6522 and the 6532. Still other support chips will probably be introduced in the future.

At this time, however, the most important chips are the 6520, the 6530, the 6522, and the 6532. These four essential input-output chips will be described now.

CONTROUA) > C2

—

PORTS

A

baat al

—_————» CB?

| conmnot <~-_"—"— CB!

Fig 2-2: The 6320 PIA

20

THE INPUT OUTPUT CHIPS

THE 6520 (PIA)

The 6520 is almost a pure ‘‘PIO,’’ as we have defined it. it has been designed as a pin-for-pin replacement for the Motorola M6820, and has been called by the manufacturer a ‘‘peripheral interface adapter’’ or ‘‘PIA.”’ The signals of the 6520 are shown on Fig 2-2. Its internal ar- chitecture is shown in Fig 2-3.

Referring to Fig 2-3, it can be seen that this device provides two parallel input-output ports, port A and port B. Each port is equipped with a buffer. However, the two ports are not quite identical, and the buffer really works only as an output buffer, not as an input one. A data-direction register (‘‘DDR’’) is available for each port, and specifies the direction of each line of the port. A value ‘‘0’’ in this DDR specifies an input, and a value ‘‘1’’ specifies an output. The choice of conventions stems from a safety consideration: whenever a ‘‘RESET’”’ is applied, the contents of all registers will be zeroed and

Fig 2-3: 6520 Internal Architecture

21

6502 APPLICATIONS BOOK

the data-direction register will become all zeroes. As a result, all lines will be configured as inputs; this is the safe way to start a system. No external pulse can be generated until the program has started execu- tion.

Additionally, each port is equipped with two registers, the control register and the output register. The data sent by the 6502 to the device are gated to the output register (ORA) of the specified port, where they are held. The function of the control register (CRA) will be explained below. It specifies the role of various control options and contains status information for each port.

Finally, each port is equipped with two external control lines, la- beled CAI, and CA2 for port A. CAI is a monodirectional line from the device to the 6520. CA2 is a bidirectional line, which may be used either as an input or an output.

The two ports are logically equivalent and symmetrical, as indicated on Fig 2-3. However, practical differences exist. In particular, the drive capability of port B is superior to port A, and the role of the con- trol signals is not completely symmetrical.

Looking now at the left of Fig 2-3, or at Fig 2-2, the data bus con- nects the internal buffer of the 6520 to the system data bus. Two in- terrupt requests may be generated by the device, if so specified by the contents of the control registers for port A and B; they are respectively IRQA and IRQB. Finally, three chip-select inputs must be specified for the device, and are labeled CS1, CS2, and CS3. This design was used by Motorola in order to allow the convenient direct connection of up to 8 separate devices to the data bus, without the necessity of an external address decoder. In practice, the high number of chip-select inputs On the chip may have resulted in a disadvantage which will be pointed out below (one register-select missing). Two register-select in- puts are provided, and connected to the address bus. They are labeled RSO and RS1. This means that the 6520 device appears to the pro- grammer as four memory locations. This may seem surprising since we have just determined (see Fig 2-3) that there are four registers per port, i.e. a total of eight registers. How can one address 8 registers with only 4 addresses? This is a problem brought about by the pin number limitation of the device. One bit of the control-register, bit 2, is used to multiplex between the two sets of registers. When bit 2 of the con- trol register is equal to ‘‘0,”’ the data-direction for that port is selected. When it is ‘‘1,”’ the peripheral-interface buffer is selected.

Finally, three more control lines are available: ‘‘R/W’’ (read or write), ‘‘enable’’ (usually phase two of the clock), and finally ‘‘reset.’’

22

THE INPUT OUTPUT CHIPS

input

passive pull-up resistor 1.6mAsink = 1 TIL lood

resistor pull-up 1 TTL load

Fig. 2-4: Buffer A

+ 5V +5V

output “1” may not be> 2.4V

input current drive: no pull-up. ImA sink at 1.5V high-Z input. *output is high impedance

when lines are “input’’

Fig. 2-5: Buffer B

Differences between Port A and Port B

Port A and port B, even though they are logically equivalent, are physically dissimilar. The buffers of port A use passive pull-ups. They can sink 1.6 mA, making the buffers capable of driving a standard

23

6502 APPLICATIONS BOOK

TTL load. On port B, the buffers are push-pull devices (see Fig 2-4 and 2-5). Since they are active devices, the logic ‘‘1”’ voltage may not be higher than 2.4 volts (versus Vpp in the case of port A). However they have a superior current drive (ImA at 1.5v), so that they can be directly connected to LED’s, or to Darlington transistor switches. Finally, when port B is used as input, the output buffer enters a high- impedance mode, so that the input will have a high impedance (more than one Megohm). The details of the port A buffer are shown on Fig 2-4, and the details of the port B buffer are shown on Fig 2-5.

Fig. 2-6: 6520 Memory Map

The Internal Registers

Let us consider now in more detail the specific resources and peculiarities of the 6520. First, as we have already noted, the 6520 is equipped with 6 internal registers: the two buffers (which share the address of the output register), the two data direction registers, and the two control registers. However, because of the pin number limita- tion, only two register-select pins are available on the device, called respectively RSO and RS1. The resulting 6520 memory map is shown on Fig 2-6. It shows that registers DDRA and IORA for example, share the same logical memory address. The control-register is addressed independently. The 6520 differentiates internally between the DDRA and the IORA by the value of bit 2 of the control register. The register selection is presented on Fig 2-7. Whenever bit 2 of the control register is ‘‘0,’’ the DDR is selected. Whenever it is ‘‘1,’’ the IO register or buffer-register, is selected. The control register is the on- ly register which can be addressed directly by RSO and RSI since it is

24

THE INPUT OUTPUT CHIPS

logically necessary to specify the contents of this control register prior to accessing the other registers.

Fig. 2-7: 6520 Register Selection

BUFFER A

DDRA

CRA

BUFFER B

DORB

CRB

This scheme implies that the initialization of this device is somewhat more complex than it should be, and that, if the program should need to access successively the DDRA and the IORA, additional instruc- tions must be inserted to modify the contents of bit 2 of the CRA every time. This is indeed inconvenient.

The Control Register

The contents of the control register are shown on Fig 2-8. It has al- ready been pointed out that bit 2 of this register performs a special function: it differentiates between the DDR and the IOR register for that port. The other bits within the register provide control options for the two control lines available on each port, and 2 bits are reserved for status or interrupt information. The control register A functions are controlled by bits 3, 4, and 5 and are shown on Fig 2-9.

7 6 5 4 3 2 ] 0

CA/B2 control |JDDRA/B CA/BI select contro]

Fig. 2-8: 6520 Control Registers

6502 APPLICATIONS BOOK

Handshake on read

a 2 -

eCAI interrupt input transi- tion sets CA2 high.

®Read Port A instruction sets CA2 low.

®Read Port A data sets CA2 low for one cycle (= acknowledge to device).

Manual {sets CA2 low Output

Manual [sets CA2 high Output

Handshake | °CB) interrupt input transi- on write’ | tion sets CB2 high. Write Port B data sets CB2 low..

*Write Port B data sets CB2

' low for one cycle (= acknowledge to device).

Fig. 2-10: 6520 CB2 Control

The functions of the two control lines of port B are controlled by bits 3, 4, and 5 of its control register and shown on Fig 2-10. Bits 0 and 1 provide interrupt control for the CAl and CB1 inputs. They are shown on Fig 2-11.

26

THE INPUT OUTPUT CHIPS

= ae ACTIVE TRANSITION IRQ OUTPUT OF INPUT SIGNAL

disable (high) enable (will go low when CRA bit 7 set by CA1/CBI1 transition)

disable (high)

enable (as above)

negative

negative

positive

positive

Fig 2-11: interrupt Control (CA1, CB1 Inputs)

Using the 6520

After a ‘‘RESET”’ has been applied, the contents of all the registers will be zero. The 6520 must, therefore, first be initialized to specify the input and output configurations on both its ports. The control op- tions of the control register must also be specified and the 6520 should normally be left with a ‘‘1’’ in bit position 2 of the control register, so that the IOR register can be accessed directly by the 6502.

A typical sequence is:

LDA #$0F *00001111’? = 4 INPUTS, 4 OUTPUTS STA DDRA CONFIGURE DIRECTION

LDA #CONTROL CONTROL OPTIONS: BIT 2=1 TO ADDRESS IORA

STA CRA

Input-Output

Sending data out on port A would be accomplished by the following two instructions (assuming CRA-bit 2 =‘‘1’’):

LDA #DATA OR ELSE LDA $20.(FROM

MEMORY) STA IORA

27

6502 APPLICATIONS BOOK

Reading an input connected to the 6520 is accomplished by:

LDA IORA | STA $20 SAVE IT IN MEMORY

We are saving here the contents of the accumulator immediately in memory location 20 (hexadecimal). However, this line is not indispen- sable. In many cases, we will simply read the contents of IORA in the accumulator and then perhaps check their value but not necessarily store them.

6520 Warnings

In addition to the dissimilarities between port A and port B, some specific features of the control functions should be remembered. In particular, bits 6 and 7 are cleared on A or B if 6 is input and if read- ing. Also, to clear bit 7, one reads port B data. The CB2 handshake, unlike the CA2 handshake, is for writing B data (CA2 operates for read or write). Finally, bit 6 or 7 may cause an interrupt.