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/tmp/gdb-8.1/gdb/alpha-tdep.c
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1 /* Target-dependent code for the ALPHA architecture, for GDB, the GNU Debugger.
2
3 Copyright (C) 1993-2018 Free Software Foundation, Inc.
4
5 This file is part of GDB.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
19
20 #include "defs.h"
21 #include "frame.h"
22 #include "frame-unwind.h"
23 #include "frame-base.h"
24 #include "dwarf2-frame.h"
25 #include "inferior.h"
26 #include "symtab.h"
27 #include "value.h"
28 #include "gdbcmd.h"
29 #include "gdbcore.h"
30 #include "dis-asm.h"
31 #include "symfile.h"
32 #include "objfiles.h"
33 #include "linespec.h"
34 #include "regcache.h"
35 #include "reggroups.h"
36 #include "arch-utils.h"
37 #include "osabi.h"
38 #include "block.h"
39 #include "infcall.h"
40 #include "trad-frame.h"
41
42 #include "elf-bfd.h"
43
44 #include "alpha-tdep.h"
45 #include <algorithm>
46
47 /* Instruction decoding. The notations for registers, immediates and
48 opcodes are the same as the one used in Compaq's Alpha architecture
49 handbook. */
50
51 #define INSN_OPCODE(insn) ((insn & 0xfc000000) >> 26)
52
53 /* Memory instruction format */
54 #define MEM_RA(insn) ((insn & 0x03e00000) >> 21)
55 #define MEM_RB(insn) ((insn & 0x001f0000) >> 16)
56 #define MEM_DISP(insn) \
57 (((insn & 0x8000) == 0) ? (insn & 0xffff) : -((-insn) & 0xffff))
58
59 static const int lda_opcode = 0x08;
60 static const int stq_opcode = 0x2d;
61
62 /* Branch instruction format */
63 #define BR_RA(insn) MEM_RA(insn)
64
65 static const int br_opcode = 0x30;
66 static const int bne_opcode = 0x3d;
67
68 /* Operate instruction format */
69 #define OPR_FUNCTION(insn) ((insn & 0xfe0) >> 5)
70 #define OPR_HAS_IMMEDIATE(insn) ((insn & 0x1000) == 0x1000)
71 #define OPR_RA(insn) MEM_RA(insn)
72 #define OPR_RC(insn) ((insn & 0x1f))
73 #define OPR_LIT(insn) ((insn & 0x1fe000) >> 13)
74
75 static const int subq_opcode = 0x10;
76 static const int subq_function = 0x29;
77
78
79 /* Return the name of the REGNO register.
80
81 An empty name corresponds to a register number that used to
82 be used for a virtual register. That virtual register has
83 been removed, but the index is still reserved to maintain
84 compatibility with existing remote alpha targets. */
85
86 static const char *
87 alpha_register_name (struct gdbarch *gdbarch, int regno)
88 {
89 static const char * const register_names[] =
90 {
91 "v0", "t0", "t1", "t2", "t3", "t4", "t5", "t6",
92 "t7", "s0", "s1", "s2", "s3", "s4", "s5", "fp",
93 "a0", "a1", "a2", "a3", "a4", "a5", "t8", "t9",
94 "t10", "t11", "ra", "t12", "at", "gp", "sp", "zero",
95 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
96 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
97 "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
98 "f24", "f25", "f26", "f27", "f28", "f29", "f30", "fpcr",
99 "pc", "", "unique"
100 };
101
102 if (regno < 0)
103 return NULL;
104 if (regno >= ARRAY_SIZE(register_names))
105 return NULL;
106 return register_names[regno];
107 }
108
109 static int
110 alpha_cannot_fetch_register (struct gdbarch *gdbarch, int regno)
111 {
112 return (strlen (alpha_register_name (gdbarch, regno)) == 0);
113 }
114
115 static int
116 alpha_cannot_store_register (struct gdbarch *gdbarch, int regno)
117 {
118 return (regno == ALPHA_ZERO_REGNUM
119 || strlen (alpha_register_name (gdbarch, regno)) == 0);
120 }
121
122 static struct type *
123 alpha_register_type (struct gdbarch *gdbarch, int regno)
124 {
125 if (regno == ALPHA_SP_REGNUM || regno == ALPHA_GP_REGNUM)
126 return builtin_type (gdbarch)->builtin_data_ptr;
127 if (regno == ALPHA_PC_REGNUM)
128 return builtin_type (gdbarch)->builtin_func_ptr;
129
130 /* Don't need to worry about little vs big endian until
131 some jerk tries to port to alpha-unicosmk. */
132 if (regno >= ALPHA_FP0_REGNUM && regno < ALPHA_FP0_REGNUM + 31)
133 return builtin_type (gdbarch)->builtin_double;
134
135 return builtin_type (gdbarch)->builtin_int64;
136 }
137
138 /* Is REGNUM a member of REGGROUP? */
139
140 static int
141 alpha_register_reggroup_p (struct gdbarch *gdbarch, int regnum,
142 struct reggroup *group)
143 {
144 /* Filter out any registers eliminated, but whose regnum is
145 reserved for backward compatibility, e.g. the vfp. */
146 if (gdbarch_register_name (gdbarch, regnum) == NULL
147 || *gdbarch_register_name (gdbarch, regnum) == '\0')
148 return 0;
149
150 if (group == all_reggroup)
151 return 1;
152
153 /* Zero should not be saved or restored. Technically it is a general
154 register (just as $f31 would be a float if we represented it), but
155 there's no point displaying it during "info regs", so leave it out
156 of all groups except for "all". */
157 if (regnum == ALPHA_ZERO_REGNUM)
158 return 0;
159
160 /* All other registers are saved and restored. */
161 if (group == save_reggroup || group == restore_reggroup)
162 return 1;
163
164 /* All other groups are non-overlapping. */
165
166 /* Since this is really a PALcode memory slot... */
167 if (regnum == ALPHA_UNIQUE_REGNUM)
168 return group == system_reggroup;
169
170 /* Force the FPCR to be considered part of the floating point state. */
171 if (regnum == ALPHA_FPCR_REGNUM)
172 return group == float_reggroup;
173
174 if (regnum >= ALPHA_FP0_REGNUM && regnum < ALPHA_FP0_REGNUM + 31)
175 return group == float_reggroup;
176 else
177 return group == general_reggroup;
178 }
179
180 /* The following represents exactly the conversion performed by
181 the LDS instruction. This applies to both single-precision
182 floating point and 32-bit integers. */
183
184 static void
185 alpha_lds (struct gdbarch *gdbarch, void *out, const void *in)
186 {
187 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
188 ULONGEST mem
189 = extract_unsigned_integer ((const gdb_byte *) in, 4, byte_order);
190 ULONGEST frac = (mem >> 0) & 0x7fffff;
191 ULONGEST sign = (mem >> 31) & 1;
192 ULONGEST exp_msb = (mem >> 30) & 1;
193 ULONGEST exp_low = (mem >> 23) & 0x7f;
194 ULONGEST exp, reg;
195
196 exp = (exp_msb << 10) | exp_low;
197 if (exp_msb)
198 {
199 if (exp_low == 0x7f)
200 exp = 0x7ff;
201 }
202 else
203 {
204 if (exp_low != 0x00)
205 exp |= 0x380;
206 }
207
208 reg = (sign << 63) | (exp << 52) | (frac << 29);
209 store_unsigned_integer ((gdb_byte *) out, 8, byte_order, reg);
210 }
211
212 /* Similarly, this represents exactly the conversion performed by
213 the STS instruction. */
214
215 static void
216 alpha_sts (struct gdbarch *gdbarch, void *out, const void *in)
217 {
218 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
219 ULONGEST reg, mem;
220
221 reg = extract_unsigned_integer ((const gdb_byte *) in, 8, byte_order);
222 mem = ((reg >> 32) & 0xc0000000) | ((reg >> 29) & 0x3fffffff);
223 store_unsigned_integer ((gdb_byte *) out, 4, byte_order, mem);
224 }
225
226 /* The alpha needs a conversion between register and memory format if the
227 register is a floating point register and memory format is float, as the
228 register format must be double or memory format is an integer with 4
229 bytes, as the representation of integers in floating point
230 registers is different. */
231
232 static int
233 alpha_convert_register_p (struct gdbarch *gdbarch, int regno,
234 struct type *type)
235 {
236 return (regno >= ALPHA_FP0_REGNUM && regno < ALPHA_FP0_REGNUM + 31
237 && TYPE_LENGTH (type) == 4);
238 }
239
240 static int
241 alpha_register_to_value (struct frame_info *frame, int regnum,
242 struct type *valtype, gdb_byte *out,
243 int *optimizedp, int *unavailablep)
244 {
245 struct gdbarch *gdbarch = get_frame_arch (frame);
246 struct value *value = get_frame_register_value (frame, regnum);
247
248 gdb_assert (value != NULL);
249 *optimizedp = value_optimized_out (value);
250 *unavailablep = !value_entirely_available (value);
251
252 if (*optimizedp || *unavailablep)
253 {
254 release_value (value);
255 value_free (value);
256 return 0;
257 }
258
259 /* Convert to VALTYPE. */
260
261 gdb_assert (TYPE_LENGTH (valtype) == 4);
262 alpha_sts (gdbarch, out, value_contents_all (value));
263
264 release_value (value);
265 value_free (value);
266 return 1;
267 }
268
269 static void
270 alpha_value_to_register (struct frame_info *frame, int regnum,
271 struct type *valtype, const gdb_byte *in)
272 {
273 gdb_byte out[ALPHA_REGISTER_SIZE];
274
275 gdb_assert (TYPE_LENGTH (valtype) == 4);
276 gdb_assert (register_size (get_frame_arch (frame), regnum)
277 <= ALPHA_REGISTER_SIZE);
278 alpha_lds (get_frame_arch (frame), out, in);
279
280 put_frame_register (frame, regnum, out);
281 }
282
283
284 /* The alpha passes the first six arguments in the registers, the rest on
285 the stack. The register arguments are stored in ARG_REG_BUFFER, and
286 then moved into the register file; this simplifies the passing of a
287 large struct which extends from the registers to the stack, plus avoids
288 three ptrace invocations per word.
289
290 We don't bother tracking which register values should go in integer
291 regs or fp regs; we load the same values into both.
292
293 If the called function is returning a structure, the address of the
294 structure to be returned is passed as a hidden first argument. */
295
296 static CORE_ADDR
297 alpha_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
298 struct regcache *regcache, CORE_ADDR bp_addr,
299 int nargs, struct value **args, CORE_ADDR sp,
300 int struct_return, CORE_ADDR struct_addr)
301 {
302 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
303 int i;
304 int accumulate_size = struct_return ? 8 : 0;
305 struct alpha_arg
306 {
307 const gdb_byte *contents;
308 int len;
309 int offset;
310 };
311 struct alpha_arg *alpha_args = XALLOCAVEC (struct alpha_arg, nargs);
312 struct alpha_arg *m_arg;
313 gdb_byte arg_reg_buffer[ALPHA_REGISTER_SIZE * ALPHA_NUM_ARG_REGS];
314 int required_arg_regs;
315 CORE_ADDR func_addr = find_function_addr (function, NULL);
316
317 /* The ABI places the address of the called function in T12. */
318 regcache_cooked_write_signed (regcache, ALPHA_T12_REGNUM, func_addr);
319
320 /* Set the return address register to point to the entry point
321 of the program, where a breakpoint lies in wait. */
322 regcache_cooked_write_signed (regcache, ALPHA_RA_REGNUM, bp_addr);
323
324 /* Lay out the arguments in memory. */
325 for (i = 0, m_arg = alpha_args; i < nargs; i++, m_arg++)
326 {
327 struct value *arg = args[i];
328 struct type *arg_type = check_typedef (value_type (arg));
329
330 /* Cast argument to long if necessary as the compiler does it too. */
331 switch (TYPE_CODE (arg_type))
332 {
333 case TYPE_CODE_INT:
334 case TYPE_CODE_BOOL:
335 case TYPE_CODE_CHAR:
336 case TYPE_CODE_RANGE:
337 case TYPE_CODE_ENUM:
338 if (TYPE_LENGTH (arg_type) == 4)
339 {
340 /* 32-bit values must be sign-extended to 64 bits
341 even if the base data type is unsigned. */
342 arg_type = builtin_type (gdbarch)->builtin_int32;
343 arg = value_cast (arg_type, arg);
344 }
345 if (TYPE_LENGTH (arg_type) < ALPHA_REGISTER_SIZE)
346 {
347 arg_type = builtin_type (gdbarch)->builtin_int64;
348 arg = value_cast (arg_type, arg);
349 }
350 break;
351
352 case TYPE_CODE_FLT:
353 /* "float" arguments loaded in registers must be passed in
354 register format, aka "double". */
355 if (accumulate_size < sizeof (arg_reg_buffer)
356 && TYPE_LENGTH (arg_type) == 4)
357 {
358 arg_type = builtin_type (gdbarch)->builtin_double;
359 arg = value_cast (arg_type, arg);
360 }
361 /* Tru64 5.1 has a 128-bit long double, and passes this by
362 invisible reference. No one else uses this data type. */
363 else if (TYPE_LENGTH (arg_type) == 16)
364 {
365 /* Allocate aligned storage. */
366 sp = (sp & -16) - 16;
367
368 /* Write the real data into the stack. */
369 write_memory (sp, value_contents (arg), 16);
370
371 /* Construct the indirection. */
372 arg_type = lookup_pointer_type (arg_type);
373 arg = value_from_pointer (arg_type, sp);
374 }
375 break;
376
377 case TYPE_CODE_COMPLEX:
378 /* ??? The ABI says that complex values are passed as two
379 separate scalar values. This distinction only matters
380 for complex float. However, GCC does not implement this. */
381
382 /* Tru64 5.1 has a 128-bit long double, and passes this by
383 invisible reference. */
384 if (TYPE_LENGTH (arg_type) == 32)
385 {
386 /* Allocate aligned storage. */
387 sp = (sp & -16) - 16;
388
389 /* Write the real data into the stack. */
390 write_memory (sp, value_contents (arg), 32);
391
392 /* Construct the indirection. */
393 arg_type = lookup_pointer_type (arg_type);
394 arg = value_from_pointer (arg_type, sp);
395 }
396 break;
397
398 default:
399 break;
400 }
401 m_arg->len = TYPE_LENGTH (arg_type);
402 m_arg->offset = accumulate_size;
403 accumulate_size = (accumulate_size + m_arg->len + 7) & ~7;
404 m_arg->contents = value_contents (arg);
405 }
406
407 /* Determine required argument register loads, loading an argument register
408 is expensive as it uses three ptrace calls. */
409 required_arg_regs = accumulate_size / 8;
410 if (required_arg_regs > ALPHA_NUM_ARG_REGS)
411 required_arg_regs = ALPHA_NUM_ARG_REGS;
412
413 /* Make room for the arguments on the stack. */
414 if (accumulate_size < sizeof(arg_reg_buffer))
415 accumulate_size = 0;
416 else
417 accumulate_size -= sizeof(arg_reg_buffer);
418 sp -= accumulate_size;
419
420 /* Keep sp aligned to a multiple of 16 as the ABI requires. */
421 sp &= ~15;
422
423 /* `Push' arguments on the stack. */
424 for (i = nargs; m_arg--, --i >= 0;)
425 {
426 const gdb_byte *contents = m_arg->contents;
427 int offset = m_arg->offset;
428 int len = m_arg->len;
429
430 /* Copy the bytes destined for registers into arg_reg_buffer. */
431 if (offset < sizeof(arg_reg_buffer))
432 {
433 if (offset + len <= sizeof(arg_reg_buffer))
434 {
435 memcpy (arg_reg_buffer + offset, contents, len);
436 continue;
437 }
438 else
439 {
440 int tlen = sizeof(arg_reg_buffer) - offset;
441 memcpy (arg_reg_buffer + offset, contents, tlen);
442 offset += tlen;
443 contents += tlen;
444 len -= tlen;
445 }
446 }
447
448 /* Everything else goes to the stack. */
449 write_memory (sp + offset - sizeof(arg_reg_buffer), contents, len);
450 }
451 if (struct_return)
452 store_unsigned_integer (arg_reg_buffer, ALPHA_REGISTER_SIZE,
453 byte_order, struct_addr);
454
455 /* Load the argument registers. */
456 for (i = 0; i < required_arg_regs; i++)
457 {
458 regcache_cooked_write (regcache, ALPHA_A0_REGNUM + i,
459 arg_reg_buffer + i*ALPHA_REGISTER_SIZE);
460 regcache_cooked_write (regcache, ALPHA_FPA0_REGNUM + i,
461 arg_reg_buffer + i*ALPHA_REGISTER_SIZE);
462 }
463
464 /* Finally, update the stack pointer. */
465 regcache_cooked_write_signed (regcache, ALPHA_SP_REGNUM, sp);
466
467 return sp;
468 }
469
470 /* Extract from REGCACHE the value about to be returned from a function
471 and copy it into VALBUF. */
472
473 static void
474 alpha_extract_return_value (struct type *valtype, struct regcache *regcache,
475 gdb_byte *valbuf)
476 {
477 struct gdbarch *gdbarch = regcache->arch ();
478 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
479 gdb_byte raw_buffer[ALPHA_REGISTER_SIZE];
480 ULONGEST l;
481
482 switch (TYPE_CODE (valtype))
483 {
484 case TYPE_CODE_FLT:
485 switch (TYPE_LENGTH (valtype))
486 {
487 case 4:
488 regcache_cooked_read (regcache, ALPHA_FP0_REGNUM, raw_buffer);
489 alpha_sts (gdbarch, valbuf, raw_buffer);
490 break;
491
492 case 8:
493 regcache_cooked_read (regcache, ALPHA_FP0_REGNUM, valbuf);
494 break;
495
496 case 16:
497 regcache_cooked_read_unsigned (regcache, ALPHA_V0_REGNUM, &l);
498 read_memory (l, valbuf, 16);
499 break;
500
501 default:
502 internal_error (__FILE__, __LINE__,
503 _("unknown floating point width"));
504 }
505 break;
506
507 case TYPE_CODE_COMPLEX:
508 switch (TYPE_LENGTH (valtype))
509 {
510 case 8:
511 /* ??? This isn't correct wrt the ABI, but it's what GCC does. */
512 regcache_cooked_read (regcache, ALPHA_FP0_REGNUM, valbuf);
513 break;
514
515 case 16:
516 regcache_cooked_read (regcache, ALPHA_FP0_REGNUM, valbuf);
517 regcache_cooked_read (regcache, ALPHA_FP0_REGNUM + 1, valbuf + 8);
518 break;
519
520 case 32:
521 regcache_cooked_read_unsigned (regcache, ALPHA_V0_REGNUM, &l);
522 read_memory (l, valbuf, 32);
523 break;
524
525 default:
526 internal_error (__FILE__, __LINE__,
527 _("unknown floating point width"));
528 }
529 break;
530
531 default:
532 /* Assume everything else degenerates to an integer. */
533 regcache_cooked_read_unsigned (regcache, ALPHA_V0_REGNUM, &l);
534 store_unsigned_integer (valbuf, TYPE_LENGTH (valtype), byte_order, l);
535 break;
536 }
537 }
538
539 /* Insert the given value into REGCACHE as if it was being
540 returned by a function. */
541
542 static void
543 alpha_store_return_value (struct type *valtype, struct regcache *regcache,
544 const gdb_byte *valbuf)
545 {
546 struct gdbarch *gdbarch = regcache->arch ();
547 gdb_byte raw_buffer[ALPHA_REGISTER_SIZE];
548 ULONGEST l;
549
550 switch (TYPE_CODE (valtype))
551 {
552 case TYPE_CODE_FLT:
553 switch (TYPE_LENGTH (valtype))
554 {
555 case 4:
556 alpha_lds (gdbarch, raw_buffer, valbuf);
557 regcache_cooked_write (regcache, ALPHA_FP0_REGNUM, raw_buffer);
558 break;
559
560 case 8:
561 regcache_cooked_write (regcache, ALPHA_FP0_REGNUM, valbuf);
562 break;
563
564 case 16:
565 /* FIXME: 128-bit long doubles are returned like structures:
566 by writing into indirect storage provided by the caller
567 as the first argument. */
568 error (_("Cannot set a 128-bit long double return value."));
569
570 default:
571 internal_error (__FILE__, __LINE__,
572 _("unknown floating point width"));
573 }
574 break;
575
576 case TYPE_CODE_COMPLEX:
577 switch (TYPE_LENGTH (valtype))
578 {
579 case 8:
580 /* ??? This isn't correct wrt the ABI, but it's what GCC does. */
581 regcache_cooked_write (regcache, ALPHA_FP0_REGNUM, valbuf);
582 break;
583
584 case 16:
585 regcache_cooked_write (regcache, ALPHA_FP0_REGNUM, valbuf);
586 regcache_cooked_write (regcache, ALPHA_FP0_REGNUM + 1, valbuf + 8);
587 break;
588
589 case 32:
590 /* FIXME: 128-bit long doubles are returned like structures:
591 by writing into indirect storage provided by the caller
592 as the first argument. */
593 error (_("Cannot set a 128-bit long double return value."));
594
595 default:
596 internal_error (__FILE__, __LINE__,
597 _("unknown floating point width"));
598 }
599 break;
600
601 default:
602 /* Assume everything else degenerates to an integer. */
603 /* 32-bit values must be sign-extended to 64 bits
604 even if the base data type is unsigned. */
605 if (TYPE_LENGTH (valtype) == 4)
606 valtype = builtin_type (gdbarch)->builtin_int32;
607 l = unpack_long (valtype, valbuf);
608 regcache_cooked_write_unsigned (regcache, ALPHA_V0_REGNUM, l);
609 break;
610 }
611 }
612
613 static enum return_value_convention
614 alpha_return_value (struct gdbarch *gdbarch, struct value *function,
615 struct type *type, struct regcache *regcache,
616 gdb_byte *readbuf, const gdb_byte *writebuf)
617 {
618 enum type_code code = TYPE_CODE (type);
619
620 if ((code == TYPE_CODE_STRUCT
621 || code == TYPE_CODE_UNION
622 || code == TYPE_CODE_ARRAY)
623 && gdbarch_tdep (gdbarch)->return_in_memory (type))
624 {
625 if (readbuf)
626 {
627 ULONGEST addr;
628 regcache_raw_read_unsigned (regcache, ALPHA_V0_REGNUM, &addr);
629 read_memory (addr, readbuf, TYPE_LENGTH (type));
630 }
631
632 return RETURN_VALUE_ABI_RETURNS_ADDRESS;
633 }
634
635 if (readbuf)
636 alpha_extract_return_value (type, regcache, readbuf);
637 if (writebuf)
638 alpha_store_return_value (type, regcache, writebuf);
639
640 return RETURN_VALUE_REGISTER_CONVENTION;
641 }
642
643 static int
644 alpha_return_in_memory_always (struct type *type)
645 {
646 return 1;
647 }
648
649
650 constexpr gdb_byte alpha_break_insn[] = { 0x80, 0, 0, 0 }; /* call_pal bpt */
651
652 typedef BP_MANIPULATION (alpha_break_insn) alpha_breakpoint;
653
654
655 /* This returns the PC of the first insn after the prologue.
656 If we can't find the prologue, then return 0. */
657
658 CORE_ADDR
659 alpha_after_prologue (CORE_ADDR pc)
660 {
661 struct symtab_and_line sal;
662 CORE_ADDR func_addr, func_end;
663
664 if (!find_pc_partial_function (pc, NULL, &func_addr, &func_end))
665 return 0;
666
667 sal = find_pc_line (func_addr, 0);
668 if (sal.end < func_end)
669 return sal.end;
670
671 /* The line after the prologue is after the end of the function. In this
672 case, tell the caller to find the prologue the hard way. */
673 return 0;
674 }
675
676 /* Read an instruction from memory at PC, looking through breakpoints. */
677
678 unsigned int
679 alpha_read_insn (struct gdbarch *gdbarch, CORE_ADDR pc)
680 {
681 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
682 gdb_byte buf[ALPHA_INSN_SIZE];
683 int res;
684
685 res = target_read_memory (pc, buf, sizeof (buf));
686 if (res != 0)
687 memory_error (TARGET_XFER_E_IO, pc);
688 return extract_unsigned_integer (buf, sizeof (buf), byte_order);
689 }
690
691 /* To skip prologues, I use this predicate. Returns either PC itself
692 if the code at PC does not look like a function prologue; otherwise
693 returns an address that (if we're lucky) follows the prologue. If
694 LENIENT, then we must skip everything which is involved in setting
695 up the frame (it's OK to skip more, just so long as we don't skip
696 anything which might clobber the registers which are being saved. */
697
698 static CORE_ADDR
699 alpha_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc)
700 {
701 unsigned long inst;
702 int offset;
703 CORE_ADDR post_prologue_pc;
704 gdb_byte buf[ALPHA_INSN_SIZE];
705
706 /* Silently return the unaltered pc upon memory errors.
707 This could happen on OSF/1 if decode_line_1 tries to skip the
708 prologue for quickstarted shared library functions when the
709 shared library is not yet mapped in.
710 Reading target memory is slow over serial lines, so we perform
711 this check only if the target has shared libraries (which all
712 Alpha targets do). */
713 if (target_read_memory (pc, buf, sizeof (buf)))
714 return pc;
715
716 /* See if we can determine the end of the prologue via the symbol table.
717 If so, then return either PC, or the PC after the prologue, whichever
718 is greater. */
719
720 post_prologue_pc = alpha_after_prologue (pc);
721 if (post_prologue_pc != 0)
722 return std::max (pc, post_prologue_pc);
723
724 /* Can't determine prologue from the symbol table, need to examine
725 instructions. */
726
727 /* Skip the typical prologue instructions. These are the stack adjustment
728 instruction and the instructions that save registers on the stack
729 or in the gcc frame. */
730 for (offset = 0; offset < 100; offset += ALPHA_INSN_SIZE)
731 {
732 inst = alpha_read_insn (gdbarch, pc + offset);
733
734 if ((inst & 0xffff0000) == 0x27bb0000) /* ldah $gp,n($t12) */
735 continue;
736 if ((inst & 0xffff0000) == 0x23bd0000) /* lda $gp,n($gp) */
737 continue;
738 if ((inst & 0xffff0000) == 0x23de0000) /* lda $sp,n($sp) */
739 continue;
740 if ((inst & 0xffe01fff) == 0x43c0153e) /* subq $sp,n,$sp */
741 continue;
742
743 if (((inst & 0xfc1f0000) == 0xb41e0000 /* stq reg,n($sp) */
744 || (inst & 0xfc1f0000) == 0x9c1e0000) /* stt reg,n($sp) */
745 && (inst & 0x03e00000) != 0x03e00000) /* reg != $zero */
746 continue;
747
748 if (inst == 0x47de040f) /* bis sp,sp,fp */
749 continue;
750 if (inst == 0x47fe040f) /* bis zero,sp,fp */
751 continue;
752
753 break;
754 }
755 return pc + offset;
756 }
757
758
759 static const int ldl_l_opcode = 0x2a;
760 static const int ldq_l_opcode = 0x2b;
761 static const int stl_c_opcode = 0x2e;
762 static const int stq_c_opcode = 0x2f;
763
764 /* Checks for an atomic sequence of instructions beginning with a LDL_L/LDQ_L
765 instruction and ending with a STL_C/STQ_C instruction. If such a sequence
766 is found, attempt to step through it. A breakpoint is placed at the end of
767 the sequence. */
768
769 static std::vector<CORE_ADDR>
770 alpha_deal_with_atomic_sequence (struct gdbarch *gdbarch, CORE_ADDR pc)
771 {
772 CORE_ADDR breaks[2] = {-1, -1};
773 CORE_ADDR loc = pc;
774 CORE_ADDR closing_insn; /* Instruction that closes the atomic sequence. */
775 unsigned int insn = alpha_read_insn (gdbarch, loc);
776 int insn_count;
777 int index;
778 int last_breakpoint = 0; /* Defaults to 0 (no breakpoints placed). */
779 const int atomic_sequence_length = 16; /* Instruction sequence length. */
780 int bc_insn_count = 0; /* Conditional branch instruction count. */
781
782 /* Assume all atomic sequences start with a LDL_L/LDQ_L instruction. */
783 if (INSN_OPCODE (insn) != ldl_l_opcode
784 && INSN_OPCODE (insn) != ldq_l_opcode)
785 return {};
786
787 /* Assume that no atomic sequence is longer than "atomic_sequence_length"
788 instructions. */
789 for (insn_count = 0; insn_count < atomic_sequence_length; ++insn_count)
790 {
791 loc += ALPHA_INSN_SIZE;
792 insn = alpha_read_insn (gdbarch, loc);
793
794 /* Assume that there is at most one branch in the atomic
795 sequence. If a branch is found, put a breakpoint in
796 its destination address. */
797 if (INSN_OPCODE (insn) >= br_opcode)
798 {
799 int immediate = (insn & 0x001fffff) << 2;
800
801 immediate = (immediate ^ 0x400000) - 0x400000;
802
803 if (bc_insn_count >= 1)
804 return {}; /* More than one branch found, fallback
805 to the standard single-step code. */
806
807 breaks[1] = loc + ALPHA_INSN_SIZE + immediate;
808
809 bc_insn_count++;
810 last_breakpoint++;
811 }
812
813 if (INSN_OPCODE (insn) == stl_c_opcode
814 || INSN_OPCODE (insn) == stq_c_opcode)
815 break;
816 }
817
818 /* Assume that the atomic sequence ends with a STL_C/STQ_C instruction. */
819 if (INSN_OPCODE (insn) != stl_c_opcode
820 && INSN_OPCODE (insn) != stq_c_opcode)
821 return {};
822
823 closing_insn = loc;
824 loc += ALPHA_INSN_SIZE;
825
826 /* Insert a breakpoint right after the end of the atomic sequence. */
827 breaks[0] = loc;
828
829 /* Check for duplicated breakpoints. Check also for a breakpoint
830 placed (branch instruction's destination) anywhere in sequence. */
831 if (last_breakpoint
832 && (breaks[1] == breaks[0]
833 || (breaks[1] >= pc && breaks[1] <= closing_insn)))
834 last_breakpoint = 0;
835
836 std::vector<CORE_ADDR> next_pcs;
837
838 for (index = 0; index <= last_breakpoint; index++)
839 next_pcs.push_back (breaks[index]);
840
841 return next_pcs;
842 }
843
844
845 /* Figure out where the longjmp will land.
846 We expect the first arg to be a pointer to the jmp_buf structure from
847 which we extract the PC (JB_PC) that we will land at. The PC is copied
848 into the "pc". This routine returns true on success. */
849
850 static int
851 alpha_get_longjmp_target (struct frame_info *frame, CORE_ADDR *pc)
852 {
853 struct gdbarch *gdbarch = get_frame_arch (frame);
854 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
855 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
856 CORE_ADDR jb_addr;
857 gdb_byte raw_buffer[ALPHA_REGISTER_SIZE];
858
859 jb_addr = get_frame_register_unsigned (frame, ALPHA_A0_REGNUM);
860
861 if (target_read_memory (jb_addr + (tdep->jb_pc * tdep->jb_elt_size),
862 raw_buffer, tdep->jb_elt_size))
863 return 0;
864
865 *pc = extract_unsigned_integer (raw_buffer, tdep->jb_elt_size, byte_order);
866 return 1;
867 }
868
869
870 /* Frame unwinder for signal trampolines. We use alpha tdep bits that
871 describe the location and shape of the sigcontext structure. After
872 that, all registers are in memory, so it's easy. */
873 /* ??? Shouldn't we be able to do this generically, rather than with
874 OSABI data specific to Alpha? */
875
876 struct alpha_sigtramp_unwind_cache
877 {
878 CORE_ADDR sigcontext_addr;
879 };
880
881 static struct alpha_sigtramp_unwind_cache *
882 alpha_sigtramp_frame_unwind_cache (struct frame_info *this_frame,
883 void **this_prologue_cache)
884 {
885 struct alpha_sigtramp_unwind_cache *info;
886 struct gdbarch_tdep *tdep;
887
888 if (*this_prologue_cache)
889 return (struct alpha_sigtramp_unwind_cache *) *this_prologue_cache;
890
891 info = FRAME_OBSTACK_ZALLOC (struct alpha_sigtramp_unwind_cache);
892 *this_prologue_cache = info;
893
894 tdep = gdbarch_tdep (get_frame_arch (this_frame));
895 info->sigcontext_addr = tdep->sigcontext_addr (this_frame);
896
897 return info;
898 }
899
900 /* Return the address of REGNUM in a sigtramp frame. Since this is
901 all arithmetic, it doesn't seem worthwhile to cache it. */
902
903 static CORE_ADDR
904 alpha_sigtramp_register_address (struct gdbarch *gdbarch,
905 CORE_ADDR sigcontext_addr, int regnum)
906 {
907 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
908
909 if (regnum >= 0 && regnum < 32)
910 return sigcontext_addr + tdep->sc_regs_offset + regnum * 8;
911 else if (regnum >= ALPHA_FP0_REGNUM && regnum < ALPHA_FP0_REGNUM + 32)
912 return sigcontext_addr + tdep->sc_fpregs_offset + regnum * 8;
913 else if (regnum == ALPHA_PC_REGNUM)
914 return sigcontext_addr + tdep->sc_pc_offset;
915
916 return 0;
917 }
918
919 /* Given a GDB frame, determine the address of the calling function's
920 frame. This will be used to create a new GDB frame struct. */
921
922 static void
923 alpha_sigtramp_frame_this_id (struct frame_info *this_frame,
924 void **this_prologue_cache,
925 struct frame_id *this_id)
926 {
927 struct gdbarch *gdbarch = get_frame_arch (this_frame);
928 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
929 struct alpha_sigtramp_unwind_cache *info
930 = alpha_sigtramp_frame_unwind_cache (this_frame, this_prologue_cache);
931 CORE_ADDR stack_addr, code_addr;
932
933 /* If the OSABI couldn't locate the sigcontext, give up. */
934 if (info->sigcontext_addr == 0)
935 return;
936
937 /* If we have dynamic signal trampolines, find their start.
938 If we do not, then we must assume there is a symbol record
939 that can provide the start address. */
940 if (tdep->dynamic_sigtramp_offset)
941 {
942 int offset;
943 code_addr = get_frame_pc (this_frame);
944 offset = tdep->dynamic_sigtramp_offset (gdbarch, code_addr);
945 if (offset >= 0)
946 code_addr -= offset;
947 else
948 code_addr = 0;
949 }
950 else
951 code_addr = get_frame_func (this_frame);
952
953 /* The stack address is trivially read from the sigcontext. */
954 stack_addr = alpha_sigtramp_register_address (gdbarch, info->sigcontext_addr,
955 ALPHA_SP_REGNUM);
956 stack_addr = get_frame_memory_unsigned (this_frame, stack_addr,
957 ALPHA_REGISTER_SIZE);
958
959 *this_id = frame_id_build (stack_addr, code_addr);
960 }
961
962 /* Retrieve the value of REGNUM in FRAME. Don't give up! */
963
964 static struct value *
965 alpha_sigtramp_frame_prev_register (struct frame_info *this_frame,
966 void **this_prologue_cache, int regnum)
967 {
968 struct alpha_sigtramp_unwind_cache *info
969 = alpha_sigtramp_frame_unwind_cache (this_frame, this_prologue_cache);
970 CORE_ADDR addr;
971
972 if (info->sigcontext_addr != 0)
973 {
974 /* All integer and fp registers are stored in memory. */
975 addr = alpha_sigtramp_register_address (get_frame_arch (this_frame),
976 info->sigcontext_addr, regnum);
977 if (addr != 0)
978 return frame_unwind_got_memory (this_frame, regnum, addr);
979 }
980
981 /* This extra register may actually be in the sigcontext, but our
982 current description of it in alpha_sigtramp_frame_unwind_cache
983 doesn't include it. Too bad. Fall back on whatever's in the
984 outer frame. */
985 return frame_unwind_got_register (this_frame, regnum, regnum);
986 }
987
988 static int
989 alpha_sigtramp_frame_sniffer (const struct frame_unwind *self,
990 struct frame_info *this_frame,
991 void **this_prologue_cache)
992 {
993 struct gdbarch *gdbarch = get_frame_arch (this_frame);
994 CORE_ADDR pc = get_frame_pc (this_frame);
995 const char *name;
996
997 /* NOTE: cagney/2004-04-30: Do not copy/clone this code. Instead
998 look at tramp-frame.h and other simplier per-architecture
999 sigtramp unwinders. */
1000
1001 /* We shouldn't even bother to try if the OSABI didn't register a
1002 sigcontext_addr handler or pc_in_sigtramp hander. */
1003 if (gdbarch_tdep (gdbarch)->sigcontext_addr == NULL)
1004 return 0;
1005 if (gdbarch_tdep (gdbarch)->pc_in_sigtramp == NULL)
1006 return 0;
1007
1008 /* Otherwise we should be in a signal frame. */
1009 find_pc_partial_function (pc, &name, NULL, NULL);
1010 if (gdbarch_tdep (gdbarch)->pc_in_sigtramp (gdbarch, pc, name))
1011 return 1;
1012
1013 return 0;
1014 }
1015
1016 static const struct frame_unwind alpha_sigtramp_frame_unwind = {
1017 SIGTRAMP_FRAME,
1018 default_frame_unwind_stop_reason,
1019 alpha_sigtramp_frame_this_id,
1020 alpha_sigtramp_frame_prev_register,
1021 NULL,
1022 alpha_sigtramp_frame_sniffer
1023 };
1024
1025
1026
1027 /* Heuristic_proc_start may hunt through the text section for a long
1028 time across a 2400 baud serial line. Allows the user to limit this
1029 search. */
1030 static int heuristic_fence_post = 0;
1031
1032 /* Attempt to locate the start of the function containing PC. We assume that
1033 the previous function ends with an about_to_return insn. Not foolproof by
1034 any means, since gcc is happy to put the epilogue in the middle of a
1035 function. But we're guessing anyway... */
1036
1037 static CORE_ADDR
1038 alpha_heuristic_proc_start (struct gdbarch *gdbarch, CORE_ADDR pc)
1039 {
1040 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1041 CORE_ADDR last_non_nop = pc;
1042 CORE_ADDR fence = pc - heuristic_fence_post;
1043 CORE_ADDR orig_pc = pc;
1044 CORE_ADDR func;
1045 struct inferior *inf;
1046
1047 if (pc == 0)
1048 return 0;
1049
1050 /* First see if we can find the start of the function from minimal
1051 symbol information. This can succeed with a binary that doesn't
1052 have debug info, but hasn't been stripped. */
1053 func = get_pc_function_start (pc);
1054 if (func)
1055 return func;
1056
1057 if (heuristic_fence_post == -1
1058 || fence < tdep->vm_min_address)
1059 fence = tdep->vm_min_address;
1060
1061 /* Search back for previous return; also stop at a 0, which might be
1062 seen for instance before the start of a code section. Don't include
1063 nops, since this usually indicates padding between functions. */
1064 for (pc -= ALPHA_INSN_SIZE; pc >= fence; pc -= ALPHA_INSN_SIZE)
1065 {
1066 unsigned int insn = alpha_read_insn (gdbarch, pc);
1067 switch (insn)
1068 {
1069 case 0: /* invalid insn */
1070 case 0x6bfa8001: /* ret $31,($26),1 */
1071 return last_non_nop;
1072
1073 case 0x2ffe0000: /* unop: ldq_u $31,0($30) */
1074 case 0x47ff041f: /* nop: bis $31,$31,$31 */
1075 break;
1076
1077 default:
1078 last_non_nop = pc;
1079 break;
1080 }
1081 }
1082
1083 inf = current_inferior ();
1084
1085 /* It's not clear to me why we reach this point when stopping quietly,
1086 but with this test, at least we don't print out warnings for every
1087 child forked (eg, on decstation). 22apr93 rich@cygnus.com. */
1088 if (inf->control.stop_soon == NO_STOP_QUIETLY)
1089 {
1090 static int blurb_printed = 0;
1091
1092 if (fence == tdep->vm_min_address)
1093 warning (_("Hit beginning of text section without finding \
1094 enclosing function for address %s"), paddress (gdbarch, orig_pc));
1095 else
1096 warning (_("Hit heuristic-fence-post without finding \
1097 enclosing function for address %s"), paddress (gdbarch, orig_pc));
1098
1099 if (!blurb_printed)
1100 {
1101 printf_filtered (_("\
1102 This warning occurs if you are debugging a function without any symbols\n\
1103 (for example, in a stripped executable). In that case, you may wish to\n\
1104 increase the size of the search with the `set heuristic-fence-post' command.\n\
1105 \n\
1106 Otherwise, you told GDB there was a function where there isn't one, or\n\
1107 (more likely) you have encountered a bug in GDB.\n"));
1108 blurb_printed = 1;
1109 }
1110 }
1111
1112 return 0;
1113 }
1114
1115 /* Fallback alpha frame unwinder. Uses instruction scanning and knows
1116 something about the traditional layout of alpha stack frames. */
1117
1118 struct alpha_heuristic_unwind_cache
1119 {
1120 CORE_ADDR vfp;
1121 CORE_ADDR start_pc;
1122 struct trad_frame_saved_reg *saved_regs;
1123 int return_reg;
1124 };
1125
1126 /* If a probing loop sequence starts at PC, simulate it and compute
1127 FRAME_SIZE and PC after its execution. Otherwise, return with PC and
1128 FRAME_SIZE unchanged. */
1129
1130 static void
1131 alpha_heuristic_analyze_probing_loop (struct gdbarch *gdbarch, CORE_ADDR *pc,
1132 int *frame_size)
1133 {
1134 CORE_ADDR cur_pc = *pc;
1135 int cur_frame_size = *frame_size;
1136 int nb_of_iterations, reg_index, reg_probe;
1137 unsigned int insn;
1138
1139 /* The following pattern is recognized as a probing loop:
1140
1141 lda REG_INDEX,NB_OF_ITERATIONS
1142 lda REG_PROBE,<immediate>(sp)
1143
1144 LOOP_START:
1145 stq zero,<immediate>(REG_PROBE)
1146 subq REG_INDEX,0x1,REG_INDEX
1147 lda REG_PROBE,<immediate>(REG_PROBE)
1148 bne REG_INDEX, LOOP_START
1149
1150 lda sp,<immediate>(REG_PROBE)
1151
1152 If anything different is found, the function returns without
1153 changing PC and FRAME_SIZE. Otherwise, PC will point immediately
1154 after this sequence, and FRAME_SIZE will be updated. */
1155
1156 /* lda REG_INDEX,NB_OF_ITERATIONS */
1157
1158 insn = alpha_read_insn (gdbarch, cur_pc);
1159 if (INSN_OPCODE (insn) != lda_opcode)
1160 return;
1161 reg_index = MEM_RA (insn);
1162 nb_of_iterations = MEM_DISP (insn);
1163
1164 /* lda REG_PROBE,<immediate>(sp) */
1165
1166 cur_pc += ALPHA_INSN_SIZE;
1167 insn = alpha_read_insn (gdbarch, cur_pc);
1168 if (INSN_OPCODE (insn) != lda_opcode
1169 || MEM_RB (insn) != ALPHA_SP_REGNUM)
1170 return;
1171 reg_probe = MEM_RA (insn);
1172 cur_frame_size -= MEM_DISP (insn);
1173
1174 /* stq zero,<immediate>(REG_PROBE) */
1175
1176 cur_pc += ALPHA_INSN_SIZE;
1177 insn = alpha_read_insn (gdbarch, cur_pc);
1178 if (INSN_OPCODE (insn) != stq_opcode
1179 || MEM_RA (insn) != 0x1f
1180 || MEM_RB (insn) != reg_probe)
1181 return;
1182
1183 /* subq REG_INDEX,0x1,REG_INDEX */
1184
1185 cur_pc += ALPHA_INSN_SIZE;
1186 insn = alpha_read_insn (gdbarch, cur_pc);
1187 if (INSN_OPCODE (insn) != subq_opcode
1188 || !OPR_HAS_IMMEDIATE (insn)
1189 || OPR_FUNCTION (insn) != subq_function
1190 || OPR_LIT(insn) != 1
1191 || OPR_RA (insn) != reg_index
1192 || OPR_RC (insn) != reg_index)
1193 return;
1194
1195 /* lda REG_PROBE,<immediate>(REG_PROBE) */
1196
1197 cur_pc += ALPHA_INSN_SIZE;
1198 insn = alpha_read_insn (gdbarch, cur_pc);
1199 if (INSN_OPCODE (insn) != lda_opcode
1200 || MEM_RA (insn) != reg_probe
1201 || MEM_RB (insn) != reg_probe)
1202 return;
1203 cur_frame_size -= MEM_DISP (insn) * nb_of_iterations;
1204
1205 /* bne REG_INDEX, LOOP_START */
1206
1207 cur_pc += ALPHA_INSN_SIZE;
1208 insn = alpha_read_insn (gdbarch, cur_pc);
1209 if (INSN_OPCODE (insn) != bne_opcode
1210 || MEM_RA (insn) != reg_index)
1211 return;
1212
1213 /* lda sp,<immediate>(REG_PROBE) */
1214
1215 cur_pc += ALPHA_INSN_SIZE;
1216 insn = alpha_read_insn (gdbarch, cur_pc);
1217 if (INSN_OPCODE (insn) != lda_opcode
1218 || MEM_RA (insn) != ALPHA_SP_REGNUM
1219 || MEM_RB (insn) != reg_probe)
1220 return;
1221 cur_frame_size -= MEM_DISP (insn);
1222
1223 *pc = cur_pc;
1224 *frame_size = cur_frame_size;
1225 }
1226
1227 static struct alpha_heuristic_unwind_cache *
1228 alpha_heuristic_frame_unwind_cache (struct frame_info *this_frame,
1229 void **this_prologue_cache,
1230 CORE_ADDR start_pc)
1231 {
1232 struct gdbarch *gdbarch = get_frame_arch (this_frame);
1233 struct alpha_heuristic_unwind_cache *info;
1234 ULONGEST val;
1235 CORE_ADDR limit_pc, cur_pc;
1236 int frame_reg, frame_size, return_reg, reg;
1237
1238 if (*this_prologue_cache)
1239 return (struct alpha_heuristic_unwind_cache *) *this_prologue_cache;
1240
1241 info = FRAME_OBSTACK_ZALLOC (struct alpha_heuristic_unwind_cache);
1242 *this_prologue_cache = info;
1243 info->saved_regs = trad_frame_alloc_saved_regs (this_frame);
1244
1245 limit_pc = get_frame_pc (this_frame);
1246 if (start_pc == 0)
1247 start_pc = alpha_heuristic_proc_start (gdbarch, limit_pc);
1248 info->start_pc = start_pc;
1249
1250 frame_reg = ALPHA_SP_REGNUM;
1251 frame_size = 0;
1252 return_reg = -1;
1253
1254 /* If we've identified a likely place to start, do code scanning. */
1255 if (start_pc != 0)
1256 {
1257 /* Limit the forward search to 50 instructions. */
1258 if (start_pc + 200 < limit_pc)
1259 limit_pc = start_pc + 200;
1260
1261 for (cur_pc = start_pc; cur_pc < limit_pc; cur_pc += ALPHA_INSN_SIZE)
1262 {
1263 unsigned int word = alpha_read_insn (gdbarch, cur_pc);
1264
1265 if ((word & 0xffff0000) == 0x23de0000) /* lda $sp,n($sp) */
1266 {
1267 if (word & 0x8000)
1268 {
1269 /* Consider only the first stack allocation instruction
1270 to contain the static size of the frame. */
1271 if (frame_size == 0)
1272 frame_size = (-word) & 0xffff;
1273 }
1274 else
1275 {
1276 /* Exit loop if a positive stack adjustment is found, which
1277 usually means that the stack cleanup code in the function
1278 epilogue is reached. */
1279 break;
1280 }
1281 }
1282 else if ((word & 0xfc1f0000) == 0xb41e0000) /* stq reg,n($sp) */
1283 {
1284 reg = (word & 0x03e00000) >> 21;
1285
1286 /* Ignore this instruction if we have already encountered
1287 an instruction saving the same register earlier in the
1288 function code. The current instruction does not tell
1289 us where the original value upon function entry is saved.
1290 All it says is that the function we are scanning reused
1291 that register for some computation of its own, and is now
1292 saving its result. */
1293 if (trad_frame_addr_p(info->saved_regs, reg))
1294 continue;
1295
1296 if (reg == 31)
1297 continue;
1298
1299 /* Do not compute the address where the register was saved yet,
1300 because we don't know yet if the offset will need to be
1301 relative to $sp or $fp (we can not compute the address
1302 relative to $sp if $sp is updated during the execution of
1303 the current subroutine, for instance when doing some alloca).
1304 So just store the offset for the moment, and compute the
1305 address later when we know whether this frame has a frame
1306 pointer or not. */
1307 /* Hack: temporarily add one, so that the offset is non-zero
1308 and we can tell which registers have save offsets below. */
1309 info->saved_regs[reg].addr = (word & 0xffff) + 1;
1310
1311 /* Starting with OSF/1-3.2C, the system libraries are shipped
1312 without local symbols, but they still contain procedure
1313 descriptors without a symbol reference. GDB is currently
1314 unable to find these procedure descriptors and uses
1315 heuristic_proc_desc instead.
1316 As some low level compiler support routines (__div*, __add*)
1317 use a non-standard return address register, we have to
1318 add some heuristics to determine the return address register,
1319 or stepping over these routines will fail.
1320 Usually the return address register is the first register
1321 saved on the stack, but assembler optimization might
1322 rearrange the register saves.
1323 So we recognize only a few registers (t7, t9, ra) within
1324 the procedure prologue as valid return address registers.
1325 If we encounter a return instruction, we extract the
1326 return address register from it.
1327
1328 FIXME: Rewriting GDB to access the procedure descriptors,
1329 e.g. via the minimal symbol table, might obviate this
1330 hack. */
1331 if (return_reg == -1
1332 && cur_pc < (start_pc + 80)
1333 && (reg == ALPHA_T7_REGNUM
1334 || reg == ALPHA_T9_REGNUM
1335 || reg == ALPHA_RA_REGNUM))
1336 return_reg = reg;
1337 }
1338 else if ((word & 0xffe0ffff) == 0x6be08001) /* ret zero,reg,1 */
1339 return_reg = (word >> 16) & 0x1f;
1340 else if (word == 0x47de040f) /* bis sp,sp,fp */
1341 frame_reg = ALPHA_GCC_FP_REGNUM;
1342 else if (word == 0x47fe040f) /* bis zero,sp,fp */
1343 frame_reg = ALPHA_GCC_FP_REGNUM;
1344
1345 alpha_heuristic_analyze_probing_loop (gdbarch, &cur_pc, &frame_size);
1346 }
1347
1348 /* If we haven't found a valid return address register yet, keep
1349 searching in the procedure prologue. */
1350 if (return_reg == -1)
1351 {
1352 while (cur_pc < (limit_pc + 80) && cur_pc < (start_pc + 80))
1353 {
1354 unsigned int word = alpha_read_insn (gdbarch, cur_pc);
1355
1356 if ((word & 0xfc1f0000) == 0xb41e0000) /* stq reg,n($sp) */
1357 {
1358 reg = (word & 0x03e00000) >> 21;
1359 if (reg == ALPHA_T7_REGNUM
1360 || reg == ALPHA_T9_REGNUM
1361 || reg == ALPHA_RA_REGNUM)
1362 {
1363 return_reg = reg;
1364 break;
1365 }
1366 }
1367 else if ((word & 0xffe0ffff) == 0x6be08001) /* ret zero,reg,1 */
1368 {
1369 return_reg = (word >> 16) & 0x1f;
1370 break;
1371 }
1372
1373 cur_pc += ALPHA_INSN_SIZE;
1374 }
1375 }
1376 }
1377
1378 /* Failing that, do default to the customary RA. */
1379 if (return_reg == -1)
1380 return_reg = ALPHA_RA_REGNUM;
1381 info->return_reg = return_reg;
1382
1383 val = get_frame_register_unsigned (this_frame, frame_reg);
1384 info->vfp = val + frame_size;
1385
1386 /* Convert offsets to absolute addresses. See above about adding
1387 one to the offsets to make all detected offsets non-zero. */
1388 for (reg = 0; reg < ALPHA_NUM_REGS; ++reg)
1389 if (trad_frame_addr_p(info->saved_regs, reg))
1390 info->saved_regs[reg].addr += val - 1;
1391
1392 /* The stack pointer of the previous frame is computed by popping
1393 the current stack frame. */
1394 if (!trad_frame_addr_p (info->saved_regs, ALPHA_SP_REGNUM))
1395 trad_frame_set_value (info->saved_regs, ALPHA_SP_REGNUM, info->vfp);
1396
1397 return info;
1398 }
1399
1400 /* Given a GDB frame, determine the address of the calling function's
1401 frame. This will be used to create a new GDB frame struct. */
1402
1403 static void
1404 alpha_heuristic_frame_this_id (struct frame_info *this_frame,
1405 void **this_prologue_cache,
1406 struct frame_id *this_id)
1407 {
1408 struct alpha_heuristic_unwind_cache *info
1409 = alpha_heuristic_frame_unwind_cache (this_frame, this_prologue_cache, 0);
1410
1411 *this_id = frame_id_build (info->vfp, info->start_pc);
1412 }
1413
1414 /* Retrieve the value of REGNUM in FRAME. Don't give up! */
1415
1416 static struct value *
1417 alpha_heuristic_frame_prev_register (struct frame_info *this_frame,
1418 void **this_prologue_cache, int regnum)
1419 {
1420 struct alpha_heuristic_unwind_cache *info
1421 = alpha_heuristic_frame_unwind_cache (this_frame, this_prologue_cache, 0);
1422
1423 /* The PC of the previous frame is stored in the link register of
1424 the current frame. Frob regnum so that we pull the value from
1425 the correct place. */
1426 if (regnum == ALPHA_PC_REGNUM)
1427 regnum = info->return_reg;
1428
1429 return trad_frame_get_prev_register (this_frame, info->saved_regs, regnum);
1430 }
1431
1432 static const struct frame_unwind alpha_heuristic_frame_unwind = {
1433 NORMAL_FRAME,
1434 default_frame_unwind_stop_reason,
1435 alpha_heuristic_frame_this_id,
1436 alpha_heuristic_frame_prev_register,
1437 NULL,
1438 default_frame_sniffer
1439 };
1440
1441 static CORE_ADDR
1442 alpha_heuristic_frame_base_address (struct frame_info *this_frame,
1443 void **this_prologue_cache)
1444 {
1445 struct alpha_heuristic_unwind_cache *info
1446 = alpha_heuristic_frame_unwind_cache (this_frame, this_prologue_cache, 0);
1447
1448 return info->vfp;
1449 }
1450
1451 static const struct frame_base alpha_heuristic_frame_base = {
1452 &alpha_heuristic_frame_unwind,
1453 alpha_heuristic_frame_base_address,
1454 alpha_heuristic_frame_base_address,
1455 alpha_heuristic_frame_base_address
1456 };
1457
1458 /* Just like reinit_frame_cache, but with the right arguments to be
1459 callable as an sfunc. Used by the "set heuristic-fence-post" command. */
1460
1461 static void
1462 reinit_frame_cache_sfunc (const char *args,
1463 int from_tty, struct cmd_list_element *c)
1464 {
1465 reinit_frame_cache ();
1466 }
1467
1468
1469 /* Assuming NEXT_FRAME->prev is a dummy, return the frame ID of that
1470 dummy frame. The frame ID's base needs to match the TOS value
1471 saved by save_dummy_frame_tos(), and the PC match the dummy frame's
1472 breakpoint. */
1473
1474 static struct frame_id
1475 alpha_dummy_id (struct gdbarch *gdbarch, struct frame_info *this_frame)
1476 {
1477 ULONGEST base;
1478 base = get_frame_register_unsigned (this_frame, ALPHA_SP_REGNUM);
1479 return frame_id_build (base, get_frame_pc (this_frame));
1480 }
1481
1482 static CORE_ADDR
1483 alpha_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
1484 {
1485 ULONGEST pc;
1486 pc = frame_unwind_register_unsigned (next_frame, ALPHA_PC_REGNUM);
1487 return pc;
1488 }
1489
1490
1491 /* Helper routines for alpha*-nat.c files to move register sets to and
1492 from core files. The UNIQUE pointer is allowed to be NULL, as most
1493 targets don't supply this value in their core files. */
1494
1495 void
1496 alpha_supply_int_regs (struct regcache *regcache, int regno,
1497 const void *r0_r30, const void *pc, const void *unique)
1498 {
1499 const gdb_byte *regs = (const gdb_byte *) r0_r30;
1500 int i;
1501
1502 for (i = 0; i < 31; ++i)
1503 if (regno == i || regno == -1)
1504 regcache_raw_supply (regcache, i, regs + i * 8);
1505
1506 if (regno == ALPHA_ZERO_REGNUM || regno == -1)
1507 {
1508 const gdb_byte zero[8] = { 0 };
1509
1510 regcache_raw_supply (regcache, ALPHA_ZERO_REGNUM, zero);
1511 }
1512
1513 if (regno == ALPHA_PC_REGNUM || regno == -1)
1514 regcache_raw_supply (regcache, ALPHA_PC_REGNUM, pc);
1515
1516 if (regno == ALPHA_UNIQUE_REGNUM || regno == -1)
1517 regcache_raw_supply (regcache, ALPHA_UNIQUE_REGNUM, unique);
1518 }
1519
1520 void
1521 alpha_fill_int_regs (const struct regcache *regcache,
1522 int regno, void *r0_r30, void *pc, void *unique)
1523 {
1524 gdb_byte *regs = (gdb_byte *) r0_r30;
1525 int i;
1526
1527 for (i = 0; i < 31; ++i)
1528 if (regno == i || regno == -1)
1529 regcache_raw_collect (regcache, i, regs + i * 8);
1530
1531 if (regno == ALPHA_PC_REGNUM || regno == -1)
1532 regcache_raw_collect (regcache, ALPHA_PC_REGNUM, pc);
1533
1534 if (unique && (regno == ALPHA_UNIQUE_REGNUM || regno == -1))
1535 regcache_raw_collect (regcache, ALPHA_UNIQUE_REGNUM, unique);
1536 }
1537
1538 void
1539 alpha_supply_fp_regs (struct regcache *regcache, int regno,
1540 const void *f0_f30, const void *fpcr)
1541 {
1542 const gdb_byte *regs = (const gdb_byte *) f0_f30;
1543 int i;
1544
1545 for (i = ALPHA_FP0_REGNUM; i < ALPHA_FP0_REGNUM + 31; ++i)
1546 if (regno == i || regno == -1)
1547 regcache_raw_supply (regcache, i,
1548 regs + (i - ALPHA_FP0_REGNUM) * 8);
1549
1550 if (regno == ALPHA_FPCR_REGNUM || regno == -1)
1551 regcache_raw_supply (regcache, ALPHA_FPCR_REGNUM, fpcr);
1552 }
1553
1554 void
1555 alpha_fill_fp_regs (const struct regcache *regcache,
1556 int regno, void *f0_f30, void *fpcr)
1557 {
1558 gdb_byte *regs = (gdb_byte *) f0_f30;
1559 int i;
1560
1561 for (i = ALPHA_FP0_REGNUM; i < ALPHA_FP0_REGNUM + 31; ++i)
1562 if (regno == i || regno == -1)
1563 regcache_raw_collect (regcache, i,
1564 regs + (i - ALPHA_FP0_REGNUM) * 8);
1565
1566 if (regno == ALPHA_FPCR_REGNUM || regno == -1)
1567 regcache_raw_collect (regcache, ALPHA_FPCR_REGNUM, fpcr);
1568 }
1569
1570
1571
1572 /* Return nonzero if the G_floating register value in REG is equal to
1573 zero for FP control instructions. */
1574
1575 static int
1576 fp_register_zero_p (LONGEST reg)
1577 {
1578 /* Check that all bits except the sign bit are zero. */
1579 const LONGEST zero_mask = ((LONGEST) 1 << 63) ^ -1;
1580
1581 return ((reg & zero_mask) == 0);
1582 }
1583
1584 /* Return the value of the sign bit for the G_floating register
1585 value held in REG. */
1586
1587 static int
1588 fp_register_sign_bit (LONGEST reg)
1589 {
1590 const LONGEST sign_mask = (LONGEST) 1 << 63;
1591
1592 return ((reg & sign_mask) != 0);
1593 }
1594
1595 /* alpha_software_single_step() is called just before we want to resume
1596 the inferior, if we want to single-step it but there is no hardware
1597 or kernel single-step support (NetBSD on Alpha, for example). We find
1598 the target of the coming instruction and breakpoint it. */
1599
1600 static CORE_ADDR
1601 alpha_next_pc (struct regcache *regcache, CORE_ADDR pc)
1602 {
1603 struct gdbarch *gdbarch = regcache->arch ();
1604 unsigned int insn;
1605 unsigned int op;
1606 int regno;
1607 int offset;
1608 LONGEST rav;
1609
1610 insn = alpha_read_insn (gdbarch, pc);
1611
1612 /* Opcode is top 6 bits. */
1613 op = (insn >> 26) & 0x3f;
1614
1615 if (op == 0x1a)
1616 {
1617 /* Jump format: target PC is:
1618 RB & ~3 */
1619 return (regcache_raw_get_unsigned (regcache, (insn >> 16) & 0x1f) & ~3);
1620 }
1621
1622 if ((op & 0x30) == 0x30)
1623 {
1624 /* Branch format: target PC is:
1625 (new PC) + (4 * sext(displacement)) */
1626 if (op == 0x30 /* BR */
1627 || op == 0x34) /* BSR */
1628 {
1629 branch_taken:
1630 offset = (insn & 0x001fffff);
1631 if (offset & 0x00100000)
1632 offset |= 0xffe00000;
1633 offset *= ALPHA_INSN_SIZE;
1634 return (pc + ALPHA_INSN_SIZE + offset);
1635 }
1636
1637 /* Need to determine if branch is taken; read RA. */
1638 regno = (insn >> 21) & 0x1f;
1639 switch (op)
1640 {
1641 case 0x31: /* FBEQ */
1642 case 0x36: /* FBGE */
1643 case 0x37: /* FBGT */
1644 case 0x33: /* FBLE */
1645 case 0x32: /* FBLT */
1646 case 0x35: /* FBNE */
1647 regno += gdbarch_fp0_regnum (gdbarch);
1648 }
1649
1650 rav = regcache_raw_get_signed (regcache, regno);
1651
1652 switch (op)
1653 {
1654 case 0x38: /* BLBC */
1655 if ((rav & 1) == 0)
1656 goto branch_taken;
1657 break;
1658 case 0x3c: /* BLBS */
1659 if (rav & 1)
1660 goto branch_taken;
1661 break;
1662 case 0x39: /* BEQ */
1663 if (rav == 0)
1664 goto branch_taken;
1665 break;
1666 case 0x3d: /* BNE */
1667 if (rav != 0)
1668 goto branch_taken;
1669 break;
1670 case 0x3a: /* BLT */
1671 if (rav < 0)
1672 goto branch_taken;
1673 break;
1674 case 0x3b: /* BLE */
1675 if (rav <= 0)
1676 goto branch_taken;
1677 break;
1678 case 0x3f: /* BGT */
1679 if (rav > 0)
1680 goto branch_taken;
1681 break;
1682 case 0x3e: /* BGE */
1683 if (rav >= 0)
1684 goto branch_taken;
1685 break;
1686
1687 /* Floating point branches. */
1688
1689 case 0x31: /* FBEQ */
1690 if (fp_register_zero_p (rav))
1691 goto branch_taken;
1692 break;
1693 case 0x36: /* FBGE */
1694 if (fp_register_sign_bit (rav) == 0 || fp_register_zero_p (rav))
1695 goto branch_taken;
1696 break;
1697 case 0x37: /* FBGT */
1698 if (fp_register_sign_bit (rav) == 0 && ! fp_register_zero_p (rav))
1699 goto branch_taken;
1700 break;
1701 case 0x33: /* FBLE */
1702 if (fp_register_sign_bit (rav) == 1 || fp_register_zero_p (rav))
1703 goto branch_taken;
1704 break;
1705 case 0x32: /* FBLT */
1706 if (fp_register_sign_bit (rav) == 1 && ! fp_register_zero_p (rav))
1707 goto branch_taken;
1708 break;
1709 case 0x35: /* FBNE */
1710 if (! fp_register_zero_p (rav))
1711 goto branch_taken;
1712 break;
1713 }
1714 }
1715
1716 /* Not a branch or branch not taken; target PC is:
1717 pc + 4 */
1718 return (pc + ALPHA_INSN_SIZE);
1719 }
1720
1721 std::vector<CORE_ADDR>
1722 alpha_software_single_step (struct regcache *regcache)
1723 {
1724 struct gdbarch *gdbarch = regcache->arch ();
1725
1726 CORE_ADDR pc = regcache_read_pc (regcache);
1727
1728 std::vector<CORE_ADDR> next_pcs
1729 = alpha_deal_with_atomic_sequence (gdbarch, pc);
1730 if (!next_pcs.empty ())
1731 return next_pcs;
1732
1733 CORE_ADDR next_pc = alpha_next_pc (regcache, pc);
1734 return {next_pc};
1735 }
1736
1737
1738 /* Initialize the current architecture based on INFO. If possible, re-use an
1739 architecture from ARCHES, which is a list of architectures already created
1740 during this debugging session.
1741
1742 Called e.g. at program startup, when reading a core file, and when reading
1743 a binary file. */
1744
1745 static struct gdbarch *
1746 alpha_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
1747 {
1748 struct gdbarch_tdep *tdep;
1749 struct gdbarch *gdbarch;
1750
1751 /* Find a candidate among extant architectures. */
1752 arches = gdbarch_list_lookup_by_info (arches, &info);
1753 if (arches != NULL)
1754 return arches->gdbarch;
1755
1756 tdep = XCNEW (struct gdbarch_tdep);
1757 gdbarch = gdbarch_alloc (&info, tdep);
1758
1759 /* Lowest text address. This is used by heuristic_proc_start()
1760 to decide when to stop looking. */
1761 tdep->vm_min_address = (CORE_ADDR) 0x120000000LL;
1762
1763 tdep->dynamic_sigtramp_offset = NULL;
1764 tdep->sigcontext_addr = NULL;
1765 tdep->sc_pc_offset = 2 * 8;
1766 tdep->sc_regs_offset = 4 * 8;
1767 tdep->sc_fpregs_offset = tdep->sc_regs_offset + 32 * 8 + 8;
1768
1769 tdep->jb_pc = -1; /* longjmp support not enabled by default. */
1770
1771 tdep->return_in_memory = alpha_return_in_memory_always;
1772
1773 /* Type sizes */
1774 set_gdbarch_short_bit (gdbarch, 16);
1775 set_gdbarch_int_bit (gdbarch, 32);
1776 set_gdbarch_long_bit (gdbarch, 64);
1777 set_gdbarch_long_long_bit (gdbarch, 64);
1778 set_gdbarch_wchar_bit (gdbarch, 64);
1779 set_gdbarch_wchar_signed (gdbarch, 0);
1780 set_gdbarch_float_bit (gdbarch, 32);
1781 set_gdbarch_double_bit (gdbarch, 64);
1782 set_gdbarch_long_double_bit (gdbarch, 64);
1783 set_gdbarch_ptr_bit (gdbarch, 64);
1784
1785 /* Register info */
1786 set_gdbarch_num_regs (gdbarch, ALPHA_NUM_REGS);
1787 set_gdbarch_sp_regnum (gdbarch, ALPHA_SP_REGNUM);
1788 set_gdbarch_pc_regnum (gdbarch, ALPHA_PC_REGNUM);
1789 set_gdbarch_fp0_regnum (gdbarch, ALPHA_FP0_REGNUM);
1790
1791 set_gdbarch_register_name (gdbarch, alpha_register_name);
1792 set_gdbarch_register_type (gdbarch, alpha_register_type);
1793
1794 set_gdbarch_cannot_fetch_register (gdbarch, alpha_cannot_fetch_register);
1795 set_gdbarch_cannot_store_register (gdbarch, alpha_cannot_store_register);
1796
1797 set_gdbarch_convert_register_p (gdbarch, alpha_convert_register_p);
1798 set_gdbarch_register_to_value (gdbarch, alpha_register_to_value);
1799 set_gdbarch_value_to_register (gdbarch, alpha_value_to_register);
1800
1801 set_gdbarch_register_reggroup_p (gdbarch, alpha_register_reggroup_p);
1802
1803 /* Prologue heuristics. */
1804 set_gdbarch_skip_prologue (gdbarch, alpha_skip_prologue);
1805
1806 /* Call info. */
1807
1808 set_gdbarch_return_value (gdbarch, alpha_return_value);
1809
1810 /* Settings for calling functions in the inferior. */
1811 set_gdbarch_push_dummy_call (gdbarch, alpha_push_dummy_call);
1812
1813 /* Methods for saving / extracting a dummy frame's ID. */
1814 set_gdbarch_dummy_id (gdbarch, alpha_dummy_id);
1815
1816 /* Return the unwound PC value. */
1817 set_gdbarch_unwind_pc (gdbarch, alpha_unwind_pc);
1818
1819 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
1820 set_gdbarch_skip_trampoline_code (gdbarch, find_solib_trampoline_target);
1821
1822 set_gdbarch_breakpoint_kind_from_pc (gdbarch,
1823 alpha_breakpoint::kind_from_pc);
1824 set_gdbarch_sw_breakpoint_from_kind (gdbarch,
1825 alpha_breakpoint::bp_from_kind);
1826 set_gdbarch_decr_pc_after_break (gdbarch, ALPHA_INSN_SIZE);
1827 set_gdbarch_cannot_step_breakpoint (gdbarch, 1);
1828
1829 /* Handles single stepping of atomic sequences. */
1830 set_gdbarch_software_single_step (gdbarch, alpha_software_single_step);
1831
1832 /* Hook in ABI-specific overrides, if they have been registered. */
1833 gdbarch_init_osabi (info, gdbarch);
1834
1835 /* Now that we have tuned the configuration, set a few final things
1836 based on what the OS ABI has told us. */
1837
1838 if (tdep->jb_pc >= 0)
1839 set_gdbarch_get_longjmp_target (gdbarch, alpha_get_longjmp_target);
1840
1841 frame_unwind_append_unwinder (gdbarch, &alpha_sigtramp_frame_unwind);
1842 frame_unwind_append_unwinder (gdbarch, &alpha_heuristic_frame_unwind);
1843
1844 frame_base_set_default (gdbarch, &alpha_heuristic_frame_base);
1845
1846 return gdbarch;
1847 }
1848
1849 void
1850 alpha_dwarf2_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch)
1851 {
1852 dwarf2_append_unwinders (gdbarch);
1853 frame_base_append_sniffer (gdbarch, dwarf2_frame_base_sniffer);
1854 }
1855
1856 void
1857 _initialize_alpha_tdep (void)
1858 {
1859
1860 gdbarch_register (bfd_arch_alpha, alpha_gdbarch_init, NULL);
1861
1862 /* Let the user set the fence post for heuristic_proc_start. */
1863
1864 /* We really would like to have both "0" and "unlimited" work, but
1865 command.c doesn't deal with that. So make it a var_zinteger
1866 because the user can always use "999999" or some such for unlimited. */
1867 /* We need to throw away the frame cache when we set this, since it
1868 might change our ability to get backtraces. */
1869 add_setshow_zinteger_cmd ("heuristic-fence-post", class_support,
1870 &heuristic_fence_post, _("\
1871 Set the distance searched for the start of a function."), _("\
1872 Show the distance searched for the start of a function."), _("\
1873 If you are debugging a stripped executable, GDB needs to search through the\n\
1874 program for the start of a function. This command sets the distance of the\n\
1875 search. The only need to set it is when debugging a stripped executable."),
1876 reinit_frame_cache_sfunc,
1877 NULL, /* FIXME: i18n: The distance searched for
1878 the start of a function is \"%d\". */
1879 &setlist, &showlist);
1880 }
set_gdbarch_num_regs
void set_gdbarch_num_regs(struct gdbarch *gdbarch, int num_regs)
Definition: gdbarch.c:2050
gdbarch
Definition: gdbarch.c:127
set_gdbarch_double_bit
void set_gdbarch_double_bit(struct gdbarch *gdbarch, int double_bit)
Definition: gdbarch.c:1723
set_gdbarch_cannot_fetch_register
void set_gdbarch_cannot_fetch_register(struct gdbarch *gdbarch, gdbarch_cannot_fetch_register_ftype cannot_fetch_register)
Definition: gdbarch.c:2531
MEM_DISP
#define MEM_DISP(insn)
Definition: alpha-tdep.c:56
set_gdbarch_value_to_register
void set_gdbarch_value_to_register(struct gdbarch *gdbarch, gdbarch_value_to_register_ftype value_to_register)
Definition: gdbarch.c:2639
TYPE_CODE_BOOL
Definition: gdbtypes.h:164
extract_bp_kind::loc
ALPHA_NUM_ARG_REGS
#define ALPHA_NUM_ARG_REGS
Definition: alpha-tdep.h:68
type_code
type_code
Definition: gdbtypes.h:80
TYPE_CODE_ARRAY
Definition: gdbtypes.h:104
regcache_raw_get_unsigned
ULONGEST regcache_raw_get_unsigned(struct regcache *regcache, int regnum)
Definition: common-regcache.c:26
frame_id_build
struct frame_id frame_id_build(CORE_ADDR stack_addr, CORE_ADDR code_addr)
Definition: frame.c:624
ALPHA_T9_REGNUM
#define ALPHA_T9_REGNUM
Definition: alpha-tdep.h:41
set_gdbarch_get_longjmp_target
void set_gdbarch_get_longjmp_target(struct gdbarch *gdbarch, gdbarch_get_longjmp_target_ftype get_longjmp_target)
Definition: gdbarch.c:2572
MEM_RA
#define MEM_RA(insn)
Definition: alpha-tdep.c:54
alpha_sigtramp_unwind_cache::sigcontext_addr
CORE_ADDR sigcontext_addr
Definition: alpha-tdep.c:878
TYPE_CODE_ENUM
Definition: gdbtypes.h:108
alpha_extract_return_value
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int trad_frame_addr_p(struct trad_frame_saved_reg this_saved_regs[], int regnum)
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Definition: alpha-tdep.h:40
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void trad_frame_set_value(struct trad_frame_saved_reg this_saved_regs[], int regnum, LONGEST val)
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Definition: alpha-tdep.h:45
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Definition: m32c-tdep.c:116
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Definition: aarch64-tdep.h:55
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unsigned int alpha_read_insn(struct gdbarch *gdbarch, CORE_ADDR pc)
Definition: alpha-tdep.c:679
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Definition: defs.h:247
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Definition: alpha-tdep.c:699
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Definition: inferior.h:310
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static CORE_ADDR alpha_next_pc(struct regcache *regcache, CORE_ADDR pc)
Definition: alpha-tdep.c:1601
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void set_gdbarch_register_reggroup_p(struct gdbarch *gdbarch, gdbarch_register_reggroup_p_ftype register_reggroup_p)
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static void alpha_heuristic_frame_this_id(struct frame_info *this_frame, void **this_prologue_cache, struct frame_id *this_id)
Definition: alpha-tdep.c:1404
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Definition: frame.h:255
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int sc_pc_offset
Definition: alpha-tdep.h:95
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struct trad_frame_saved_reg * saved_regs
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struct reggroup *const restore_reggroup
Definition: reggroups.c:320
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struct reggroup *const all_reggroup
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static const int lda_opcode
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Definition: gdb_locale.h:35
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Definition: frame.c:2671
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static void alpha_sts(struct gdbarch *gdbarch, void *out, const void *in)
Definition: alpha-tdep.c:216
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static int heuristic_fence_post
Definition: alpha-tdep.c:1030
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struct gdbarch_tdep * gdbarch_tdep(struct gdbarch *gdbarch)
Definition: gdbarch.c:1491
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Definition: reggroups.c:33
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static const int stq_opcode
Definition: alpha-tdep.c:60
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Definition: frame-unwind.c:79
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Definition: arm-linux.py:13
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Definition: alpha-tdep.c:1121
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Definition: gdbtypes.h:1538
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static struct type * alpha_register_type(struct gdbarch *gdbarch, int regno)
Definition: alpha-tdep.c:123
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void set_gdbarch_wchar_signed(struct gdbarch *gdbarch, int wchar_signed)
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#define FRAME_OBSTACK_ZALLOC(TYPE)
Definition: frame.h:678
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Definition: utils.c:2045
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const char * paddress(struct gdbarch *gdbarch, CORE_ADDR addr)
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alpha_lds
static void alpha_lds(struct gdbarch *gdbarch, void *out, const void *in)
Definition: alpha-tdep.c:185
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#define ALPHA_UNIQUE_REGNUM
Definition: alpha-tdep.h:51
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Definition: alpha-tdep.c:66
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void memory_error(enum target_xfer_status err, CORE_ADDR memaddr)
Definition: corefile.c:205
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struct reggroup *const float_reggroup
Definition: reggroups.c:315
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static CORE_ADDR alpha_unwind_pc(struct gdbarch *gdbarch, struct frame_info *next_frame)
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frame_base_set_default
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Definition: frame-base.c:95
setlist
struct cmd_list_element * setlist
Definition: cli-cmds.c:111
name
const char *const name
Definition: aarch64-tdep.c:76
gdbarch_tdep::sc_regs_offset
int sc_regs_offset
Definition: alpha-tdep.h:96
alpha_sigtramp_frame_this_id
static void alpha_sigtramp_frame_this_id(struct frame_info *this_frame, void **this_prologue_cache, struct frame_id *this_id)
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struct value * get_frame_register_value(struct frame_info *frame, int regnum)
Definition: frame.c:1238
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LONGEST regcache_raw_get_signed(struct regcache *regcache, int regnum)
Definition: regcache.c:648
alpha_after_prologue
CORE_ADDR alpha_after_prologue(CORE_ADDR pc)
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void set_gdbarch_register_type(struct gdbarch *gdbarch, gdbarch_register_type_ftype register_type)
Definition: gdbarch.c:2316
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struct type * check_typedef(struct type *type)
Definition: gdbtypes.c:2421
dwarf2_frame_base_sniffer
const struct frame_base * dwarf2_frame_base_sniffer(struct frame_info *this_frame)
Definition: dwarf2-frame.c:1419
NORMAL_FRAME
Definition: frame.h:244
ALPHA_PC_REGNUM
#define ALPHA_PC_REGNUM
Definition: alpha-tdep.h:50
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const gdb_byte * value_contents(struct value *value)
Definition: value.c:1407
general_reggroup
struct reggroup *const general_reggroup
Definition: reggroups.c:314
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static CORE_ADDR alpha_heuristic_proc_start(struct gdbarch *gdbarch, CORE_ADDR pc)
Definition: alpha-tdep.c:1038
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void _initialize_alpha_tdep(void)
Definition: alpha-tdep.c:1857
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Definition: gdbtypes.h:160
alpha_cannot_store_register
static int alpha_cannot_store_register(struct gdbarch *gdbarch, int regno)
Definition: alpha-tdep.c:116
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void alpha_fill_fp_regs(const struct regcache *regcache, int regno, void *f0_f30, void *fpcr)
Definition: alpha-tdep.c:1555
find_pc_line
struct symtab_and_line find_pc_line(CORE_ADDR pc, int notcurrent)
Definition: symtab.c:3288
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find_solib_trampoline_target
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static ULONGEST extract_unsigned_integer(const gdb_byte *addr, int len, enum bfd_endian byte_order)
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enum register_status regcache_cooked_read_unsigned(struct regcache *regcache, int regnum, ULONGEST *val)
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struct reggroup *const system_reggroup
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Definition: cli-decode.c:748
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void set_gdbarch_decr_pc_after_break(struct gdbarch *gdbarch, CORE_ADDR decr_pc_after_break)
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Definition: gdbarch.c:2340
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Definition: alpha-tdep.c:71
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Definition: cli-cmds.c:119
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const gdb_byte * value_contents_all(struct value *value)
Definition: value.c:1265
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Definition: alpha-tdep.h:36
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static int alpha_sigtramp_frame_sniffer(const struct frame_unwind *self, struct frame_info *this_frame, void **this_prologue_cache)
Definition: alpha-tdep.c:989
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Definition: gdbtypes.h:116
alpha_deal_with_atomic_sequence
static std::vector< CORE_ADDR > alpha_deal_with_atomic_sequence(struct gdbarch *gdbarch, CORE_ADDR pc)
Definition: alpha-tdep.c:770
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enum bfd_endian gdbarch_byte_order(struct gdbarch *gdbarch)
Definition: gdbarch.c:1509
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Definition: alpha-tdep.c:69
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Definition: gdbtypes.h:107
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int jb_pc
Definition: aarch64-tdep.h:62
set_gdbarch_cannot_store_register
void set_gdbarch_cannot_store_register(struct gdbarch *gdbarch, gdbarch_cannot_store_register_ftype cannot_store_register)
Definition: gdbarch.c:2548
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Definition: alpha-tdep.c:1118
NO_STOP_QUIETLY
Definition: inferior.h:255
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Definition: gdbtypes.h:749
find_pc_partial_function
int find_pc_partial_function(CORE_ADDR pc, const char **name, CORE_ADDR *address, CORE_ADDR *endaddr)
Definition: blockframe.c:320
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Definition: alpha-tdep.h:42
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Definition: alpha-tdep.h:39
alpha_return_value
static enum return_value_convention alpha_return_value(struct gdbarch *gdbarch, struct value *function, struct type *type, struct regcache *regcache, gdb_byte *readbuf, const gdb_byte *writebuf)
Definition: alpha-tdep.c:614
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Definition: gdbarch.c:2622
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static const int subq_function
Definition: alpha-tdep.c:76
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set_gdbarch_unwind_pc
void set_gdbarch_unwind_pc(struct gdbarch *gdbarch, gdbarch_unwind_pc_ftype unwind_pc)
Definition: gdbarch.c:3079
inf
Definition: gnu-nat.c:174
default_frame_sniffer
int default_frame_sniffer(const struct frame_unwind *self, struct frame_info *this_frame, void **this_prologue_cache)
Definition: frame-unwind.c:174
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#define ALPHA_FPCR_REGNUM
Definition: alpha-tdep.h:49
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static struct frame_id alpha_dummy_id(struct gdbarch *gdbarch, struct frame_info *this_frame)
Definition: alpha-tdep.c:1475
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constexpr gdb_byte alpha_break_insn[]
Definition: alpha-tdep.c:650
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const char * gdbarch_register_name(struct gdbarch *gdbarch, int regnr)
Definition: gdbarch.c:2282
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struct value * value_cast(struct type *type, struct value *arg2)
Definition: valops.c:351
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static const int stl_c_opcode
Definition: alpha-tdep.c:761
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struct gdbarch * gdbarch
Definition: gdbarch.h:1622
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int regnum
Definition: aarch64-tdep.c:77
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Definition: frame-base.h:58
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void read_memory(CORE_ADDR memaddr, gdb_byte *myaddr, ssize_t len)
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static const struct frame_unwind alpha_sigtramp_frame_unwind
Definition: alpha-tdep.c:1016
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static struct alpha_sigtramp_unwind_cache * alpha_sigtramp_frame_unwind_cache(struct frame_info *this_frame, void **this_prologue_cache)
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ULONGEST get_frame_register_unsigned(struct frame_info *frame, int regnum)
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static void alpha_value_to_register(struct frame_info *frame, int regnum, struct type *valtype, const gdb_byte *in)
Definition: alpha-tdep.c:270
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Definition: alpha-tdep.c:1462
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Definition: trad-frame.c:47
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Definition: gdbarch.c:3258
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Definition: gdbarch.c:2197
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Definition: alpha-tdep.c:876
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static CORE_ADDR alpha_push_dummy_call(struct gdbarch *gdbarch, struct value *function, struct regcache *regcache, CORE_ADDR bp_addr, int nargs, struct value **args, CORE_ADDR sp, int struct_return, CORE_ADDR struct_addr)
Definition: alpha-tdep.c:297
ALPHA_FPA0_REGNUM
#define ALPHA_FPA0_REGNUM
Definition: alpha-tdep.h:48
OPR_LIT
#define OPR_LIT(insn)
Definition: alpha-tdep.c:73
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int offset
Definition: agent.c:65
code
int code
Definition: ser-unix.c:239
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gdbarch * arch() const
Definition: regcache.c:221
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void dwarf2_append_unwinders(struct gdbarch *gdbarch)
Definition: dwarf2-frame.c:1384
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enum register_status regcache_cooked_read(struct regcache *regcache, int regnum, gdb_byte *buf)
Definition: regcache.c:661
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CORE_ADDR pc
Definition: symtab.h:1759
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static void alpha_store_return_value(struct type *valtype, struct regcache *regcache, const gdb_byte *valbuf)
Definition: alpha-tdep.c:543
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frame_unwind
Definition: frame-unwind.h:144
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static const int subq_opcode
Definition: alpha-tdep.c:75
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struct inferior * current_inferior(void)
Definition: inferior.c:58
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void regcache_raw_supply(struct regcache *regcache, int regnum, const void *buf)
Definition: regcache.c:1004
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void frame_base_append_sniffer(struct gdbarch *gdbarch, frame_base_sniffer_ftype *sniffer)
Definition: frame-base.c:82
ULONGEST
unsigned long long ULONGEST
Definition: common-types.h:53
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enum unwind_stop_reason default_frame_unwind_stop_reason(struct frame_info *this_frame, void **this_cache)
Definition: frame-unwind.c:184
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void release_value(struct value *val)
Definition: value.c:1693
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int register_size(struct gdbarch *gdbarch, int regnum)
Definition: regcache.c:164
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Definition: regcache.h:232
gdbarch_info
Definition: gdbarch.h:1626
set_gdbarch_long_double_bit
void set_gdbarch_long_double_bit(struct gdbarch *gdbarch, int long_double_bit)
Definition: gdbarch.c:1756
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struct type * value_type(const struct value *value)
Definition: value.c:1095
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const struct frame_base * base
Definition: frame.c:142
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struct type * builtin_int64
Definition: gdbtypes.h:1540
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typedef BP_MANIPULATION(alpha_break_insn)
Definition: alpha-tdep.c:652
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void set_gdbarch_long_bit(struct gdbarch *gdbarch, int long_bit)
Definition: gdbarch.c:1606
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void set_gdbarch_return_value(struct gdbarch *gdbarch, gdbarch_return_value_ftype return_value)
Definition: gdbarch.c:2738
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void regcache_raw_collect(const struct regcache *regcache, int regnum, void *buf)
Definition: regcache.c:1085
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void set_gdbarch_cannot_step_breakpoint(struct gdbarch *gdbarch, int cannot_step_breakpoint)
Definition: gdbarch.c:3476
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static int fp_register_sign_bit(LONGEST reg)
Definition: alpha-tdep.c:1588
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struct reggroup *const save_reggroup
Definition: reggroups.c:319
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#define TYPE_LENGTH(thistype)
Definition: gdbtypes.h:1235
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static const int br_opcode
Definition: alpha-tdep.c:65
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static CORE_ADDR alpha_heuristic_frame_base_address(struct frame_info *this_frame, void **this_prologue_cache)
Definition: alpha-tdep.c:1442
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void set_gdbarch_ptr_bit(struct gdbarch *gdbarch, int ptr_bit)
Definition: gdbarch.c:1841
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CORE_ADDR vm_min_address
Definition: alpha-tdep.h:73
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static const int stq_c_opcode
Definition: alpha-tdep.c:762
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enum register_status regcache_raw_read_unsigned(struct regcache *regcache, int regnum, ULONGEST *val)
Definition: regcache.c:612
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void set_gdbarch_push_dummy_call(struct gdbarch *gdbarch, gdbarch_push_dummy_call_ftype push_dummy_call)
Definition: gdbarch.c:2381
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int return_reg
Definition: alpha-tdep.c:1123
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void reinit_frame_cache(void)
Definition: frame.c:1809
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Definition: blockframe.c:86
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void alpha_supply_fp_regs(struct regcache *regcache, int regno, const void *f0_f30, const void *fpcr)
Definition: alpha-tdep.c:1539
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void set_gdbarch_sw_breakpoint_from_kind(struct gdbarch *gdbarch, gdbarch_sw_breakpoint_from_kind_ftype sw_breakpoint_from_kind)
Definition: gdbarch.c:2888
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#define ALPHA_REGISTER_SIZE
Definition: alpha-tdep.h:27
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void write_memory(CORE_ADDR memaddr, const bfd_byte *myaddr, ssize_t len)
Definition: corefile.c:394
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void set_gdbarch_skip_prologue(struct gdbarch *gdbarch, gdbarch_skip_prologue_ftype skip_prologue)
Definition: gdbarch.c:2772
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static const int ldl_l_opcode
Definition: alpha-tdep.c:759
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#define ALPHA_T7_REGNUM
Definition: alpha-tdep.h:37
RETURN_VALUE_REGISTER_CONVENTION
Definition: defs.h:251
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enum bfd_endian byte_order
Definition: gdbarch.c:137
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void set_gdbarch_pc_regnum(struct gdbarch *gdbarch, int pc_regnum)
Definition: gdbarch.c:2173
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MEM_RB
#define MEM_RB(insn)
Definition: alpha-tdep.c:55
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Definition: trad-frame.h:81
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void set_gdbarch_register_name(struct gdbarch *gdbarch, gdbarch_register_name_ftype register_name)
Definition: gdbarch.c:2292
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CORE_ADDR get_frame_func(struct frame_info *this_frame)
Definition: frame.c:1001
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void error(const char *fmt,...)
Definition: errors.c:38
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static int fp_register_zero_p(LONGEST reg)
Definition: alpha-tdep.c:1576
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static const int ldq_l_opcode
Definition: alpha-tdep.c:760
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int sc_fpregs_offset
Definition: alpha-tdep.h:97
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struct gdbarch * gdbarch_alloc(const struct gdbarch_info *info, struct gdbarch_tdep *tdep)
Definition: gdbarch.c:361
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static struct value * alpha_heuristic_frame_prev_register(struct frame_info *this_frame, void **this_prologue_cache, int regnum)
Definition: alpha-tdep.c:1417
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void set_gdbarch_inner_than(struct gdbarch *gdbarch, gdbarch_inner_than_ftype inner_than)
Definition: gdbarch.c:2837
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static int alpha_register_to_value(struct frame_info *frame, int regnum, struct type *valtype, gdb_byte *out, int *optimizedp, int *unavailablep)
Definition: alpha-tdep.c:241
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struct type * lookup_pointer_type(struct type *type)
Definition: gdbtypes.c:381
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Definition: frame.h:111
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static const char * alpha_register_name(struct gdbarch *gdbarch, int regno)
Definition: alpha-tdep.c:87
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Definition: target.h:220
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struct gdbarch * get_frame_arch(struct frame_info *this_frame)
Definition: frame.c:2691
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long long LONGEST
Definition: common-types.h:52
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void regcache_cooked_write(struct regcache *regcache, int regnum, const gdb_byte *buf)
Definition: regcache.c:873
symfile.h
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static int alpha_convert_register_p(struct gdbarch *gdbarch, int regno, struct type *type)
Definition: alpha-tdep.c:233
TYPE_CODE_COMPLEX
Definition: gdbtypes.h:167
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static void store_unsigned_integer(gdb_byte *addr, int len, enum bfd_endian byte_order, ULONGEST val)
Definition: defs.h:604
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Definition: gdbarch.h:1620
alpha_heuristic_analyze_probing_loop
static void alpha_heuristic_analyze_probing_loop(struct gdbarch *gdbarch, CORE_ADDR *pc, int *frame_size)
Definition: alpha-tdep.c:1131