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1 /* Target-dependent header for the MIPS architecture, for GDB, the GNU Debugger.
2
3 Copyright (C) 2002-2018 Free Software Foundation, Inc.
4
5 This file is part of GDB.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
19
20 #ifndef MIPS_TDEP_H
21 #define MIPS_TDEP_H
22
23 #include "objfiles.h"
24
25 struct gdbarch;
26
27 /* All the possible MIPS ABIs. */
28 enum mips_abi
29 {
30 MIPS_ABI_UNKNOWN = 0,
31 MIPS_ABI_N32,
32 MIPS_ABI_O32,
33 MIPS_ABI_N64,
34 MIPS_ABI_O64,
35 MIPS_ABI_EABI32,
36 MIPS_ABI_EABI64,
37 MIPS_ABI_LAST
38 };
39
40 /* Return the MIPS ABI associated with GDBARCH. */
41 enum mips_abi mips_abi (struct gdbarch *gdbarch);
42
43 /* Base and compressed MIPS ISA variations. */
44 enum mips_isa
45 {
46 ISA_MIPS = -1, /* mips_compression_string depends on it. */
47 ISA_MIPS16,
48 ISA_MICROMIPS
49 };
50
51 /* Corresponding MSYMBOL_TARGET_FLAG aliases. */
52 #define MSYMBOL_TARGET_FLAG_MIPS16 MSYMBOL_TARGET_FLAG_1
53 #define MSYMBOL_TARGET_FLAG_MICROMIPS MSYMBOL_TARGET_FLAG_2
54
55 /* Return the MIPS ISA's register size. Just a short cut to the BFD
56 architecture's word size. */
57 extern int mips_isa_regsize (struct gdbarch *gdbarch);
58
59 /* Return the current index for various MIPS registers. */
60 struct mips_regnum
61 {
62 int pc;
63 int fp0;
64 int fp_implementation_revision;
65 int fp_control_status;
66 int badvaddr; /* Bad vaddr for addressing exception. */
67 int cause; /* Describes last exception. */
68 int hi; /* Multiply/divide temp. */
69 int lo; /* ... */
70 int dspacc; /* SmartMIPS/DSP accumulators. */
71 int dspctl; /* DSP control. */
72 };
73 extern const struct mips_regnum *mips_regnum (struct gdbarch *gdbarch);
74
75 /* Some MIPS boards don't support floating point while others only
76 support single-precision floating-point operations. */
77
78 enum mips_fpu_type
79 {
80 MIPS_FPU_DOUBLE, /* Full double precision floating point. */
81 MIPS_FPU_SINGLE, /* Single precision floating point (R4650). */
82 MIPS_FPU_NONE /* No floating point. */
83 };
84
85 /* MIPS specific per-architecture information. */
86 struct gdbarch_tdep
87 {
88 /* from the elf header */
89 int elf_flags;
90
91 /* mips options */
92 enum mips_abi mips_abi;
93 enum mips_abi found_abi;
94 enum mips_isa mips_isa;
95 enum mips_fpu_type mips_fpu_type;
96 int mips_last_arg_regnum;
97 int mips_last_fp_arg_regnum;
98 int default_mask_address_p;
99 /* Is the target using 64-bit raw integer registers but only
100 storing a left-aligned 32-bit value in each? */
101 int mips64_transfers_32bit_regs_p;
102 /* Indexes for various registers. IRIX and embedded have
103 different values. This contains the "public" fields. Don't
104 add any that do not need to be public. */
105 const struct mips_regnum *regnum;
106 /* Register names table for the current register set. */
107 const char **mips_processor_reg_names;
108
109 /* The size of register data available from the target, if known.
110 This doesn't quite obsolete the manual
111 mips64_transfers_32bit_regs_p, since that is documented to force
112 left alignment even for big endian (very strange). */
113 int register_size_valid_p;
114 int register_size;
115
116 /* Return the expected next PC if FRAME is stopped at a syscall
117 instruction. */
118 CORE_ADDR (*syscall_next_pc) (struct frame_info *frame);
119 };
120
121 /* Register numbers of various important registers. */
122
123 enum
124 {
125 MIPS_ZERO_REGNUM = 0, /* Read-only register, always 0. */
126 MIPS_AT_REGNUM = 1,
127 MIPS_V0_REGNUM = 2, /* Function integer return value. */
128 MIPS_A0_REGNUM = 4, /* Loc of first arg during a subr call. */
129 MIPS_S2_REGNUM = 18, /* Contains return address in MIPS16 thunks. */
130 MIPS_T9_REGNUM = 25, /* Contains address of callee in PIC. */
131 MIPS_GP_REGNUM = 28,
132 MIPS_SP_REGNUM = 29,
133 MIPS_RA_REGNUM = 31,
134 MIPS_PS_REGNUM = 32, /* Contains processor status. */
135 MIPS_EMBED_LO_REGNUM = 33,
136 MIPS_EMBED_HI_REGNUM = 34,
137 MIPS_EMBED_BADVADDR_REGNUM = 35,
138 MIPS_EMBED_CAUSE_REGNUM = 36,
139 MIPS_EMBED_PC_REGNUM = 37,
140 MIPS_EMBED_FP0_REGNUM = 38,
141 MIPS_UNUSED_REGNUM = 73, /* Never used, FIXME. */
142 MIPS_FIRST_EMBED_REGNUM = 74, /* First CP0 register for embedded use. */
143 MIPS_PRID_REGNUM = 89, /* Processor ID. */
144 MIPS_LAST_EMBED_REGNUM = 89 /* Last one. */
145 };
146
147 /* Instruction sizes and other useful constants. */
148 enum
149 {
150 MIPS_INSN16_SIZE = 2,
151 MIPS_INSN32_SIZE = 4,
152 /* The number of floating-point or integer registers. */
153 MIPS_NUMREGS = 32
154 };
155
156 /* Single step based on where the current instruction will take us. */
157 extern std::vector<CORE_ADDR> mips_software_single_step
158 (struct regcache *regcache);
159
160 /* Strip the ISA (compression) bit off from ADDR. */
161 extern CORE_ADDR mips_unmake_compact_addr (CORE_ADDR addr);
162
163 /* Tell if the program counter value in MEMADDR is in a standard
164 MIPS function. */
165 extern int mips_pc_is_mips (bfd_vma memaddr);
166
167 /* Tell if the program counter value in MEMADDR is in a MIPS16
168 function. */
169 extern int mips_pc_is_mips16 (struct gdbarch *gdbarch, bfd_vma memaddr);
170
171 /* Tell if the program counter value in MEMADDR is in a microMIPS
172 function. */
173 extern int mips_pc_is_micromips (struct gdbarch *gdbarch, bfd_vma memaddr);
174
175 /* Return the currently configured (or set) saved register size. */
176 extern unsigned int mips_abi_regsize (struct gdbarch *gdbarch);
177
178 /* Make PC the address of the next instruction to execute. */
179 extern void mips_write_pc (struct regcache *regcache, CORE_ADDR pc);
180
181 /* Target descriptions which only indicate the size of general
182 registers. */
183 extern struct target_desc *mips_tdesc_gp32;
184 extern struct target_desc *mips_tdesc_gp64;
185
186 /* Return non-zero if PC is in a MIPS SVR4 lazy binding stub section. */
187
188 static inline int
189 in_mips_stubs_section (CORE_ADDR pc)
190 {
191 return pc_in_section (pc, ".MIPS.stubs");
192 }
193
194 #endif /* MIPS_TDEP_H */
gdbarch
Definition: gdbarch.c:127
MIPS_EMBED_PC_REGNUM
Definition: mips-tdep.h:139
gdbarch_tdep::syscall_next_pc
CORE_ADDR(* syscall_next_pc)(struct frame_info *frame)
Definition: mips-tdep.h:118
mips_software_single_step
std::vector< CORE_ADDR > mips_software_single_step(struct regcache *regcache)
Definition: mips-tdep.c:4155
MIPS_ABI_N32
Definition: mips-tdep.h:31
ISA_MICROMIPS
Definition: mips-tdep.h:48
pc_in_section
int pc_in_section(CORE_ADDR pc, const char *name)
Definition: objfiles.c:1442
MIPS_AT_REGNUM
Definition: mips-tdep.h:126
MIPS_LAST_EMBED_REGNUM
Definition: mips-tdep.h:144
CORE_ADDR
bfd_vma CORE_ADDR
Definition: common-types.h:41
MIPS_S2_REGNUM
Definition: mips-tdep.h:129
MIPS_ABI_O64
Definition: mips-tdep.h:34
MIPS_FPU_SINGLE
Definition: mips-tdep.h:81
MIPS_ABI_O32
Definition: mips-tdep.h:32
gdbarch_tdep::mips_isa
enum mips_isa mips_isa
Definition: mips-tdep.h:94
gdbarch_tdep::mips_processor_reg_names
const char ** mips_processor_reg_names
Definition: mips-tdep.h:107
MIPS_EMBED_HI_REGNUM
Definition: mips-tdep.h:136
mips_tdesc_gp64
struct target_desc * mips_tdesc_gp64
Definition: mips-tdep.c:215
gdbarch_tdep
Definition: aarch64-tdep.h:55
gdbarch_tdep::default_mask_address_p
int default_mask_address_p
Definition: mips-tdep.h:98
mips_fpu_type
mips_fpu_type
Definition: mips-tdep.h:78
MIPS_SP_REGNUM
Definition: mips-tdep.h:132
frame_info
Definition: frame.c:85
mips_pc_is_mips16
int mips_pc_is_mips16(struct gdbarch *gdbarch, bfd_vma memaddr)
Definition: mips-tdep.c:1194
MIPS_ABI_EABI64
Definition: mips-tdep.h:36
mips_isa_regsize
int mips_isa_regsize(struct gdbarch *gdbarch)
Definition: mips-tdep.c:261
MIPS_T9_REGNUM
Definition: mips-tdep.h:130
MIPS_PRID_REGNUM
Definition: mips-tdep.h:143
mips_abi_regsize
unsigned int mips_abi_regsize(struct gdbarch *gdbarch)
Definition: mips-tdep.c:280
MIPS_EMBED_BADVADDR_REGNUM
Definition: mips-tdep.h:137
objfiles.h
MIPS_V0_REGNUM
Definition: mips-tdep.h:127
MIPS_ABI_UNKNOWN
Definition: mips-tdep.h:30
MIPS_EMBED_CAUSE_REGNUM
Definition: mips-tdep.h:138
MIPS_EMBED_LO_REGNUM
Definition: mips-tdep.h:135
gdbarch_tdep::register_size
int register_size
Definition: mips-tdep.h:114
gdbarch_tdep::found_abi
enum mips_abi found_abi
Definition: mips-tdep.h:93
MIPS_EMBED_FP0_REGNUM
Definition: mips-tdep.h:140
ISA_MIPS
Definition: mips-tdep.h:46
mips_regnum::badvaddr
int badvaddr
Definition: mips-tdep.h:66
mips_regnum
const struct mips_regnum * mips_regnum(struct gdbarch *gdbarch)
Definition: mips-tdep.c:218
gdbarch_tdep::mips_last_fp_arg_regnum
int mips_last_fp_arg_regnum
Definition: mips-tdep.h:97
MIPS_FIRST_EMBED_REGNUM
Definition: mips-tdep.h:142
ISA_MIPS16
Definition: mips-tdep.h:47
MIPS_PS_REGNUM
Definition: mips-tdep.h:134
mips_regnum::fp_implementation_revision
int fp_implementation_revision
Definition: mips-tdep.h:64
mips_pc_is_micromips
int mips_pc_is_micromips(struct gdbarch *gdbarch, bfd_vma memaddr)
Definition: mips-tdep.c:1212
gdbarch_tdep::mips_fpu_type
enum mips_fpu_type mips_fpu_type
Definition: mips-tdep.h:95
MIPS_ABI_EABI32
Definition: mips-tdep.h:35
mips_isa
mips_isa
Definition: mips-tdep.h:44
gdbarch_tdep::mips_abi
enum mips_abi mips_abi
Definition: mips-tdep.h:92
mips_tdesc_gp32
struct target_desc * mips_tdesc_gp32
Definition: mips-tdep.c:214
MIPS_ZERO_REGNUM
Definition: mips-tdep.h:125
mips_write_pc
void mips_write_pc(struct regcache *regcache, CORE_ADDR pc)
Definition: mips-tdep.c:1421
MIPS_A0_REGNUM
Definition: mips-tdep.h:128
mips_unmake_compact_addr
CORE_ADDR mips_unmake_compact_addr(CORE_ADDR addr)
Definition: mips-tdep.c:372
MIPS_INSN32_SIZE
Definition: mips-tdep.h:151
mips_abi
mips_abi
Definition: mips-tdep.h:28
gdbarch_tdep::regnum
const struct mips_regnum * regnum
Definition: mips-tdep.h:105
MIPS_UNUSED_REGNUM
Definition: mips-tdep.h:141
target_desc
Definition: target-descriptions.c:591
mips_regnum
Definition: mips-tdep.h:60
gdbarch_tdep::mips64_transfers_32bit_regs_p
int mips64_transfers_32bit_regs_p
Definition: mips-tdep.h:101
mips_regnum::dspctl
int dspctl
Definition: mips-tdep.h:71
gdbarch_tdep::register_size_valid_p
int register_size_valid_p
Definition: mips-tdep.h:113
gdbarch_tdep::mips_last_arg_regnum
int mips_last_arg_regnum
Definition: mips-tdep.h:96
MIPS_FPU_NONE
Definition: mips-tdep.h:82
MIPS_GP_REGNUM
Definition: mips-tdep.h:131
mips_regnum::fp0
int fp0
Definition: mips-tdep.h:63
regcache
Definition: regcache.h:232
MIPS_ABI_LAST
Definition: mips-tdep.h:37
frame_info::addr
CORE_ADDR addr
Definition: frame.c:128
MIPS_NUMREGS
Definition: mips-tdep.h:153
mips_pc_is_mips
int mips_pc_is_mips(bfd_vma memaddr)
Definition: mips-tdep.c:1176
mips_regnum::pc
int pc
Definition: mips-tdep.h:62
MIPS_INSN16_SIZE
Definition: mips-tdep.h:150
mips_regnum::fp_control_status
int fp_control_status
Definition: mips-tdep.h:65
mips_regnum::cause
int cause
Definition: mips-tdep.h:67
MIPS_ABI_N64
Definition: mips-tdep.h:33
mips_regnum::dspacc
int dspacc
Definition: mips-tdep.h:70
MIPS_FPU_DOUBLE
Definition: mips-tdep.h:80
MIPS_RA_REGNUM
Definition: mips-tdep.h:133
mips_regnum::lo
int lo
Definition: mips-tdep.h:69
gdbarch_tdep::elf_flags
int elf_flags
Definition: m68hc11-tdep.c:142
in_mips_stubs_section
static int in_mips_stubs_section(CORE_ADDR pc)
Definition: mips-tdep.h:189
mips_regnum::hi
int hi
Definition: mips-tdep.h:68