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/tmp/gdb-8.1/gdb/nios2-tdep.c
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1 /* Target-machine dependent code for Nios II, for GDB.
2 Copyright (C) 2012-2018 Free Software Foundation, Inc.
3 Contributed by Peter Brookes (pbrookes@altera.com)
4 and Andrew Draper (adraper@altera.com).
5 Contributed by Mentor Graphics, Inc.
6
7 This file is part of GDB.
8
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 3 of the License, or
12 (at your option) any later version.
13
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
18
19 You should have received a copy of the GNU General Public License
20 along with this program. If not, see <http://www.gnu.org/licenses/>. */
21
22 #include "defs.h"
23 #include "frame.h"
24 #include "frame-unwind.h"
25 #include "frame-base.h"
26 #include "trad-frame.h"
27 #include "dwarf2-frame.h"
28 #include "symtab.h"
29 #include "inferior.h"
30 #include "gdbtypes.h"
31 #include "gdbcore.h"
32 #include "gdbcmd.h"
33 #include "osabi.h"
34 #include "target.h"
35 #include "dis-asm.h"
36 #include "regcache.h"
37 #include "value.h"
38 #include "symfile.h"
39 #include "arch-utils.h"
40 #include "infcall.h"
41 #include "regset.h"
42 #include "target-descriptions.h"
43
44 /* To get entry_point_address. */
45 #include "objfiles.h"
46 #include <algorithm>
47
48 /* Nios II specific header. */
49 #include "nios2-tdep.h"
50
51 #include "features/nios2.c"
52
53 /* Control debugging information emitted in this file. */
54
55 static int nios2_debug = 0;
56
57 /* The following structures are used in the cache for prologue
58 analysis; see the reg_value and reg_saved tables in
59 struct nios2_unwind_cache, respectively. */
60
61 /* struct reg_value is used to record that a register has the same value
62 as reg at the given offset from the start of a function. */
63
64 struct reg_value
65 {
66 int reg;
67 unsigned int offset;
68 };
69
70 /* struct reg_saved is used to record that a register value has been saved at
71 basereg + addr, for basereg >= 0. If basereg < 0, that indicates
72 that the register is not known to have been saved. Note that when
73 basereg == NIOS2_Z_REGNUM (that is, r0, which holds value 0),
74 addr is an absolute address. */
75
76 struct reg_saved
77 {
78 int basereg;
79 CORE_ADDR addr;
80 };
81
82 struct nios2_unwind_cache
83 {
84 /* The frame's base, optionally used by the high-level debug info. */
85 CORE_ADDR base;
86
87 /* The previous frame's inner most stack address. Used as this
88 frame ID's stack_addr. */
89 CORE_ADDR cfa;
90
91 /* The address of the first instruction in this function. */
92 CORE_ADDR pc;
93
94 /* Which register holds the return address for the frame. */
95 int return_regnum;
96
97 /* Table indicating what changes have been made to each register. */
98 struct reg_value reg_value[NIOS2_NUM_REGS];
99
100 /* Table indicating where each register has been saved. */
101 struct reg_saved reg_saved[NIOS2_NUM_REGS];
102 };
103
104
105 /* This array is a mapping from Dwarf-2 register numbering to GDB's. */
106
107 static int nios2_dwarf2gdb_regno_map[] =
108 {
109 0, 1, 2, 3,
110 4, 5, 6, 7,
111 8, 9, 10, 11,
112 12, 13, 14, 15,
113 16, 17, 18, 19,
114 20, 21, 22, 23,
115 24, 25,
116 NIOS2_GP_REGNUM, /* 26 */
117 NIOS2_SP_REGNUM, /* 27 */
118 NIOS2_FP_REGNUM, /* 28 */
119 NIOS2_EA_REGNUM, /* 29 */
120 NIOS2_BA_REGNUM, /* 30 */
121 NIOS2_RA_REGNUM, /* 31 */
122 NIOS2_PC_REGNUM, /* 32 */
123 NIOS2_STATUS_REGNUM, /* 33 */
124 NIOS2_ESTATUS_REGNUM, /* 34 */
125 NIOS2_BSTATUS_REGNUM, /* 35 */
126 NIOS2_IENABLE_REGNUM, /* 36 */
127 NIOS2_IPENDING_REGNUM, /* 37 */
128 NIOS2_CPUID_REGNUM, /* 38 */
129 39, /* CTL6 */ /* 39 */
130 NIOS2_EXCEPTION_REGNUM, /* 40 */
131 NIOS2_PTEADDR_REGNUM, /* 41 */
132 NIOS2_TLBACC_REGNUM, /* 42 */
133 NIOS2_TLBMISC_REGNUM, /* 43 */
134 NIOS2_ECCINJ_REGNUM, /* 44 */
135 NIOS2_BADADDR_REGNUM, /* 45 */
136 NIOS2_CONFIG_REGNUM, /* 46 */
137 NIOS2_MPUBASE_REGNUM, /* 47 */
138 NIOS2_MPUACC_REGNUM /* 48 */
139 };
140
141 gdb_static_assert (ARRAY_SIZE (nios2_dwarf2gdb_regno_map) == NIOS2_NUM_REGS);
142
143 /* Implement the dwarf2_reg_to_regnum gdbarch method. */
144
145 static int
146 nios2_dwarf_reg_to_regnum (struct gdbarch *gdbarch, int dw_reg)
147 {
148 if (dw_reg < 0 || dw_reg >= NIOS2_NUM_REGS)
149 return -1;
150
151 return nios2_dwarf2gdb_regno_map[dw_reg];
152 }
153
154 /* Canonical names for the 49 registers. */
155
156 static const char *const nios2_reg_names[NIOS2_NUM_REGS] =
157 {
158 "zero", "at", "r2", "r3", "r4", "r5", "r6", "r7",
159 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
160 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
161 "et", "bt", "gp", "sp", "fp", "ea", "sstatus", "ra",
162 "pc",
163 "status", "estatus", "bstatus", "ienable",
164 "ipending", "cpuid", "ctl6", "exception",
165 "pteaddr", "tlbacc", "tlbmisc", "eccinj",
166 "badaddr", "config", "mpubase", "mpuacc"
167 };
168
169 /* Implement the register_name gdbarch method. */
170
171 static const char *
172 nios2_register_name (struct gdbarch *gdbarch, int regno)
173 {
174 /* Use mnemonic aliases for GPRs. */
175 if (regno >= 0 && regno < NIOS2_NUM_REGS)
176 return nios2_reg_names[regno];
177 else
178 return tdesc_register_name (gdbarch, regno);
179 }
180
181 /* Implement the register_type gdbarch method. */
182
183 static struct type *
184 nios2_register_type (struct gdbarch *gdbarch, int regno)
185 {
186 /* If the XML description has register information, use that to
187 determine the register type. */
188 if (tdesc_has_registers (gdbarch_target_desc (gdbarch)))
189 return tdesc_register_type (gdbarch, regno);
190
191 if (regno == NIOS2_PC_REGNUM)
192 return builtin_type (gdbarch)->builtin_func_ptr;
193 else if (regno == NIOS2_SP_REGNUM)
194 return builtin_type (gdbarch)->builtin_data_ptr;
195 else
196 return builtin_type (gdbarch)->builtin_uint32;
197 }
198
199 /* Given a return value in REGCACHE with a type VALTYPE,
200 extract and copy its value into VALBUF. */
201
202 static void
203 nios2_extract_return_value (struct gdbarch *gdbarch, struct type *valtype,
204 struct regcache *regcache, gdb_byte *valbuf)
205 {
206 int len = TYPE_LENGTH (valtype);
207
208 /* Return values of up to 8 bytes are returned in $r2 $r3. */
209 if (len <= register_size (gdbarch, NIOS2_R2_REGNUM))
210 regcache_cooked_read (regcache, NIOS2_R2_REGNUM, valbuf);
211 else
212 {
213 gdb_assert (len <= (register_size (gdbarch, NIOS2_R2_REGNUM)
214 + register_size (gdbarch, NIOS2_R3_REGNUM)));
215 regcache_cooked_read (regcache, NIOS2_R2_REGNUM, valbuf);
216 regcache_cooked_read (regcache, NIOS2_R3_REGNUM, valbuf + 4);
217 }
218 }
219
220 /* Write into appropriate registers a function return value
221 of type TYPE, given in virtual format. */
222
223 static void
224 nios2_store_return_value (struct gdbarch *gdbarch, struct type *valtype,
225 struct regcache *regcache, const gdb_byte *valbuf)
226 {
227 int len = TYPE_LENGTH (valtype);
228
229 /* Return values of up to 8 bytes are returned in $r2 $r3. */
230 if (len <= register_size (gdbarch, NIOS2_R2_REGNUM))
231 regcache_cooked_write (regcache, NIOS2_R2_REGNUM, valbuf);
232 else
233 {
234 gdb_assert (len <= (register_size (gdbarch, NIOS2_R2_REGNUM)
235 + register_size (gdbarch, NIOS2_R3_REGNUM)));
236 regcache_cooked_write (regcache, NIOS2_R2_REGNUM, valbuf);
237 regcache_cooked_write (regcache, NIOS2_R3_REGNUM, valbuf + 4);
238 }
239 }
240
241
242 /* Set up the default values of the registers. */
243
244 static void
245 nios2_setup_default (struct nios2_unwind_cache *cache)
246 {
247 int i;
248
249 for (i = 0; i < NIOS2_NUM_REGS; i++)
250 {
251 /* All registers start off holding their previous values. */
252 cache->reg_value[i].reg = i;
253 cache->reg_value[i].offset = 0;
254
255 /* All registers start off not saved. */
256 cache->reg_saved[i].basereg = -1;
257 cache->reg_saved[i].addr = 0;
258 }
259 }
260
261 /* Initialize the unwind cache. */
262
263 static void
264 nios2_init_cache (struct nios2_unwind_cache *cache, CORE_ADDR pc)
265 {
266 cache->base = 0;
267 cache->cfa = 0;
268 cache->pc = pc;
269 cache->return_regnum = NIOS2_RA_REGNUM;
270 nios2_setup_default (cache);
271 }
272
273 /* Read and identify an instruction at PC. If INSNP is non-null,
274 store the instruction word into that location. Return the opcode
275 pointer or NULL if the memory couldn't be read or disassembled. */
276
277 static const struct nios2_opcode *
278 nios2_fetch_insn (struct gdbarch *gdbarch, CORE_ADDR pc,
279 unsigned int *insnp)
280 {
281 LONGEST memword;
282 unsigned long mach = gdbarch_bfd_arch_info (gdbarch)->mach;
283 unsigned int insn;
284
285 if (mach == bfd_mach_nios2r2)
286 {
287 if (!safe_read_memory_integer (pc, NIOS2_OPCODE_SIZE,
288 BFD_ENDIAN_LITTLE, &memword)
289 && !safe_read_memory_integer (pc, NIOS2_CDX_OPCODE_SIZE,
290 BFD_ENDIAN_LITTLE, &memword))
291 return NULL;
292 }
293 else if (!safe_read_memory_integer (pc, NIOS2_OPCODE_SIZE,
294 gdbarch_byte_order (gdbarch), &memword))
295 return NULL;
296
297 insn = (unsigned int) memword;
298 if (insnp)
299 *insnp = insn;
300 return nios2_find_opcode_hash (insn, mach);
301 }
302
303
304 /* Match and disassemble an ADD-type instruction, with 3 register operands.
305 Returns true on success, and fills in the operand pointers. */
306
307 static int
308 nios2_match_add (uint32_t insn, const struct nios2_opcode *op,
309 unsigned long mach, int *ra, int *rb, int *rc)
310 {
311 int is_r2 = (mach == bfd_mach_nios2r2);
312
313 if (!is_r2 && (op->match == MATCH_R1_ADD || op->match == MATCH_R1_MOV))
314 {
315 *ra = GET_IW_R_A (insn);
316 *rb = GET_IW_R_B (insn);
317 *rc = GET_IW_R_C (insn);
318 return 1;
319 }
320 else if (!is_r2)
321 return 0;
322 else if (op->match == MATCH_R2_ADD || op->match == MATCH_R2_MOV)
323 {
324 *ra = GET_IW_F3X6L5_A (insn);
325 *rb = GET_IW_F3X6L5_B (insn);
326 *rc = GET_IW_F3X6L5_C (insn);
327 return 1;
328 }
329 else if (op->match == MATCH_R2_ADD_N)
330 {
331 *ra = nios2_r2_reg3_mappings[GET_IW_T3X1_A3 (insn)];
332 *rb = nios2_r2_reg3_mappings[GET_IW_T3X1_B3 (insn)];
333 *rc = nios2_r2_reg3_mappings[GET_IW_T3X1_C3 (insn)];
334 return 1;
335 }
336 else if (op->match == MATCH_R2_MOV_N)
337 {
338 *ra = GET_IW_F2_A (insn);
339 *rb = 0;
340 *rc = GET_IW_F2_B (insn);
341 return 1;
342 }
343 return 0;
344 }
345
346 /* Match and disassemble a SUB-type instruction, with 3 register operands.
347 Returns true on success, and fills in the operand pointers. */
348
349 static int
350 nios2_match_sub (uint32_t insn, const struct nios2_opcode *op,
351 unsigned long mach, int *ra, int *rb, int *rc)
352 {
353 int is_r2 = (mach == bfd_mach_nios2r2);
354
355 if (!is_r2 && op->match == MATCH_R1_SUB)
356 {
357 *ra = GET_IW_R_A (insn);
358 *rb = GET_IW_R_B (insn);
359 *rc = GET_IW_R_C (insn);
360 return 1;
361 }
362 else if (!is_r2)
363 return 0;
364 else if (op->match == MATCH_R2_SUB)
365 {
366 *ra = GET_IW_F3X6L5_A (insn);
367 *rb = GET_IW_F3X6L5_B (insn);
368 *rc = GET_IW_F3X6L5_C (insn);
369 return 1;
370 }
371 else if (op->match == MATCH_R2_SUB_N)
372 {
373 *ra = nios2_r2_reg3_mappings[GET_IW_T3X1_A3 (insn)];
374 *rb = nios2_r2_reg3_mappings[GET_IW_T3X1_B3 (insn)];
375 *rc = nios2_r2_reg3_mappings[GET_IW_T3X1_C3 (insn)];
376 return 1;
377 }
378 return 0;
379 }
380
381 /* Match and disassemble an ADDI-type instruction, with 2 register operands
382 and one immediate operand.
383 Returns true on success, and fills in the operand pointers. */
384
385 static int
386 nios2_match_addi (uint32_t insn, const struct nios2_opcode *op,
387 unsigned long mach, int *ra, int *rb, int *imm)
388 {
389 int is_r2 = (mach == bfd_mach_nios2r2);
390
391 if (!is_r2 && op->match == MATCH_R1_ADDI)
392 {
393 *ra = GET_IW_I_A (insn);
394 *rb = GET_IW_I_B (insn);
395 *imm = (signed) (GET_IW_I_IMM16 (insn) << 16) >> 16;
396 return 1;
397 }
398 else if (!is_r2)
399 return 0;
400 else if (op->match == MATCH_R2_ADDI)
401 {
402 *ra = GET_IW_F2I16_A (insn);
403 *rb = GET_IW_F2I16_B (insn);
404 *imm = (signed) (GET_IW_F2I16_IMM16 (insn) << 16) >> 16;
405 return 1;
406 }
407 else if (op->match == MATCH_R2_ADDI_N || op->match == MATCH_R2_SUBI_N)
408 {
409 *ra = nios2_r2_reg3_mappings[GET_IW_T2X1I3_A3 (insn)];
410 *rb = nios2_r2_reg3_mappings[GET_IW_T2X1I3_B3 (insn)];
411 *imm = nios2_r2_asi_n_mappings[GET_IW_T2X1I3_IMM3 (insn)];
412 if (op->match == MATCH_R2_SUBI_N)
413 *imm = - (*imm);
414 return 1;
415 }
416 else if (op->match == MATCH_R2_SPADDI_N)
417 {
418 *ra = nios2_r2_reg3_mappings[GET_IW_T1I7_A3 (insn)];
419 *rb = NIOS2_SP_REGNUM;
420 *imm = GET_IW_T1I7_IMM7 (insn) << 2;
421 return 1;
422 }
423 else if (op->match == MATCH_R2_SPINCI_N || op->match == MATCH_R2_SPDECI_N)
424 {
425 *ra = NIOS2_SP_REGNUM;
426 *rb = NIOS2_SP_REGNUM;
427 *imm = GET_IW_X1I7_IMM7 (insn) << 2;
428 if (op->match == MATCH_R2_SPDECI_N)
429 *imm = - (*imm);
430 return 1;
431 }
432 return 0;
433 }
434
435 /* Match and disassemble an ORHI-type instruction, with 2 register operands
436 and one unsigned immediate operand.
437 Returns true on success, and fills in the operand pointers. */
438
439 static int
440 nios2_match_orhi (uint32_t insn, const struct nios2_opcode *op,
441 unsigned long mach, int *ra, int *rb, unsigned int *uimm)
442 {
443 int is_r2 = (mach == bfd_mach_nios2r2);
444
445 if (!is_r2 && op->match == MATCH_R1_ORHI)
446 {
447 *ra = GET_IW_I_A (insn);
448 *rb = GET_IW_I_B (insn);
449 *uimm = GET_IW_I_IMM16 (insn);
450 return 1;
451 }
452 else if (!is_r2)
453 return 0;
454 else if (op->match == MATCH_R2_ORHI)
455 {
456 *ra = GET_IW_F2I16_A (insn);
457 *rb = GET_IW_F2I16_B (insn);
458 *uimm = GET_IW_F2I16_IMM16 (insn);
459 return 1;
460 }
461 return 0;
462 }
463
464 /* Match and disassemble a STW-type instruction, with 2 register operands
465 and one immediate operand.
466 Returns true on success, and fills in the operand pointers. */
467
468 static int
469 nios2_match_stw (uint32_t insn, const struct nios2_opcode *op,
470 unsigned long mach, int *ra, int *rb, int *imm)
471 {
472 int is_r2 = (mach == bfd_mach_nios2r2);
473
474 if (!is_r2 && (op->match == MATCH_R1_STW || op->match == MATCH_R1_STWIO))
475 {
476 *ra = GET_IW_I_A (insn);
477 *rb = GET_IW_I_B (insn);
478 *imm = (signed) (GET_IW_I_IMM16 (insn) << 16) >> 16;
479 return 1;
480 }
481 else if (!is_r2)
482 return 0;
483 else if (op->match == MATCH_R2_STW)
484 {
485 *ra = GET_IW_F2I16_A (insn);
486 *rb = GET_IW_F2I16_B (insn);
487 *imm = (signed) (GET_IW_F2I16_IMM16 (insn) << 16) >> 16;
488 return 1;
489 }
490 else if (op->match == MATCH_R2_STWIO)
491 {
492 *ra = GET_IW_F2X4I12_A (insn);
493 *rb = GET_IW_F2X4I12_B (insn);
494 *imm = (signed) (GET_IW_F2X4I12_IMM12 (insn) << 20) >> 20;
495 return 1;
496 }
497 else if (op->match == MATCH_R2_STW_N)
498 {
499 *ra = nios2_r2_reg3_mappings[GET_IW_T2I4_A3 (insn)];
500 *rb = nios2_r2_reg3_mappings[GET_IW_T2I4_B3 (insn)];
501 *imm = GET_IW_T2I4_IMM4 (insn) << 2;
502 return 1;
503 }
504 else if (op->match == MATCH_R2_STWSP_N)
505 {
506 *ra = NIOS2_SP_REGNUM;
507 *rb = GET_IW_F1I5_B (insn);
508 *imm = GET_IW_F1I5_IMM5 (insn) << 2;
509 return 1;
510 }
511 else if (op->match == MATCH_R2_STWZ_N)
512 {
513 *ra = nios2_r2_reg3_mappings[GET_IW_T1X1I6_A3 (insn)];
514 *rb = 0;
515 *imm = GET_IW_T1X1I6_IMM6 (insn) << 2;
516 return 1;
517 }
518 return 0;
519 }
520
521 /* Match and disassemble a LDW-type instruction, with 2 register operands
522 and one immediate operand.
523 Returns true on success, and fills in the operand pointers. */
524
525 static int
526 nios2_match_ldw (uint32_t insn, const struct nios2_opcode *op,
527 unsigned long mach, int *ra, int *rb, int *imm)
528 {
529 int is_r2 = (mach == bfd_mach_nios2r2);
530
531 if (!is_r2 && (op->match == MATCH_R1_LDW || op->match == MATCH_R1_LDWIO))
532 {
533 *ra = GET_IW_I_A (insn);
534 *rb = GET_IW_I_B (insn);
535 *imm = (signed) (GET_IW_I_IMM16 (insn) << 16) >> 16;
536 return 1;
537 }
538 else if (!is_r2)
539 return 0;
540 else if (op->match == MATCH_R2_LDW)
541 {
542 *ra = GET_IW_F2I16_A (insn);
543 *rb = GET_IW_F2I16_B (insn);
544 *imm = (signed) (GET_IW_F2I16_IMM16 (insn) << 16) >> 16;
545 return 1;
546 }
547 else if (op->match == MATCH_R2_LDWIO)
548 {
549 *ra = GET_IW_F2X4I12_A (insn);
550 *rb = GET_IW_F2X4I12_B (insn);
551 *imm = (signed) (GET_IW_F2X4I12_IMM12 (insn) << 20) >> 20;
552 return 1;
553 }
554 else if (op->match == MATCH_R2_LDW_N)
555 {
556 *ra = nios2_r2_reg3_mappings[GET_IW_T2I4_A3 (insn)];
557 *rb = nios2_r2_reg3_mappings[GET_IW_T2I4_B3 (insn)];
558 *imm = GET_IW_T2I4_IMM4 (insn) << 2;
559 return 1;
560 }
561 else if (op->match == MATCH_R2_LDWSP_N)
562 {
563 *ra = NIOS2_SP_REGNUM;
564 *rb = GET_IW_F1I5_B (insn);
565 *imm = GET_IW_F1I5_IMM5 (insn) << 2;
566 return 1;
567 }
568 return 0;
569 }
570
571 /* Match and disassemble a RDCTL instruction, with 2 register operands.
572 Returns true on success, and fills in the operand pointers. */
573
574 static int
575 nios2_match_rdctl (uint32_t insn, const struct nios2_opcode *op,
576 unsigned long mach, int *ra, int *rc)
577 {
578 int is_r2 = (mach == bfd_mach_nios2r2);
579
580 if (!is_r2 && (op->match == MATCH_R1_RDCTL))
581 {
582 *ra = GET_IW_R_IMM5 (insn);
583 *rc = GET_IW_R_C (insn);
584 return 1;
585 }
586 else if (!is_r2)
587 return 0;
588 else if (op->match == MATCH_R2_RDCTL)
589 {
590 *ra = GET_IW_F3X6L5_IMM5 (insn);
591 *rc = GET_IW_F3X6L5_C (insn);
592 return 1;
593 }
594 return 0;
595 }
596
597 /* Match and disassemble a PUSH.N or STWM instruction.
598 Returns true on success, and fills in the operand pointers. */
599
600 static int
601 nios2_match_stwm (uint32_t insn, const struct nios2_opcode *op,
602 unsigned long mach, unsigned int *reglist,
603 int *ra, int *imm, int *wb, int *id)
604 {
605 int is_r2 = (mach == bfd_mach_nios2r2);
606
607 if (!is_r2)
608 return 0;
609 else if (op->match == MATCH_R2_PUSH_N)
610 {
611 *reglist = 1 << 31;
612 if (GET_IW_L5I4X1_FP (insn))
613 *reglist |= (1 << 28);
614 if (GET_IW_L5I4X1_CS (insn))
615 {
616 int val = GET_IW_L5I4X1_REGRANGE (insn);
617 *reglist |= nios2_r2_reg_range_mappings[val];
618 }
619 *ra = NIOS2_SP_REGNUM;
620 *imm = GET_IW_L5I4X1_IMM4 (insn) << 2;
621 *wb = 1;
622 *id = 0;
623 return 1;
624 }
625 else if (op->match == MATCH_R2_STWM)
626 {
627 unsigned int rawmask = GET_IW_F1X4L17_REGMASK (insn);
628 if (GET_IW_F1X4L17_RS (insn))
629 {
630 *reglist = ((rawmask << 14) & 0x00ffc000);
631 if (rawmask & (1 << 10))
632 *reglist |= (1 << 28);
633 if (rawmask & (1 << 11))
634 *reglist |= (1 << 31);
635 }
636 else
637 *reglist = rawmask << 2;
638 *ra = GET_IW_F1X4L17_A (insn);
639 *imm = 0;
640 *wb = GET_IW_F1X4L17_WB (insn);
641 *id = GET_IW_F1X4L17_ID (insn);
642 return 1;
643 }
644 return 0;
645 }
646
647 /* Match and disassemble a POP.N or LDWM instruction.
648 Returns true on success, and fills in the operand pointers. */
649
650 static int
651 nios2_match_ldwm (uint32_t insn, const struct nios2_opcode *op,
652 unsigned long mach, unsigned int *reglist,
653 int *ra, int *imm, int *wb, int *id, int *ret)
654 {
655 int is_r2 = (mach == bfd_mach_nios2r2);
656
657 if (!is_r2)
658 return 0;
659 else if (op->match == MATCH_R2_POP_N)
660 {
661 *reglist = 1 << 31;
662 if (GET_IW_L5I4X1_FP (insn))
663 *reglist |= (1 << 28);
664 if (GET_IW_L5I4X1_CS (insn))
665 {
666 int val = GET_IW_L5I4X1_REGRANGE (insn);
667 *reglist |= nios2_r2_reg_range_mappings[val];
668 }
669 *ra = NIOS2_SP_REGNUM;
670 *imm = GET_IW_L5I4X1_IMM4 (insn) << 2;
671 *wb = 1;
672 *id = 1;
673 *ret = 1;
674 return 1;
675 }
676 else if (op->match == MATCH_R2_LDWM)
677 {
678 unsigned int rawmask = GET_IW_F1X4L17_REGMASK (insn);
679 if (GET_IW_F1X4L17_RS (insn))
680 {
681 *reglist = ((rawmask << 14) & 0x00ffc000);
682 if (rawmask & (1 << 10))
683 *reglist |= (1 << 28);
684 if (rawmask & (1 << 11))
685 *reglist |= (1 << 31);
686 }
687 else
688 *reglist = rawmask << 2;
689 *ra = GET_IW_F1X4L17_A (insn);
690 *imm = 0;
691 *wb = GET_IW_F1X4L17_WB (insn);
692 *id = GET_IW_F1X4L17_ID (insn);
693 *ret = GET_IW_F1X4L17_PC (insn);
694 return 1;
695 }
696 return 0;
697 }
698
699 /* Match and disassemble a branch instruction, with (potentially)
700 2 register operands and one immediate operand.
701 Returns true on success, and fills in the operand pointers. */
702
703 enum branch_condition {
704 branch_none,
705 branch_eq,
706 branch_ne,
707 branch_ge,
708 branch_geu,
709 branch_lt,
710 branch_ltu
711 };
712
713 static int
714 nios2_match_branch (uint32_t insn, const struct nios2_opcode *op,
715 unsigned long mach, int *ra, int *rb, int *imm,
716 enum branch_condition *cond)
717 {
718 int is_r2 = (mach == bfd_mach_nios2r2);
719
720 if (!is_r2)
721 {
722 switch (op->match)
723 {
724 case MATCH_R1_BR:
725 *cond = branch_none;
726 break;
727 case MATCH_R1_BEQ:
728 *cond = branch_eq;
729 break;
730 case MATCH_R1_BNE:
731 *cond = branch_ne;
732 break;
733 case MATCH_R1_BGE:
734 *cond = branch_ge;
735 break;
736 case MATCH_R1_BGEU:
737 *cond = branch_geu;
738 break;
739 case MATCH_R1_BLT:
740 *cond = branch_lt;
741 break;
742 case MATCH_R1_BLTU:
743 *cond = branch_ltu;
744 break;
745 default:
746 return 0;
747 }
748 *imm = (signed) (GET_IW_I_IMM16 (insn) << 16) >> 16;
749 *ra = GET_IW_I_A (insn);
750 *rb = GET_IW_I_B (insn);
751 return 1;
752 }
753 else
754 {
755 switch (op->match)
756 {
757 case MATCH_R2_BR_N:
758 *cond = branch_none;
759 *ra = NIOS2_Z_REGNUM;
760 *rb = NIOS2_Z_REGNUM;
761 *imm = (signed) ((GET_IW_I10_IMM10 (insn) << 1) << 21) >> 21;
762 return 1;
763 case MATCH_R2_BEQZ_N:
764 *cond = branch_eq;
765 *ra = nios2_r2_reg3_mappings[GET_IW_T1I7_A3 (insn)];
766 *rb = NIOS2_Z_REGNUM;
767 *imm = (signed) ((GET_IW_T1I7_IMM7 (insn) << 1) << 24) >> 24;
768 return 1;
769 case MATCH_R2_BNEZ_N:
770 *cond = branch_ne;
771 *ra = nios2_r2_reg3_mappings[GET_IW_T1I7_A3 (insn)];
772 *rb = NIOS2_Z_REGNUM;
773 *imm = (signed) ((GET_IW_T1I7_IMM7 (insn) << 1) << 24) >> 24;
774 return 1;
775 case MATCH_R2_BR:
776 *cond = branch_none;
777 break;
778 case MATCH_R2_BEQ:
779 *cond = branch_eq;
780 break;
781 case MATCH_R2_BNE:
782 *cond = branch_ne;
783 break;
784 case MATCH_R2_BGE:
785 *cond = branch_ge;
786 break;
787 case MATCH_R2_BGEU:
788 *cond = branch_geu;
789 break;
790 case MATCH_R2_BLT:
791 *cond = branch_lt;
792 break;
793 case MATCH_R2_BLTU:
794 *cond = branch_ltu;
795 break;
796 default:
797 return 0;
798 }
799 *ra = GET_IW_F2I16_A (insn);
800 *rb = GET_IW_F2I16_B (insn);
801 *imm = (signed) (GET_IW_F2I16_IMM16 (insn) << 16) >> 16;
802 return 1;
803 }
804 return 0;
805 }
806
807 /* Match and disassemble a direct jump instruction, with an
808 unsigned operand. Returns true on success, and fills in the operand
809 pointer. */
810
811 static int
812 nios2_match_jmpi (uint32_t insn, const struct nios2_opcode *op,
813 unsigned long mach, unsigned int *uimm)
814 {
815 int is_r2 = (mach == bfd_mach_nios2r2);
816
817 if (!is_r2 && op->match == MATCH_R1_JMPI)
818 {
819 *uimm = GET_IW_J_IMM26 (insn) << 2;
820 return 1;
821 }
822 else if (!is_r2)
823 return 0;
824 else if (op->match == MATCH_R2_JMPI)
825 {
826 *uimm = GET_IW_L26_IMM26 (insn) << 2;
827 return 1;
828 }
829 return 0;
830 }
831
832 /* Match and disassemble a direct call instruction, with an
833 unsigned operand. Returns true on success, and fills in the operand
834 pointer. */
835
836 static int
837 nios2_match_calli (uint32_t insn, const struct nios2_opcode *op,
838 unsigned long mach, unsigned int *uimm)
839 {
840 int is_r2 = (mach == bfd_mach_nios2r2);
841
842 if (!is_r2 && op->match == MATCH_R1_CALL)
843 {
844 *uimm = GET_IW_J_IMM26 (insn) << 2;
845 return 1;
846 }
847 else if (!is_r2)
848 return 0;
849 else if (op->match == MATCH_R2_CALL)
850 {
851 *uimm = GET_IW_L26_IMM26 (insn) << 2;
852 return 1;
853 }
854 return 0;
855 }
856
857 /* Match and disassemble an indirect jump instruction, with a
858 (possibly implicit) register operand. Returns true on success, and fills
859 in the operand pointer. */
860
861 static int
862 nios2_match_jmpr (uint32_t insn, const struct nios2_opcode *op,
863 unsigned long mach, int *ra)
864 {
865 int is_r2 = (mach == bfd_mach_nios2r2);
866
867 if (!is_r2)
868 switch (op->match)
869 {
870 case MATCH_R1_JMP:
871 *ra = GET_IW_I_A (insn);
872 return 1;
873 case MATCH_R1_RET:
874 *ra = NIOS2_RA_REGNUM;
875 return 1;
876 case MATCH_R1_ERET:
877 *ra = NIOS2_EA_REGNUM;
878 return 1;
879 case MATCH_R1_BRET:
880 *ra = NIOS2_BA_REGNUM;
881 return 1;
882 default:
883 return 0;
884 }
885 else
886 switch (op->match)
887 {
888 case MATCH_R2_JMP:
889 *ra = GET_IW_F2I16_A (insn);
890 return 1;
891 case MATCH_R2_JMPR_N:
892 *ra = GET_IW_F1X1_A (insn);
893 return 1;
894 case MATCH_R2_RET:
895 case MATCH_R2_RET_N:
896 *ra = NIOS2_RA_REGNUM;
897 return 1;
898 case MATCH_R2_ERET:
899 *ra = NIOS2_EA_REGNUM;
900 return 1;
901 case MATCH_R2_BRET:
902 *ra = NIOS2_BA_REGNUM;
903 return 1;
904 default:
905 return 0;
906 }
907 return 0;
908 }
909
910 /* Match and disassemble an indirect call instruction, with a register
911 operand. Returns true on success, and fills in the operand pointer. */
912
913 static int
914 nios2_match_callr (uint32_t insn, const struct nios2_opcode *op,
915 unsigned long mach, int *ra)
916 {
917 int is_r2 = (mach == bfd_mach_nios2r2);
918
919 if (!is_r2 && op->match == MATCH_R1_CALLR)
920 {
921 *ra = GET_IW_I_A (insn);
922 return 1;
923 }
924 else if (!is_r2)
925 return 0;
926 else if (op->match == MATCH_R2_CALLR)
927 {
928 *ra = GET_IW_F2I16_A (insn);
929 return 1;
930 }
931 else if (op->match == MATCH_R2_CALLR_N)
932 {
933 *ra = GET_IW_F1X1_A (insn);
934 return 1;
935 }
936 return 0;
937 }
938
939 /* Match and disassemble a break instruction, with an unsigned operand.
940 Returns true on success, and fills in the operand pointer. */
941
942 static int
943 nios2_match_break (uint32_t insn, const struct nios2_opcode *op,
944 unsigned long mach, unsigned int *uimm)
945 {
946 int is_r2 = (mach == bfd_mach_nios2r2);
947
948 if (!is_r2 && op->match == MATCH_R1_BREAK)
949 {
950 *uimm = GET_IW_R_IMM5 (insn);
951 return 1;
952 }
953 else if (!is_r2)
954 return 0;
955 else if (op->match == MATCH_R2_BREAK)
956 {
957 *uimm = GET_IW_F3X6L5_IMM5 (insn);
958 return 1;
959 }
960 else if (op->match == MATCH_R2_BREAK_N)
961 {
962 *uimm = GET_IW_X2L5_IMM5 (insn);
963 return 1;
964 }
965 return 0;
966 }
967
968 /* Match and disassemble a trap instruction, with an unsigned operand.
969 Returns true on success, and fills in the operand pointer. */
970
971 static int
972 nios2_match_trap (uint32_t insn, const struct nios2_opcode *op,
973 unsigned long mach, unsigned int *uimm)
974 {
975 int is_r2 = (mach == bfd_mach_nios2r2);
976
977 if (!is_r2 && op->match == MATCH_R1_TRAP)
978 {
979 *uimm = GET_IW_R_IMM5 (insn);
980 return 1;
981 }
982 else if (!is_r2)
983 return 0;
984 else if (op->match == MATCH_R2_TRAP)
985 {
986 *uimm = GET_IW_F3X6L5_IMM5 (insn);
987 return 1;
988 }
989 else if (op->match == MATCH_R2_TRAP_N)
990 {
991 *uimm = GET_IW_X2L5_IMM5 (insn);
992 return 1;
993 }
994 return 0;
995 }
996
997 /* Helper function to identify when we're in a function epilogue;
998 that is, the part of the function from the point at which the
999 stack adjustments are made, to the return or sibcall.
1000 Note that we may have several stack adjustment instructions, and
1001 this function needs to test whether the stack teardown has already
1002 started before current_pc, not whether it has completed. */
1003
1004 static int
1005 nios2_in_epilogue_p (struct gdbarch *gdbarch,
1006 CORE_ADDR current_pc,
1007 CORE_ADDR start_pc)
1008 {
1009 unsigned long mach = gdbarch_bfd_arch_info (gdbarch)->mach;
1010 int is_r2 = (mach == bfd_mach_nios2r2);
1011 /* Maximum number of possibly-epilogue instructions to check.
1012 Note that this number should not be too large, else we can
1013 potentially end up iterating through unmapped memory. */
1014 int ninsns, max_insns = 5;
1015 unsigned int insn;
1016 const struct nios2_opcode *op = NULL;
1017 unsigned int uimm;
1018 int imm;
1019 int wb, id, ret;
1020 int ra, rb, rc;
1021 enum branch_condition cond;
1022 CORE_ADDR pc;
1023
1024 /* There has to be a previous instruction in the function. */
1025 if (current_pc <= start_pc)
1026 return 0;
1027
1028 /* Find the previous instruction before current_pc. For R2, it might
1029 be either a 16-bit or 32-bit instruction; the only way to know for
1030 sure is to scan through from the beginning of the function,
1031 disassembling as we go. */
1032 if (is_r2)
1033 for (pc = start_pc; ; )
1034 {
1035 op = nios2_fetch_insn (gdbarch, pc, &insn);
1036 if (op == NULL)
1037 return 0;
1038 if (pc + op->size < current_pc)
1039 pc += op->size;
1040 else
1041 break;
1042 /* We can skip over insns to a forward branch target. Since
1043 the branch offset is relative to the next instruction,
1044 it's correct to do this after incrementing the pc above. */
1045 if (nios2_match_branch (insn, op, mach, &ra, &rb, &imm, &cond)
1046 && imm > 0
1047 && pc + imm < current_pc)
1048 pc += imm;
1049 }
1050 /* Otherwise just go back to the previous 32-bit insn. */
1051 else
1052 pc = current_pc - NIOS2_OPCODE_SIZE;
1053
1054 /* Beginning with the previous instruction we just located, check whether
1055 we are in a sequence of at least one stack adjustment instruction.
1056 Possible instructions here include:
1057 ADDI sp, sp, n
1058 ADD sp, sp, rn
1059 LDW sp, n(sp)
1060 SPINCI.N n
1061 LDWSP.N sp, n(sp)
1062 LDWM {reglist}, (sp)++, wb */
1063 for (ninsns = 0; ninsns < max_insns; ninsns++)
1064 {
1065 int ok = 0;
1066
1067 /* Fetch the insn at pc. */
1068 op = nios2_fetch_insn (gdbarch, pc, &insn);
1069 if (op == NULL)
1070 return 0;
1071 pc += op->size;
1072
1073 /* Was it a stack adjustment? */
1074 if (nios2_match_addi (insn, op, mach, &ra, &rb, &imm))
1075 ok = (rb == NIOS2_SP_REGNUM);
1076 else if (nios2_match_add (insn, op, mach, &ra, &rb, &rc))
1077 ok = (rc == NIOS2_SP_REGNUM);
1078 else if (nios2_match_ldw (insn, op, mach, &ra, &rb, &imm))
1079 ok = (rb == NIOS2_SP_REGNUM);
1080 else if (nios2_match_ldwm (insn, op, mach, &uimm, &ra,
1081 &imm, &wb, &ret, &id))
1082 ok = (ra == NIOS2_SP_REGNUM && wb && id);
1083 if (!ok)
1084 break;
1085 }
1086
1087 /* No stack adjustments found. */
1088 if (ninsns == 0)
1089 return 0;
1090
1091 /* We found more stack adjustments than we expect GCC to be generating.
1092 Since it looks like a stack unwind might be in progress tell GDB to
1093 treat it as such. */
1094 if (ninsns == max_insns)
1095 return 1;
1096
1097 /* The next instruction following the stack adjustments must be a
1098 return, jump, or unconditional branch, or a CDX pop.n or ldwm
1099 that does an implicit return. */
1100 if (nios2_match_jmpr (insn, op, mach, &ra)
1101 || nios2_match_jmpi (insn, op, mach, &uimm)
1102 || (nios2_match_ldwm (insn, op, mach, &uimm, &ra, &imm, &wb, &id, &ret)
1103 && ret)
1104 || (nios2_match_branch (insn, op, mach, &ra, &rb, &imm, &cond)
1105 && cond == branch_none))
1106 return 1;
1107
1108 return 0;
1109 }
1110
1111 /* Implement the stack_frame_destroyed_p gdbarch method. */
1112
1113 static int
1114 nios2_stack_frame_destroyed_p (struct gdbarch *gdbarch, CORE_ADDR pc)
1115 {
1116 CORE_ADDR func_addr;
1117
1118 if (find_pc_partial_function (pc, NULL, &func_addr, NULL))
1119 return nios2_in_epilogue_p (gdbarch, pc, func_addr);
1120
1121 return 0;
1122 }
1123
1124 /* Do prologue analysis, returning the PC of the first instruction
1125 after the function prologue. Assumes CACHE has already been
1126 initialized. THIS_FRAME can be null, in which case we are only
1127 interested in skipping the prologue. Otherwise CACHE is filled in
1128 from the frame information.
1129
1130 The prologue may consist of the following parts:
1131 1) Profiling instrumentation. For non-PIC code it looks like:
1132 mov r8, ra
1133 call mcount
1134 mov ra, r8
1135
1136 2) A stack adjustment and save of R4-R7 for varargs functions.
1137 For R2 CDX this is typically handled with a STWM, otherwise
1138 this is typically merged with item 3.
1139
1140 3) A stack adjustment and save of the callee-saved registers.
1141 For R2 CDX these are typically handled with a PUSH.N or STWM,
1142 otherwise as an explicit SP decrement and individual register
1143 saves.
1144
1145 There may also be a stack switch here in an exception handler
1146 in place of a stack adjustment. It looks like:
1147 movhi rx, %hiadj(newstack)
1148 addhi rx, rx, %lo(newstack)
1149 stw sp, constant(rx)
1150 mov sp, rx
1151
1152 4) A frame pointer save, which can be either a MOV or ADDI.
1153
1154 5) A further stack pointer adjustment. This is normally included
1155 adjustment in step 3 unless the total adjustment is too large
1156 to be done in one step.
1157
1158 7) A stack overflow check, which can take either of these forms:
1159 bgeu sp, rx, +8
1160 trap 3
1161 or
1162 bltu sp, rx, .Lstack_overflow
1163 ...
1164 .Lstack_overflow:
1165 trap 3
1166
1167 Older versions of GCC emitted "break 3" instead of "trap 3" here,
1168 so we check for both cases.
1169
1170 Older GCC versions emitted stack overflow checks after the SP
1171 adjustments in both steps 3 and 4. Starting with GCC 6, there is
1172 at most one overflow check, which is placed before the first
1173 stack adjustment for R2 CDX and after the first stack adjustment
1174 otherwise.
1175
1176 The prologue instructions may be combined or interleaved with other
1177 instructions.
1178
1179 To cope with all this variability we decode all the instructions
1180 from the start of the prologue until we hit an instruction that
1181 cannot possibly be a prologue instruction, such as a branch, call,
1182 return, or epilogue instruction. The prologue is considered to end
1183 at the last instruction that can definitely be considered a
1184 prologue instruction. */
1185
1186 static CORE_ADDR
1187 nios2_analyze_prologue (struct gdbarch *gdbarch, const CORE_ADDR start_pc,
1188 const CORE_ADDR current_pc,
1189 struct nios2_unwind_cache *cache,
1190 struct frame_info *this_frame)
1191 {
1192 /* Maximum number of possibly-prologue instructions to check.
1193 Note that this number should not be too large, else we can
1194 potentially end up iterating through unmapped memory. */
1195 int ninsns, max_insns = 50;
1196 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1197 unsigned long mach = gdbarch_bfd_arch_info (gdbarch)->mach;
1198
1199 /* Does the frame set up the FP register? */
1200 int base_reg = 0;
1201
1202 struct reg_value *value = cache->reg_value;
1203 struct reg_value temp_value[NIOS2_NUM_REGS];
1204
1205 int i;
1206
1207 /* Save the starting PC so we can correct the pc after running
1208 through the prolog, using symbol info. */
1209 CORE_ADDR pc = start_pc;
1210
1211 /* Is this an exception handler? */
1212 int exception_handler = 0;
1213
1214 /* What was the original value of SP (or fake original value for
1215 functions which switch stacks? */
1216 CORE_ADDR frame_high;
1217
1218 /* The last definitely-prologue instruction seen. */
1219 CORE_ADDR prologue_end;
1220
1221 /* Is this the innermost function? */
1222 int innermost = (this_frame ? (frame_relative_level (this_frame) == 0) : 1);
1223
1224 if (nios2_debug)
1225 fprintf_unfiltered (gdb_stdlog,
1226 "{ nios2_analyze_prologue start=%s, current=%s ",
1227 paddress (gdbarch, start_pc),
1228 paddress (gdbarch, current_pc));
1229
1230 /* Set up the default values of the registers. */
1231 nios2_setup_default (cache);
1232
1233 /* Find the prologue instructions. */
1234 prologue_end = start_pc;
1235 for (ninsns = 0; ninsns < max_insns; ninsns++)
1236 {
1237 /* Present instruction. */
1238 uint32_t insn;
1239 const struct nios2_opcode *op;
1240 int ra, rb, rc, imm;
1241 unsigned int uimm;
1242 unsigned int reglist;
1243 int wb, id, ret;
1244 enum branch_condition cond;
1245
1246 if (pc == current_pc)
1247 {
1248 /* When we reach the current PC we must save the current
1249 register state (for the backtrace) but keep analysing
1250 because there might be more to find out (eg. is this an
1251 exception handler). */
1252 memcpy (temp_value, value, sizeof (temp_value));
1253 value = temp_value;
1254 if (nios2_debug)
1255 fprintf_unfiltered (gdb_stdlog, "*");
1256 }
1257
1258 op = nios2_fetch_insn (gdbarch, pc, &insn);
1259
1260 /* Unknown opcode? Stop scanning. */
1261 if (op == NULL)
1262 break;
1263 pc += op->size;
1264
1265 if (nios2_debug)
1266 {
1267 if (op->size == 2)
1268 fprintf_unfiltered (gdb_stdlog, "[%04X]", insn & 0xffff);
1269 else
1270 fprintf_unfiltered (gdb_stdlog, "[%08X]", insn);
1271 }
1272
1273 /* The following instructions can appear in the prologue. */
1274
1275 if (nios2_match_add (insn, op, mach, &ra, &rb, &rc))
1276 {
1277 /* ADD rc, ra, rb (also used for MOV) */
1278 if (rc == NIOS2_SP_REGNUM
1279 && rb == 0
1280 && value[ra].reg == cache->reg_saved[NIOS2_SP_REGNUM].basereg)
1281 {
1282 /* If the previous value of SP is available somewhere
1283 near the new stack pointer value then this is a
1284 stack switch. */
1285
1286 /* If any registers were saved on the stack before then
1287 we can't backtrace into them now. */
1288 for (i = 0 ; i < NIOS2_NUM_REGS ; i++)
1289 {
1290 if (cache->reg_saved[i].basereg == NIOS2_SP_REGNUM)
1291 cache->reg_saved[i].basereg = -1;
1292 if (value[i].reg == NIOS2_SP_REGNUM)
1293 value[i].reg = -1;
1294 }
1295
1296 /* Create a fake "high water mark" 4 bytes above where SP
1297 was stored and fake up the registers to be consistent
1298 with that. */
1299 value[NIOS2_SP_REGNUM].reg = NIOS2_SP_REGNUM;
1300 value[NIOS2_SP_REGNUM].offset
1301 = (value[ra].offset
1302 - cache->reg_saved[NIOS2_SP_REGNUM].addr
1303 - 4);
1304 cache->reg_saved[NIOS2_SP_REGNUM].basereg = NIOS2_SP_REGNUM;
1305 cache->reg_saved[NIOS2_SP_REGNUM].addr = -4;
1306 }
1307
1308 else if (rc == NIOS2_SP_REGNUM && ra == NIOS2_FP_REGNUM)
1309 /* This is setting SP from FP. This only happens in the
1310 function epilogue. */
1311 break;
1312
1313 else if (rc != 0)
1314 {
1315 if (value[rb].reg == 0)
1316 value[rc].reg = value[ra].reg;
1317 else if (value[ra].reg == 0)
1318 value[rc].reg = value[rb].reg;
1319 else
1320 value[rc].reg = -1;
1321 value[rc].offset = value[ra].offset + value[rb].offset;
1322 }
1323
1324 /* The add/move is only considered a prologue instruction
1325 if the destination is SP or FP. */
1326 if (rc == NIOS2_SP_REGNUM || rc == NIOS2_FP_REGNUM)
1327 prologue_end = pc;
1328 }
1329
1330 else if (nios2_match_sub (insn, op, mach, &ra, &rb, &rc))
1331 {
1332 /* SUB rc, ra, rb */
1333 if (rc == NIOS2_SP_REGNUM && rb == NIOS2_SP_REGNUM
1334 && value[rc].reg != 0)
1335 /* If we are decrementing the SP by a non-constant amount,
1336 this is alloca, not part of the prologue. */
1337 break;
1338 else if (rc != 0)
1339 {
1340 if (value[rb].reg == 0)
1341 value[rc].reg = value[ra].reg;
1342 else
1343 value[rc].reg = -1;
1344 value[rc].offset = value[ra].offset - value[rb].offset;
1345 }
1346 }
1347
1348 else if (nios2_match_addi (insn, op, mach, &ra, &rb, &imm))
1349 {
1350 /* ADDI rb, ra, imm */
1351
1352 /* A positive stack adjustment has to be part of the epilogue. */
1353 if (rb == NIOS2_SP_REGNUM
1354 && (imm > 0 || value[ra].reg != NIOS2_SP_REGNUM))
1355 break;
1356
1357 /* Likewise restoring SP from FP. */
1358 else if (rb == NIOS2_SP_REGNUM && ra == NIOS2_FP_REGNUM)
1359 break;
1360
1361 if (rb != 0)
1362 {
1363 value[rb].reg = value[ra].reg;
1364 value[rb].offset = value[ra].offset + imm;
1365 }
1366
1367 /* The add is only considered a prologue instruction
1368 if the destination is SP or FP. */
1369 if (rb == NIOS2_SP_REGNUM || rb == NIOS2_FP_REGNUM)
1370 prologue_end = pc;
1371 }
1372
1373 else if (nios2_match_orhi (insn, op, mach, &ra, &rb, &uimm))
1374 {
1375 /* ORHI rb, ra, uimm (also used for MOVHI) */
1376 if (rb != 0)
1377 {
1378 value[rb].reg = (value[ra].reg == 0) ? 0 : -1;
1379 value[rb].offset = value[ra].offset | (uimm << 16);
1380 }
1381 }
1382
1383 else if (nios2_match_stw (insn, op, mach, &ra, &rb, &imm))
1384 {
1385 /* STW rb, imm(ra) */
1386
1387 /* Are we storing the original value of a register to the stack?
1388 For exception handlers the value of EA-4 (return
1389 address from interrupts etc) is sometimes stored. */
1390 int orig = value[rb].reg;
1391 if (orig > 0
1392 && (value[rb].offset == 0
1393 || (orig == NIOS2_EA_REGNUM && value[rb].offset == -4))
1394 && value[ra].reg == NIOS2_SP_REGNUM)
1395 {
1396 if (pc < current_pc)
1397 {
1398 /* Save off callee saved registers. */
1399 cache->reg_saved[orig].basereg = value[ra].reg;
1400 cache->reg_saved[orig].addr = value[ra].offset + imm;
1401 }
1402
1403 prologue_end = pc;
1404
1405 if (orig == NIOS2_EA_REGNUM || orig == NIOS2_ESTATUS_REGNUM)
1406 exception_handler = 1;
1407 }
1408 else
1409 /* Non-stack memory writes cannot appear in the prologue. */
1410 break;
1411 }
1412
1413 else if (nios2_match_stwm (insn, op, mach,
1414 &reglist, &ra, &imm, &wb, &id))
1415 {
1416 /* PUSH.N {reglist}, adjust
1417 or
1418 STWM {reglist}, --(SP)[, writeback] */
1419 int i;
1420 int off = 0;
1421
1422 if (ra != NIOS2_SP_REGNUM || id != 0)
1423 /* This is a non-stack-push memory write and cannot be
1424 part of the prologue. */
1425 break;
1426
1427 for (i = 31; i >= 0; i--)
1428 if (reglist & (1 << i))
1429 {
1430 int orig = value[i].reg;
1431
1432 off += 4;
1433 if (orig > 0 && value[i].offset == 0 && pc < current_pc)
1434 {
1435 cache->reg_saved[orig].basereg
1436 = value[NIOS2_SP_REGNUM].reg;
1437 cache->reg_saved[orig].addr
1438 = value[NIOS2_SP_REGNUM].offset - off;
1439 }
1440 }
1441
1442 if (wb)
1443 value[NIOS2_SP_REGNUM].offset -= off;
1444 value[NIOS2_SP_REGNUM].offset -= imm;
1445
1446 prologue_end = pc;
1447 }
1448
1449 else if (nios2_match_rdctl (insn, op, mach, &ra, &rc))
1450 {
1451 /* RDCTL rC, ctlN
1452 This can appear in exception handlers in combination with
1453 a subsequent save to the stack frame. */
1454 if (rc != 0)
1455 {
1456 value[rc].reg = NIOS2_STATUS_REGNUM + ra;
1457 value[rc].offset = 0;
1458 }
1459 }
1460
1461 else if (nios2_match_calli (insn, op, mach, &uimm))
1462 {
1463 if (value[8].reg == NIOS2_RA_REGNUM
1464 && value[8].offset == 0
1465 && value[NIOS2_SP_REGNUM].reg == NIOS2_SP_REGNUM
1466 && value[NIOS2_SP_REGNUM].offset == 0)
1467 {
1468 /* A CALL instruction. This is treated as a call to mcount
1469 if ra has been stored into r8 beforehand and if it's
1470 before the stack adjust.
1471 Note mcount corrupts r2-r3, r9-r15 & ra. */
1472 for (i = 2 ; i <= 3 ; i++)
1473 value[i].reg = -1;
1474 for (i = 9 ; i <= 15 ; i++)
1475 value[i].reg = -1;
1476 value[NIOS2_RA_REGNUM].reg = -1;
1477
1478 prologue_end = pc;
1479 }
1480
1481 /* Other calls are not part of the prologue. */
1482 else
1483 break;
1484 }
1485
1486 else if (nios2_match_branch (insn, op, mach, &ra, &rb, &imm, &cond))
1487 {
1488 /* Branches not involving a stack overflow check aren't part of
1489 the prologue. */
1490 if (ra != NIOS2_SP_REGNUM)
1491 break;
1492 else if (cond == branch_geu)
1493 {
1494 /* BGEU sp, rx, +8
1495 TRAP 3 (or BREAK 3)
1496 This instruction sequence is used in stack checking;
1497 we can ignore it. */
1498 unsigned int next_insn;
1499 const struct nios2_opcode *next_op
1500 = nios2_fetch_insn (gdbarch, pc, &next_insn);
1501 if (next_op != NULL
1502 && (nios2_match_trap (next_insn, op, mach, &uimm)
1503 || nios2_match_break (next_insn, op, mach, &uimm)))
1504 pc += next_op->size;
1505 else
1506 break;
1507 }
1508 else if (cond == branch_ltu)
1509 {
1510 /* BLTU sp, rx, .Lstackoverflow
1511 If the location branched to holds a TRAP or BREAK
1512 instruction then this is also stack overflow detection. */
1513 unsigned int next_insn;
1514 const struct nios2_opcode *next_op
1515 = nios2_fetch_insn (gdbarch, pc + imm, &next_insn);
1516 if (next_op != NULL
1517 && (nios2_match_trap (next_insn, op, mach, &uimm)
1518 || nios2_match_break (next_insn, op, mach, &uimm)))
1519 ;
1520 else
1521 break;
1522 }
1523 else
1524 break;
1525 }
1526
1527 /* All other calls, jumps, returns, TRAPs, or BREAKs terminate
1528 the prologue. */
1529 else if (nios2_match_callr (insn, op, mach, &ra)
1530 || nios2_match_jmpr (insn, op, mach, &ra)
1531 || nios2_match_jmpi (insn, op, mach, &uimm)
1532 || (nios2_match_ldwm (insn, op, mach, &reglist, &ra,
1533 &imm, &wb, &id, &ret)
1534 && ret)
1535 || nios2_match_trap (insn, op, mach, &uimm)
1536 || nios2_match_break (insn, op, mach, &uimm))
1537 break;
1538 }
1539
1540 /* If THIS_FRAME is NULL, we are being called from skip_prologue
1541 and are only interested in the PROLOGUE_END value, so just
1542 return that now and skip over the cache updates, which depend
1543 on having frame information. */
1544 if (this_frame == NULL)
1545 return prologue_end;
1546
1547 /* If we are in the function epilogue and have already popped
1548 registers off the stack in preparation for returning, then we
1549 want to go back to the original register values. */
1550 if (innermost && nios2_in_epilogue_p (gdbarch, current_pc, start_pc))
1551 nios2_setup_default (cache);
1552
1553 /* Exception handlers use a different return address register. */
1554 if (exception_handler)
1555 cache->return_regnum = NIOS2_EA_REGNUM;
1556
1557 if (nios2_debug)
1558 fprintf_unfiltered (gdb_stdlog, "\n-> retreg=%d, ", cache->return_regnum);
1559
1560 if (cache->reg_value[NIOS2_FP_REGNUM].reg == NIOS2_SP_REGNUM)
1561 /* If the FP now holds an offset from the CFA then this is a
1562 normal frame which uses the frame pointer. */
1563 base_reg = NIOS2_FP_REGNUM;
1564 else if (cache->reg_value[NIOS2_SP_REGNUM].reg == NIOS2_SP_REGNUM)
1565 /* FP doesn't hold an offset from the CFA. If SP still holds an
1566 offset from the CFA then we might be in a function which omits
1567 the frame pointer, or we might be partway through the prologue.
1568 In both cases we can find the CFA using SP. */
1569 base_reg = NIOS2_SP_REGNUM;
1570 else
1571 {
1572 /* Somehow the stack pointer has been corrupted.
1573 We can't return. */
1574 if (nios2_debug)
1575 fprintf_unfiltered (gdb_stdlog, "<can't reach cfa> }\n");
1576 return 0;
1577 }
1578
1579 if (cache->reg_value[base_reg].offset == 0
1580 || cache->reg_saved[NIOS2_RA_REGNUM].basereg != NIOS2_SP_REGNUM
1581 || cache->reg_saved[cache->return_regnum].basereg != NIOS2_SP_REGNUM)
1582 {
1583 /* If the frame didn't adjust the stack, didn't save RA or
1584 didn't save EA in an exception handler then it must either
1585 be a leaf function (doesn't call any other functions) or it
1586 can't return. If it has called another function then it
1587 can't be a leaf, so set base == 0 to indicate that we can't
1588 backtrace past it. */
1589
1590 if (!innermost)
1591 {
1592 /* If it isn't the innermost function then it can't be a
1593 leaf, unless it was interrupted. Check whether RA for
1594 this frame is the same as PC. If so then it probably
1595 wasn't interrupted. */
1596 CORE_ADDR ra
1597 = get_frame_register_unsigned (this_frame, NIOS2_RA_REGNUM);
1598
1599 if (ra == current_pc)
1600 {
1601 if (nios2_debug)
1602 fprintf_unfiltered
1603 (gdb_stdlog,
1604 "<noreturn ADJUST %s, r31@r%d+?>, r%d@r%d+?> }\n",
1605 paddress (gdbarch, cache->reg_value[base_reg].offset),
1606 cache->reg_saved[NIOS2_RA_REGNUM].basereg,
1607 cache->return_regnum,
1608 cache->reg_saved[cache->return_regnum].basereg);
1609 return 0;
1610 }
1611 }
1612 }
1613
1614 /* Get the value of whichever register we are using for the
1615 base. */
1616 cache->base = get_frame_register_unsigned (this_frame, base_reg);
1617
1618 /* What was the value of SP at the start of this function (or just
1619 after the stack switch). */
1620 frame_high = cache->base - cache->reg_value[base_reg].offset;
1621
1622 /* Adjust all the saved registers such that they contain addresses
1623 instead of offsets. */
1624 for (i = 0; i < NIOS2_NUM_REGS; i++)
1625 if (cache->reg_saved[i].basereg == NIOS2_SP_REGNUM)
1626 {
1627 cache->reg_saved[i].basereg = NIOS2_Z_REGNUM;
1628 cache->reg_saved[i].addr += frame_high;
1629 }
1630
1631 for (i = 0; i < NIOS2_NUM_REGS; i++)
1632 if (cache->reg_saved[i].basereg == NIOS2_GP_REGNUM)
1633 {
1634 CORE_ADDR gp = get_frame_register_unsigned (this_frame,
1635 NIOS2_GP_REGNUM);
1636
1637 for ( ; i < NIOS2_NUM_REGS; i++)
1638 if (cache->reg_saved[i].basereg == NIOS2_GP_REGNUM)
1639 {
1640 cache->reg_saved[i].basereg = NIOS2_Z_REGNUM;
1641 cache->reg_saved[i].addr += gp;
1642 }
1643 }
1644
1645 /* Work out what the value of SP was on the first instruction of
1646 this function. If we didn't switch stacks then this can be
1647 trivially computed from the base address. */
1648 if (cache->reg_saved[NIOS2_SP_REGNUM].basereg == NIOS2_Z_REGNUM)
1649 cache->cfa
1650 = read_memory_unsigned_integer (cache->reg_saved[NIOS2_SP_REGNUM].addr,
1651 4, byte_order);
1652 else
1653 cache->cfa = frame_high;
1654
1655 /* Exception handlers restore ESTATUS into STATUS. */
1656 if (exception_handler)
1657 {
1658 cache->reg_saved[NIOS2_STATUS_REGNUM]
1659 = cache->reg_saved[NIOS2_ESTATUS_REGNUM];
1660 cache->reg_saved[NIOS2_ESTATUS_REGNUM].basereg = -1;
1661 }
1662
1663 if (nios2_debug)
1664 fprintf_unfiltered (gdb_stdlog, "cfa=%s }\n",
1665 paddress (gdbarch, cache->cfa));
1666
1667 return prologue_end;
1668 }
1669
1670 /* Implement the skip_prologue gdbarch hook. */
1671
1672 static CORE_ADDR
1673 nios2_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR start_pc)
1674 {
1675 CORE_ADDR func_addr;
1676
1677 struct nios2_unwind_cache cache;
1678
1679 /* See if we can determine the end of the prologue via the symbol
1680 table. If so, then return either PC, or the PC after the
1681 prologue, whichever is greater. */
1682 if (find_pc_partial_function (start_pc, NULL, &func_addr, NULL))
1683 {
1684 CORE_ADDR post_prologue_pc
1685 = skip_prologue_using_sal (gdbarch, func_addr);
1686
1687 if (post_prologue_pc != 0)
1688 return std::max (start_pc, post_prologue_pc);
1689 }
1690
1691 /* Prologue analysis does the rest.... */
1692 nios2_init_cache (&cache, start_pc);
1693 return nios2_analyze_prologue (gdbarch, start_pc, start_pc, &cache, NULL);
1694 }
1695
1696 /* Implement the breakpoint_kind_from_pc gdbarch method. */
1697
1698 static int
1699 nios2_breakpoint_kind_from_pc (struct gdbarch *gdbarch, CORE_ADDR *pcptr)
1700 {
1701 unsigned long mach = gdbarch_bfd_arch_info (gdbarch)->mach;
1702
1703 if (mach == bfd_mach_nios2r2)
1704 {
1705 unsigned int insn;
1706 const struct nios2_opcode *op
1707 = nios2_fetch_insn (gdbarch, *pcptr, &insn);
1708
1709 if (op && op->size == NIOS2_CDX_OPCODE_SIZE)
1710 return NIOS2_CDX_OPCODE_SIZE;
1711 else
1712 return NIOS2_OPCODE_SIZE;
1713 }
1714 else
1715 return NIOS2_OPCODE_SIZE;
1716 }
1717
1718 /* Implement the sw_breakpoint_from_kind gdbarch method. */
1719
1720 static const gdb_byte *
1721 nios2_sw_breakpoint_from_kind (struct gdbarch *gdbarch, int kind, int *size)
1722 {
1723 /* The Nios II ABI for Linux says: "Userspace programs should not use
1724 the break instruction and userspace debuggers should not insert
1725 one." and "Userspace breakpoints are accomplished using the trap
1726 instruction with immediate operand 31 (all ones)."
1727
1728 So, we use "trap 31" consistently as the breakpoint on bare-metal
1729 as well as Linux targets. */
1730
1731 /* R2 trap encoding:
1732 ((0x2d << 26) | (0x1f << 21) | (0x1d << 16) | (0x20 << 0))
1733 0xb7fd0020
1734 CDX trap.n encoding:
1735 ((0xd << 12) | (0x1f << 6) | (0x9 << 0))
1736 0xd7c9
1737 Note that code is always little-endian on R2. */
1738 *size = kind;
1739
1740 if (kind == NIOS2_CDX_OPCODE_SIZE)
1741 {
1742 static const gdb_byte cdx_breakpoint_le[] = {0xc9, 0xd7};
1743
1744 return cdx_breakpoint_le;
1745 }
1746 else
1747 {
1748 unsigned long mach = gdbarch_bfd_arch_info (gdbarch)->mach;
1749
1750 if (mach == bfd_mach_nios2r2)
1751 {
1752 static const gdb_byte r2_breakpoint_le[] = {0x20, 0x00, 0xfd, 0xb7};
1753
1754 return r2_breakpoint_le;
1755 }
1756 else
1757 {
1758 enum bfd_endian byte_order_for_code
1759 = gdbarch_byte_order_for_code (gdbarch);
1760 /* R1 trap encoding:
1761 ((0x1d << 17) | (0x2d << 11) | (0x1f << 6) | (0x3a << 0))
1762 0x003b6ffa */
1763 static const gdb_byte r1_breakpoint_le[] = {0xfa, 0x6f, 0x3b, 0x0};
1764 static const gdb_byte r1_breakpoint_be[] = {0x0, 0x3b, 0x6f, 0xfa};
1765
1766 if (byte_order_for_code == BFD_ENDIAN_BIG)
1767 return r1_breakpoint_be;
1768 else
1769 return r1_breakpoint_le;
1770 }
1771 }
1772 }
1773
1774 /* Implement the frame_align gdbarch method. */
1775
1776 static CORE_ADDR
1777 nios2_frame_align (struct gdbarch *gdbarch, CORE_ADDR addr)
1778 {
1779 return align_down (addr, 4);
1780 }
1781
1782
1783 /* Implement the return_value gdbarch method. */
1784
1785 static enum return_value_convention
1786 nios2_return_value (struct gdbarch *gdbarch, struct value *function,
1787 struct type *type, struct regcache *regcache,
1788 gdb_byte *readbuf, const gdb_byte *writebuf)
1789 {
1790 if (TYPE_LENGTH (type) > 8)
1791 return RETURN_VALUE_STRUCT_CONVENTION;
1792
1793 if (readbuf)
1794 nios2_extract_return_value (gdbarch, type, regcache, readbuf);
1795 if (writebuf)
1796 nios2_store_return_value (gdbarch, type, regcache, writebuf);
1797
1798 return RETURN_VALUE_REGISTER_CONVENTION;
1799 }
1800
1801 /* Implement the dummy_id gdbarch method. */
1802
1803 static struct frame_id
1804 nios2_dummy_id (struct gdbarch *gdbarch, struct frame_info *this_frame)
1805 {
1806 return frame_id_build
1807 (get_frame_register_unsigned (this_frame, NIOS2_SP_REGNUM),
1808 get_frame_pc (this_frame));
1809 }
1810
1811 /* Implement the push_dummy_call gdbarch method. */
1812
1813 static CORE_ADDR
1814 nios2_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
1815 struct regcache *regcache, CORE_ADDR bp_addr,
1816 int nargs, struct value **args, CORE_ADDR sp,
1817 int struct_return, CORE_ADDR struct_addr)
1818 {
1819 int argreg;
1820 int argnum;
1821 int len = 0;
1822 int stack_offset = 0;
1823 CORE_ADDR func_addr = find_function_addr (function, NULL);
1824 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1825
1826 /* Set the return address register to point to the entry point of
1827 the program, where a breakpoint lies in wait. */
1828 regcache_cooked_write_signed (regcache, NIOS2_RA_REGNUM, bp_addr);
1829
1830 /* Now make space on the stack for the args. */
1831 for (argnum = 0; argnum < nargs; argnum++)
1832 len += align_up (TYPE_LENGTH (value_type (args[argnum])), 4);
1833 sp -= len;
1834
1835 /* Initialize the register pointer. */
1836 argreg = NIOS2_FIRST_ARGREG;
1837
1838 /* The struct_return pointer occupies the first parameter-passing
1839 register. */
1840 if (struct_return)
1841 regcache_cooked_write_unsigned (regcache, argreg++, struct_addr);
1842
1843 /* Now load as many as possible of the first arguments into
1844 registers, and push the rest onto the stack. Loop through args
1845 from first to last. */
1846 for (argnum = 0; argnum < nargs; argnum++)
1847 {
1848 const gdb_byte *val;
1849 struct value *arg = args[argnum];
1850 struct type *arg_type = check_typedef (value_type (arg));
1851 int len = TYPE_LENGTH (arg_type);
1852
1853 val = value_contents (arg);
1854
1855 /* Copy the argument to general registers or the stack in
1856 register-sized pieces. Large arguments are split between
1857 registers and stack. */
1858 while (len > 0)
1859 {
1860 int partial_len = (len < 4 ? len : 4);
1861
1862 if (argreg <= NIOS2_LAST_ARGREG)
1863 {
1864 /* The argument is being passed in a register. */
1865 CORE_ADDR regval = extract_unsigned_integer (val, partial_len,
1866 byte_order);
1867
1868 regcache_cooked_write_unsigned (regcache, argreg, regval);
1869 argreg++;
1870 }
1871 else
1872 {
1873 /* The argument is being passed on the stack. */
1874 CORE_ADDR addr = sp + stack_offset;
1875
1876 write_memory (addr, val, partial_len);
1877 stack_offset += align_up (partial_len, 4);
1878 }
1879
1880 len -= partial_len;
1881 val += partial_len;
1882 }
1883 }
1884
1885 regcache_cooked_write_signed (regcache, NIOS2_SP_REGNUM, sp);
1886
1887 /* Return adjusted stack pointer. */
1888 return sp;
1889 }
1890
1891 /* Implement the unwind_pc gdbarch method. */
1892
1893 static CORE_ADDR
1894 nios2_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
1895 {
1896 gdb_byte buf[4];
1897
1898 frame_unwind_register (next_frame, NIOS2_PC_REGNUM, buf);
1899 return extract_typed_address (buf, builtin_type (gdbarch)->builtin_func_ptr);
1900 }
1901
1902 /* Implement the unwind_sp gdbarch method. */
1903
1904 static CORE_ADDR
1905 nios2_unwind_sp (struct gdbarch *gdbarch, struct frame_info *this_frame)
1906 {
1907 return frame_unwind_register_unsigned (this_frame, NIOS2_SP_REGNUM);
1908 }
1909
1910 /* Use prologue analysis to fill in the register cache
1911 *THIS_PROLOGUE_CACHE for THIS_FRAME. This function initializes
1912 *THIS_PROLOGUE_CACHE first. */
1913
1914 static struct nios2_unwind_cache *
1915 nios2_frame_unwind_cache (struct frame_info *this_frame,
1916 void **this_prologue_cache)
1917 {
1918 struct gdbarch *gdbarch = get_frame_arch (this_frame);
1919 CORE_ADDR current_pc;
1920 struct nios2_unwind_cache *cache;
1921
1922 if (*this_prologue_cache)
1923 return (struct nios2_unwind_cache *) *this_prologue_cache;
1924
1925 cache = FRAME_OBSTACK_ZALLOC (struct nios2_unwind_cache);
1926 *this_prologue_cache = cache;
1927
1928 /* Zero all fields. */
1929 nios2_init_cache (cache, get_frame_func (this_frame));
1930
1931 /* Prologue analysis does the rest... */
1932 current_pc = get_frame_pc (this_frame);
1933 if (cache->pc != 0)
1934 nios2_analyze_prologue (gdbarch, cache->pc, current_pc, cache, this_frame);
1935
1936 return cache;
1937 }
1938
1939 /* Implement the this_id function for the normal unwinder. */
1940
1941 static void
1942 nios2_frame_this_id (struct frame_info *this_frame, void **this_cache,
1943 struct frame_id *this_id)
1944 {
1945 struct nios2_unwind_cache *cache =
1946 nios2_frame_unwind_cache (this_frame, this_cache);
1947
1948 /* This marks the outermost frame. */
1949 if (cache->base == 0)
1950 return;
1951
1952 *this_id = frame_id_build (cache->cfa, cache->pc);
1953 }
1954
1955 /* Implement the prev_register function for the normal unwinder. */
1956
1957 static struct value *
1958 nios2_frame_prev_register (struct frame_info *this_frame, void **this_cache,
1959 int regnum)
1960 {
1961 struct nios2_unwind_cache *cache =
1962 nios2_frame_unwind_cache (this_frame, this_cache);
1963
1964 gdb_assert (regnum >= 0 && regnum < NIOS2_NUM_REGS);
1965
1966 /* The PC of the previous frame is stored in the RA register of
1967 the current frame. Frob regnum so that we pull the value from
1968 the correct place. */
1969 if (regnum == NIOS2_PC_REGNUM)
1970 regnum = cache->return_regnum;
1971
1972 if (regnum == NIOS2_SP_REGNUM && cache->cfa)
1973 return frame_unwind_got_constant (this_frame, regnum, cache->cfa);
1974
1975 /* If we've worked out where a register is stored then load it from
1976 there. */
1977 if (cache->reg_saved[regnum].basereg == NIOS2_Z_REGNUM)
1978 return frame_unwind_got_memory (this_frame, regnum,
1979 cache->reg_saved[regnum].addr);
1980
1981 return frame_unwind_got_register (this_frame, regnum, regnum);
1982 }
1983
1984 /* Implement the this_base, this_locals, and this_args hooks
1985 for the normal unwinder. */
1986
1987 static CORE_ADDR
1988 nios2_frame_base_address (struct frame_info *this_frame, void **this_cache)
1989 {
1990 struct nios2_unwind_cache *info
1991 = nios2_frame_unwind_cache (this_frame, this_cache);
1992
1993 return info->base;
1994 }
1995
1996 /* Data structures for the normal prologue-analysis-based
1997 unwinder. */
1998
1999 static const struct frame_unwind nios2_frame_unwind =
2000 {
2001 NORMAL_FRAME,
2002 default_frame_unwind_stop_reason,
2003 nios2_frame_this_id,
2004 nios2_frame_prev_register,
2005 NULL,
2006 default_frame_sniffer
2007 };
2008
2009 static const struct frame_base nios2_frame_base =
2010 {
2011 &nios2_frame_unwind,
2012 nios2_frame_base_address,
2013 nios2_frame_base_address,
2014 nios2_frame_base_address
2015 };
2016
2017 /* Fill in the register cache *THIS_CACHE for THIS_FRAME for use
2018 in the stub unwinder. */
2019
2020 static struct trad_frame_cache *
2021 nios2_stub_frame_cache (struct frame_info *this_frame, void **this_cache)
2022 {
2023 CORE_ADDR pc;
2024 CORE_ADDR start_addr;
2025 CORE_ADDR stack_addr;
2026 struct trad_frame_cache *this_trad_cache;
2027 struct gdbarch *gdbarch = get_frame_arch (this_frame);
2028
2029 if (*this_cache != NULL)
2030 return (struct trad_frame_cache *) *this_cache;
2031 this_trad_cache = trad_frame_cache_zalloc (this_frame);
2032 *this_cache = this_trad_cache;
2033
2034 /* The return address is in the link register. */
2035 trad_frame_set_reg_realreg (this_trad_cache,
2036 gdbarch_pc_regnum (gdbarch),
2037 NIOS2_RA_REGNUM);
2038
2039 /* Frame ID, since it's a frameless / stackless function, no stack
2040 space is allocated and SP on entry is the current SP. */
2041 pc = get_frame_pc (this_frame);
2042 find_pc_partial_function (pc, NULL, &start_addr, NULL);
2043 stack_addr = get_frame_register_unsigned (this_frame, NIOS2_SP_REGNUM);
2044 trad_frame_set_id (this_trad_cache, frame_id_build (start_addr, stack_addr));
2045 /* Assume that the frame's base is the same as the stack pointer. */
2046 trad_frame_set_this_base (this_trad_cache, stack_addr);
2047
2048 return this_trad_cache;
2049 }
2050
2051 /* Implement the this_id function for the stub unwinder. */
2052
2053 static void
2054 nios2_stub_frame_this_id (struct frame_info *this_frame, void **this_cache,
2055 struct frame_id *this_id)
2056 {
2057 struct trad_frame_cache *this_trad_cache
2058 = nios2_stub_frame_cache (this_frame, this_cache);
2059
2060 trad_frame_get_id (this_trad_cache, this_id);
2061 }
2062
2063 /* Implement the prev_register function for the stub unwinder. */
2064
2065 static struct value *
2066 nios2_stub_frame_prev_register (struct frame_info *this_frame,
2067 void **this_cache, int regnum)
2068 {
2069 struct trad_frame_cache *this_trad_cache
2070 = nios2_stub_frame_cache (this_frame, this_cache);
2071
2072 return trad_frame_get_register (this_trad_cache, this_frame, regnum);
2073 }
2074
2075 /* Implement the sniffer function for the stub unwinder.
2076 This unwinder is used for cases where the normal
2077 prologue-analysis-based unwinder can't work,
2078 such as PLT stubs. */
2079
2080 static int
2081 nios2_stub_frame_sniffer (const struct frame_unwind *self,
2082 struct frame_info *this_frame, void **cache)
2083 {
2084 gdb_byte dummy[4];
2085 CORE_ADDR pc = get_frame_address_in_block (this_frame);
2086
2087 /* Use the stub unwinder for unreadable code. */
2088 if (target_read_memory (get_frame_pc (this_frame), dummy, 4) != 0)
2089 return 1;
2090
2091 if (in_plt_section (pc))
2092 return 1;
2093
2094 return 0;
2095 }
2096
2097 /* Define the data structures for the stub unwinder. */
2098
2099 static const struct frame_unwind nios2_stub_frame_unwind =
2100 {
2101 NORMAL_FRAME,
2102 default_frame_unwind_stop_reason,
2103 nios2_stub_frame_this_id,
2104 nios2_stub_frame_prev_register,
2105 NULL,
2106 nios2_stub_frame_sniffer
2107 };
2108
2109
2110
2111 /* Determine where to set a single step breakpoint while considering
2112 branch prediction. */
2113
2114 static CORE_ADDR
2115 nios2_get_next_pc (struct regcache *regcache, CORE_ADDR pc)
2116 {
2117 struct gdbarch *gdbarch = regcache->arch ();
2118 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2119 unsigned long mach = gdbarch_bfd_arch_info (gdbarch)->mach;
2120 unsigned int insn;
2121 const struct nios2_opcode *op = nios2_fetch_insn (gdbarch, pc, &insn);
2122 int ra;
2123 int rb;
2124 int imm;
2125 unsigned int uimm;
2126 int wb, id, ret;
2127 enum branch_condition cond;
2128
2129 /* Do something stupid if we can't disassemble the insn at pc. */
2130 if (op == NULL)
2131 return pc + NIOS2_OPCODE_SIZE;
2132
2133 if (nios2_match_branch (insn, op, mach, &ra, &rb, &imm, &cond))
2134 {
2135 int ras = regcache_raw_get_signed (regcache, ra);
2136 int rbs = regcache_raw_get_signed (regcache, rb);
2137 unsigned int rau = regcache_raw_get_unsigned (regcache, ra);
2138 unsigned int rbu = regcache_raw_get_unsigned (regcache, rb);
2139
2140 pc += op->size;
2141 switch (cond)
2142 {
2143 case branch_none:
2144 pc += imm;
2145 break;
2146 case branch_eq:
2147 if (ras == rbs)
2148 pc += imm;
2149 break;
2150 case branch_ne:
2151 if (ras != rbs)
2152 pc += imm;
2153 break;
2154 case branch_ge:
2155 if (ras >= rbs)
2156 pc += imm;
2157 break;
2158 case branch_geu:
2159 if (rau >= rbu)
2160 pc += imm;
2161 break;
2162 case branch_lt:
2163 if (ras < rbs)
2164 pc += imm;
2165 break;
2166 case branch_ltu:
2167 if (rau < rbu)
2168 pc += imm;
2169 break;
2170 default:
2171 break;
2172 }
2173 }
2174
2175 else if (nios2_match_jmpi (insn, op, mach, &uimm)
2176 || nios2_match_calli (insn, op, mach, &uimm))
2177 pc = (pc & 0xf0000000) | uimm;
2178
2179 else if (nios2_match_jmpr (insn, op, mach, &ra)
2180 || nios2_match_callr (insn, op, mach, &ra))
2181 pc = regcache_raw_get_unsigned (regcache, ra);
2182
2183 else if (nios2_match_ldwm (insn, op, mach, &uimm, &ra, &imm, &wb, &id, &ret)
2184 && ret)
2185 {
2186 /* If ra is in the reglist, we have to use the value saved in the
2187 stack frame rather than the current value. */
2188 if (uimm & (1 << NIOS2_RA_REGNUM))
2189 pc = nios2_unwind_pc (gdbarch, get_current_frame ());
2190 else
2191 pc = regcache_raw_get_unsigned (regcache, NIOS2_RA_REGNUM);
2192 }
2193
2194 else if (nios2_match_trap (insn, op, mach, &uimm) && uimm == 0)
2195 {
2196 if (tdep->syscall_next_pc != NULL)
2197 return tdep->syscall_next_pc (get_current_frame (), op);
2198 }
2199
2200 else
2201 pc += op->size;
2202
2203 return pc;
2204 }
2205
2206 /* Implement the software_single_step gdbarch method. */
2207
2208 static std::vector<CORE_ADDR>
2209 nios2_software_single_step (struct regcache *regcache)
2210 {
2211 CORE_ADDR next_pc = nios2_get_next_pc (regcache, regcache_read_pc (regcache));
2212
2213 return {next_pc};
2214 }
2215
2216 /* Implement the get_longjump_target gdbarch method. */
2217
2218 static int
2219 nios2_get_longjmp_target (struct frame_info *frame, CORE_ADDR *pc)
2220 {
2221 struct gdbarch *gdbarch = get_frame_arch (frame);
2222 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2223 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
2224 CORE_ADDR jb_addr = get_frame_register_unsigned (frame, NIOS2_R4_REGNUM);
2225 gdb_byte buf[4];
2226
2227 if (target_read_memory (jb_addr + (tdep->jb_pc * 4), buf, 4))
2228 return 0;
2229
2230 *pc = extract_unsigned_integer (buf, 4, byte_order);
2231 return 1;
2232 }
2233
2234 /* Initialize the Nios II gdbarch. */
2235
2236 static struct gdbarch *
2237 nios2_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
2238 {
2239 struct gdbarch *gdbarch;
2240 struct gdbarch_tdep *tdep;
2241 int i;
2242 struct tdesc_arch_data *tdesc_data = NULL;
2243 const struct target_desc *tdesc = info.target_desc;
2244
2245 if (!tdesc_has_registers (tdesc))
2246 /* Pick a default target description. */
2247 tdesc = tdesc_nios2;
2248
2249 /* Check any target description for validity. */
2250 if (tdesc_has_registers (tdesc))
2251 {
2252 const struct tdesc_feature *feature;
2253 int valid_p;
2254
2255 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.nios2.cpu");
2256 if (feature == NULL)
2257 return NULL;
2258
2259 tdesc_data = tdesc_data_alloc ();
2260
2261 valid_p = 1;
2262
2263 for (i = 0; i < NIOS2_NUM_REGS; i++)
2264 valid_p &= tdesc_numbered_register (feature, tdesc_data, i,
2265 nios2_reg_names[i]);
2266
2267 if (!valid_p)
2268 {
2269 tdesc_data_cleanup (tdesc_data);
2270 return NULL;
2271 }
2272 }
2273
2274 /* Find a candidate among the list of pre-declared architectures. */
2275 arches = gdbarch_list_lookup_by_info (arches, &info);
2276 if (arches != NULL)
2277 return arches->gdbarch;
2278
2279 /* None found, create a new architecture from the information
2280 provided. */
2281 tdep = XCNEW (struct gdbarch_tdep);
2282 gdbarch = gdbarch_alloc (&info, tdep);
2283
2284 /* longjmp support not enabled by default. */
2285 tdep->jb_pc = -1;
2286
2287 /* Data type sizes. */
2288 set_gdbarch_ptr_bit (gdbarch, 32);
2289 set_gdbarch_addr_bit (gdbarch, 32);
2290 set_gdbarch_short_bit (gdbarch, 16);
2291 set_gdbarch_int_bit (gdbarch, 32);
2292 set_gdbarch_long_bit (gdbarch, 32);
2293 set_gdbarch_long_long_bit (gdbarch, 64);
2294 set_gdbarch_float_bit (gdbarch, 32);
2295 set_gdbarch_double_bit (gdbarch, 64);
2296
2297 set_gdbarch_float_format (gdbarch, floatformats_ieee_single);
2298 set_gdbarch_double_format (gdbarch, floatformats_ieee_double);
2299
2300 /* The register set. */
2301 set_gdbarch_num_regs (gdbarch, NIOS2_NUM_REGS);
2302 set_gdbarch_sp_regnum (gdbarch, NIOS2_SP_REGNUM);
2303 set_gdbarch_pc_regnum (gdbarch, NIOS2_PC_REGNUM); /* Pseudo register PC */
2304
2305 set_gdbarch_register_name (gdbarch, nios2_register_name);
2306 set_gdbarch_register_type (gdbarch, nios2_register_type);
2307
2308 /* Provide register mappings for stabs and dwarf2. */
2309 set_gdbarch_stab_reg_to_regnum (gdbarch, nios2_dwarf_reg_to_regnum);
2310 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, nios2_dwarf_reg_to_regnum);
2311
2312 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
2313
2314 /* Call dummy code. */
2315 set_gdbarch_frame_align (gdbarch, nios2_frame_align);
2316
2317 set_gdbarch_return_value (gdbarch, nios2_return_value);
2318
2319 set_gdbarch_skip_prologue (gdbarch, nios2_skip_prologue);
2320 set_gdbarch_stack_frame_destroyed_p (gdbarch, nios2_stack_frame_destroyed_p);
2321 set_gdbarch_breakpoint_kind_from_pc (gdbarch, nios2_breakpoint_kind_from_pc);
2322 set_gdbarch_sw_breakpoint_from_kind (gdbarch, nios2_sw_breakpoint_from_kind);
2323
2324 set_gdbarch_dummy_id (gdbarch, nios2_dummy_id);
2325 set_gdbarch_unwind_pc (gdbarch, nios2_unwind_pc);
2326 set_gdbarch_unwind_sp (gdbarch, nios2_unwind_sp);
2327
2328 /* The dwarf2 unwinder will normally produce the best results if
2329 the debug information is available, so register it first. */
2330 dwarf2_append_unwinders (gdbarch);
2331 frame_unwind_append_unwinder (gdbarch, &nios2_stub_frame_unwind);
2332 frame_unwind_append_unwinder (gdbarch, &nios2_frame_unwind);
2333
2334 /* Single stepping. */
2335 set_gdbarch_software_single_step (gdbarch, nios2_software_single_step);
2336
2337 /* Hook in ABI-specific overrides, if they have been registered. */
2338 gdbarch_init_osabi (info, gdbarch);
2339
2340 if (tdep->jb_pc >= 0)
2341 set_gdbarch_get_longjmp_target (gdbarch, nios2_get_longjmp_target);
2342
2343 frame_base_set_default (gdbarch, &nios2_frame_base);
2344
2345 /* Enable inferior call support. */
2346 set_gdbarch_push_dummy_call (gdbarch, nios2_push_dummy_call);
2347
2348 if (tdesc_data)
2349 tdesc_use_registers (gdbarch, tdesc, tdesc_data);
2350
2351 return gdbarch;
2352 }
2353
2354 void
2355 _initialize_nios2_tdep (void)
2356 {
2357 gdbarch_register (bfd_arch_nios2, nios2_gdbarch_init, NULL);
2358 initialize_tdesc_nios2 ();
2359
2360 /* Allow debugging this file's internals. */
2361 add_setshow_boolean_cmd ("nios2", class_maintenance, &nios2_debug,
2362 _("Set Nios II debugging."),
2363 _("Show Nios II debugging."),
2364 _("When on, Nios II specific debugging is enabled."),
2365 NULL,
2366 NULL,
2367 &setdebuglist, &showdebuglist);
2368 }
set_gdbarch_num_regs
void set_gdbarch_num_regs(struct gdbarch *gdbarch, int num_regs)
Definition: gdbarch.c:2050
gdbarch
Definition: gdbarch.c:127
set_gdbarch_double_bit
void set_gdbarch_double_bit(struct gdbarch *gdbarch, int double_bit)
Definition: gdbarch.c:1723
set_gdbarch_frame_align
void set_gdbarch_frame_align(struct gdbarch *gdbarch, gdbarch_frame_align_ftype frame_align)
Definition: gdbarch.c:3151
set_gdbarch_float_format
void set_gdbarch_float_format(struct gdbarch *gdbarch, const struct floatformat **float_format)
Definition: gdbarch.c:1706
branch_ne
Definition: nios2-tdep.c:706
NIOS2_R3_REGNUM
#define NIOS2_R3_REGNUM
Definition: nios2-tdep.h:29
gdbarch_tdep::syscall_next_pc
CORE_ADDR(* syscall_next_pc)(struct frame_info *frame)
Definition: mips-tdep.h:118
regcache_raw_get_unsigned
ULONGEST regcache_raw_get_unsigned(struct regcache *regcache, int regnum)
Definition: common-regcache.c:26
frame_id_build
struct frame_id frame_id_build(CORE_ADDR stack_addr, CORE_ADDR code_addr)
Definition: frame.c:624
extract_typed_address
CORE_ADDR extract_typed_address(const gdb_byte *buf, struct type *type)
Definition: findvar.c:154
NIOS2_BSTATUS_REGNUM
#define NIOS2_BSTATUS_REGNUM
Definition: nios2-tdep.h:44
set_gdbarch_get_longjmp_target
void set_gdbarch_get_longjmp_target(struct gdbarch *gdbarch, gdbarch_get_longjmp_target_ftype get_longjmp_target)
Definition: gdbarch.c:2572
get_frame_address_in_block
CORE_ADDR get_frame_address_in_block(struct frame_info *this_frame)
Definition: frame.c:2407
NIOS2_PTEADDR_REGNUM
#define NIOS2_PTEADDR_REGNUM
Definition: nios2-tdep.h:49
builtin_type::builtin_func_ptr
struct type * builtin_func_ptr
Definition: gdbtypes.h:1565
nios2_setup_default
static void nios2_setup_default(struct nios2_unwind_cache *cache)
Definition: nios2-tdep.c:245
set_gdbarch_float_bit
void set_gdbarch_float_bit(struct gdbarch *gdbarch, int float_bit)
Definition: gdbarch.c:1690
get_frame_pc
CORE_ADDR get_frame_pc(struct frame_info *frame)
Definition: frame.c:2376
_initialize_nios2_tdep
void _initialize_nios2_tdep(void)
Definition: nios2-tdep.c:2355
infcall.h
get_current_frame
struct frame_info * get_current_frame(void)
Definition: frame.c:1563
CORE_ADDR
bfd_vma CORE_ADDR
Definition: common-types.h:41
nios2_stub_frame_sniffer
static int nios2_stub_frame_sniffer(const struct frame_unwind *self, struct frame_info *this_frame, void **cache)
Definition: nios2-tdep.c:2081
gdbarch_init_osabi
void gdbarch_init_osabi(struct gdbarch_info info, struct gdbarch *gdbarch)
Definition: osabi.c:334
nios2_reg_names
static const char *const nios2_reg_names[NIOS2_NUM_REGS]
Definition: nios2-tdep.c:156
nios2_frame_unwind_cache
static struct nios2_unwind_cache * nios2_frame_unwind_cache(struct frame_info *this_frame, void **this_prologue_cache)
Definition: nios2-tdep.c:1915
nios2_match_rdctl
static int nios2_match_rdctl(uint32_t insn, const struct nios2_opcode *op, unsigned long mach, int *ra, int *rc)
Definition: nios2-tdep.c:575
branch_eq
Definition: nios2-tdep.c:705
floatformats_ieee_double
const struct floatformat * floatformats_ieee_double[BFD_ENDIAN_UNKNOWN]
Definition: gdbtypes.c:76
frame_unwind_got_memory
struct value * frame_unwind_got_memory(struct frame_info *frame, int regnum, CORE_ADDR addr)
Definition: frame-unwind.c:233
nios2_unwind_cache::base
CORE_ADDR base
Definition: nios2-tdep.c:85
trad_frame_set_reg_realreg
void trad_frame_set_reg_realreg(struct trad_frame_cache *this_trad_cache, int regnum, int realreg)
Definition: trad-frame.c:118
set_gdbarch_stab_reg_to_regnum
void set_gdbarch_stab_reg_to_regnum(struct gdbarch *gdbarch, gdbarch_stab_reg_to_regnum_ftype stab_reg_to_regnum)
Definition: gdbarch.c:2224
nios2-tdep.h
trad_frame_set_id
void trad_frame_set_id(struct trad_frame_cache *this_trad_cache, struct frame_id this_id)
Definition: trad-frame.c:171
nios2_match_addi
static int nios2_match_addi(uint32_t insn, const struct nios2_opcode *op, unsigned long mach, int *ra, int *rb, int *imm)
Definition: nios2-tdep.c:386
nios2_dwarf_reg_to_regnum
static int nios2_dwarf_reg_to_regnum(struct gdbarch *gdbarch, int dw_reg)
Definition: nios2-tdep.c:146
RETURN_VALUE_STRUCT_CONVENTION
Definition: defs.h:258
align_down
ULONGEST align_down(ULONGEST v, int n)
Definition: utils.c:3005
gdb_static_assert
gdb_static_assert(ARRAY_SIZE(nios2_dwarf2gdb_regno_map)==NIOS2_NUM_REGS)
frame_unwind_register_unsigned
ULONGEST frame_unwind_register_unsigned(struct frame_info *frame, int regnum)
Definition: frame.c:1279
regcache_cooked_write_signed
void regcache_cooked_write_signed(struct regcache *regcache, int regnum, LONGEST val)
Definition: regcache.c:785
set_gdbarch_short_bit
void set_gdbarch_short_bit(struct gdbarch *gdbarch, int short_bit)
Definition: gdbarch.c:1572
nios2_stub_frame_cache
static struct trad_frame_cache * nios2_stub_frame_cache(struct frame_info *this_frame, void **this_cache)
Definition: nios2-tdep.c:2021
nios2_get_next_pc
static CORE_ADDR nios2_get_next_pc(struct regcache *regcache, CORE_ADDR pc)
Definition: nios2-tdep.c:2115
builtin_type
const struct builtin_type * builtin_type(struct gdbarch *gdbarch)
Definition: gdbtypes.c:5217
NIOS2_BA_REGNUM
#define NIOS2_BA_REGNUM
Definition: nios2-tdep.h:37
frame_unwind_register
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Definition: frame.c:1145
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const char * tdesc_register_name(struct gdbarch *gdbarch, int regno)
Definition: target-descriptions.c:1173
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struct m32c_reg * pc
Definition: m32c-tdep.c:116
nios2_match_break
static int nios2_match_break(uint32_t insn, const struct nios2_opcode *op, unsigned long mach, unsigned int *uimm)
Definition: nios2-tdep.c:943
gdbarch_tdep
Definition: aarch64-tdep.h:55
return_value_convention
return_value_convention
Definition: defs.h:247
NIOS2_TLBMISC_REGNUM
#define NIOS2_TLBMISC_REGNUM
Definition: nios2-tdep.h:51
nios2_match_stwm
static int nios2_match_stwm(uint32_t insn, const struct nios2_opcode *op, unsigned long mach, unsigned int *reglist, int *ra, int *imm, int *wb, int *id)
Definition: nios2-tdep.c:601
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Definition: corefile.c:284
NIOS2_ESTATUS_REGNUM
#define NIOS2_ESTATUS_REGNUM
Definition: nios2-tdep.h:43
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static int nios2_dwarf2gdb_regno_map[]
Definition: nios2-tdep.c:107
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nios2_match_branch
static int nios2_match_branch(uint32_t insn, const struct nios2_opcode *op, unsigned long mach, int *ra, int *rb, int *imm, enum branch_condition *cond)
Definition: nios2-tdep.c:714
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static CORE_ADDR nios2_analyze_prologue(struct gdbarch *gdbarch, const CORE_ADDR start_pc, const CORE_ADDR current_pc, struct nios2_unwind_cache *cache, struct frame_info *this_frame)
Definition: nios2-tdep.c:1187
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struct gdbarch_list * gdbarch_list_lookup_by_info(struct gdbarch_list *arches, const struct gdbarch_info *info)
Definition: gdbarch.c:5309
skip_prologue_using_sal
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Definition: symtab.c:3854
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static CORE_ADDR nios2_frame_align(struct gdbarch *gdbarch, CORE_ADDR addr)
Definition: nios2-tdep.c:1777
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static int nios2_match_callr(uint32_t insn, const struct nios2_opcode *op, unsigned long mach, int *ra)
Definition: nios2-tdep.c:914
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static void nios2_extract_return_value(struct gdbarch *gdbarch, struct type *valtype, struct regcache *regcache, gdb_byte *valbuf)
Definition: nios2-tdep.c:203
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static int nios2_breakpoint_kind_from_pc(struct gdbarch *gdbarch, CORE_ADDR *pcptr)
Definition: nios2-tdep.c:1699
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#define NIOS2_EXCEPTION_REGNUM
Definition: nios2-tdep.h:48
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#define _(String)
Definition: gdb_locale.h:35
NIOS2_OPCODE_SIZE
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Definition: nios2-tdep.h:66
set_gdbarch_dwarf2_reg_to_regnum
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Definition: gdbarch.c:2275
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static std::vector< CORE_ADDR > nios2_software_single_step(struct regcache *regcache)
Definition: nios2-tdep.c:2209
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builtin_type
Definition: gdbtypes.h:1495
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struct gdbarch_tdep * gdbarch_tdep(struct gdbarch *gdbarch)
Definition: gdbarch.c:1491
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Definition: target-descriptions.c:1061
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Definition: frame-unwind.c:79
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static struct type * nios2_register_type(struct gdbarch *gdbarch, int regno)
Definition: nios2-tdep.c:184
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#define FRAME_OBSTACK_ZALLOC(TYPE)
Definition: frame.h:678
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const char * paddress(struct gdbarch *gdbarch, CORE_ADDR addr)
Definition: utils.c:2745
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Definition: frame-unwind.c:246
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void gdbarch_register(enum bfd_architecture bfd_architecture, gdbarch_init_ftype *init, gdbarch_dump_tdep_ftype *dump_tdep)
Definition: gdbarch.c:5257
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#define NIOS2_EA_REGNUM
Definition: nios2-tdep.h:36
symtab.h
set_gdbarch_addr_bit
void set_gdbarch_addr_bit(struct gdbarch *gdbarch, int addr_bit)
Definition: gdbarch.c:1859
trad_frame_get_id
void trad_frame_get_id(struct trad_frame_cache *this_trad_cache, struct frame_id *this_id)
Definition: trad-frame.c:178
tdesc_numbered_register
int tdesc_numbered_register(const struct tdesc_feature *feature, struct tdesc_arch_data *data, int regno, const char *name)
Definition: target-descriptions.c:1084
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void frame_base_set_default(struct gdbarch *gdbarch, const struct frame_base *default_base)
Definition: frame-base.c:95
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static int nios2_match_sub(uint32_t insn, const struct nios2_opcode *op, unsigned long mach, int *ra, int *rb, int *rc)
Definition: nios2-tdep.c:350
nios2_match_stw
static int nios2_match_stw(uint32_t insn, const struct nios2_opcode *op, unsigned long mach, int *ra, int *rb, int *imm)
Definition: nios2-tdep.c:469
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static CORE_ADDR nios2_skip_prologue(struct gdbarch *gdbarch, CORE_ADDR start_pc)
Definition: nios2-tdep.c:1673
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branch_condition
Definition: nios2-tdep.c:703
regcache_raw_get_signed
LONGEST regcache_raw_get_signed(struct regcache *regcache, int regnum)
Definition: regcache.c:648
set_gdbarch_register_type
void set_gdbarch_register_type(struct gdbarch *gdbarch, gdbarch_register_type_ftype register_type)
Definition: gdbarch.c:2316
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static void nios2_init_cache(struct nios2_unwind_cache *cache, CORE_ADDR pc)
Definition: nios2-tdep.c:264
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struct type * check_typedef(struct type *type)
Definition: gdbtypes.c:2421
NORMAL_FRAME
Definition: frame.h:244
value_contents
const gdb_byte * value_contents(struct value *value)
Definition: value.c:1407
branch_lt
Definition: nios2-tdep.c:709
nios2_store_return_value
static void nios2_store_return_value(struct gdbarch *gdbarch, struct type *valtype, struct regcache *regcache, const gdb_byte *valbuf)
Definition: nios2-tdep.c:224
branch_ltu
Definition: nios2-tdep.c:710
nios2_match_jmpi
static int nios2_match_jmpi(uint32_t insn, const struct nios2_opcode *op, unsigned long mach, unsigned int *uimm)
Definition: nios2-tdep.c:812
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struct value::@186::@187 reg
nios2_debug
static int nios2_debug
Definition: nios2-tdep.c:55
set_gdbarch_stack_frame_destroyed_p
void set_gdbarch_stack_frame_destroyed_p(struct gdbarch *gdbarch, gdbarch_stack_frame_destroyed_p_ftype stack_frame_destroyed_p)
Definition: gdbarch.c:3367
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CORE_ADDR pc
Definition: nios2-tdep.c:92
nios2_unwind_cache
Definition: nios2-tdep.c:82
extract_unsigned_integer
static ULONGEST extract_unsigned_integer(const gdb_byte *addr, int len, enum bfd_endian byte_order)
Definition: defs.h:577
osabi.h
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Definition: trad-frame.c:27
regcache.h
set_gdbarch_sp_regnum
void set_gdbarch_sp_regnum(struct gdbarch *gdbarch, int sp_regnum)
Definition: gdbarch.c:2156
nios2_match_trap
static int nios2_match_trap(uint32_t insn, const struct nios2_opcode *op, unsigned long mach, unsigned int *uimm)
Definition: nios2-tdep.c:972
NIOS2_NUM_REGS
#define NIOS2_NUM_REGS
Definition: nios2-tdep.h:63
set_gdbarch_dummy_id
void set_gdbarch_dummy_id(struct gdbarch *gdbarch, gdbarch_dummy_id_ftype dummy_id)
Definition: gdbarch.c:2340
fprintf_unfiltered
void fprintf_unfiltered(struct ui_file *stream, const char *format,...)
Definition: utils.c:2018
NIOS2_R2_REGNUM
#define NIOS2_R2_REGNUM
Definition: nios2-tdep.h:28
struct_return
struct_return
Definition: arm-tdep.h:88
nios2_unwind_sp
static CORE_ADDR nios2_unwind_sp(struct gdbarch *gdbarch, struct frame_info *this_frame)
Definition: nios2-tdep.c:1905
frame.h
nios2_unwind_pc
static CORE_ADDR nios2_unwind_pc(struct gdbarch *gdbarch, struct frame_info *next_frame)
Definition: nios2-tdep.c:1894
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enum bfd_endian gdbarch_byte_order(struct gdbarch *gdbarch)
Definition: gdbarch.c:1509
inferior.h
NIOS2_IPENDING_REGNUM
#define NIOS2_IPENDING_REGNUM
Definition: nios2-tdep.h:46
gdbarch_tdep::jb_pc
int jb_pc
Definition: aarch64-tdep.h:62
type
Definition: gdbtypes.h:749
find_pc_partial_function
int find_pc_partial_function(CORE_ADDR pc, const char **name, CORE_ADDR *address, CORE_ADDR *endaddr)
Definition: blockframe.c:320
NIOS2_FIRST_ARGREG
#define NIOS2_FIRST_ARGREG
Definition: nios2-tdep.h:59
reg_saved
Definition: nios2-tdep.c:76
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static void nios2_stub_frame_this_id(struct frame_info *this_frame, void **this_cache, struct frame_id *this_id)
Definition: nios2-tdep.c:2054
nios2.c
frame-unwind.h
set_gdbarch_unwind_pc
void set_gdbarch_unwind_pc(struct gdbarch *gdbarch, gdbarch_unwind_pc_ftype unwind_pc)
Definition: gdbarch.c:3079
builtin_type::builtin_uint32
struct type * builtin_uint32
Definition: gdbtypes.h:1539
default_frame_sniffer
int default_frame_sniffer(const struct frame_unwind *self, struct frame_info *this_frame, void **this_prologue_cache)
Definition: frame-unwind.c:174
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unsigned dummy
Definition: go32-nat.c:1073
NIOS2_STATUS_REGNUM
#define NIOS2_STATUS_REGNUM
Definition: nios2-tdep.h:42
nios2_match_calli
static int nios2_match_calli(uint32_t insn, const struct nios2_opcode *op, unsigned long mach, unsigned int *uimm)
Definition: nios2-tdep.c:837
nios2_frame_base
static const struct frame_base nios2_frame_base
Definition: nios2-tdep.c:2009
NIOS2_SP_REGNUM
#define NIOS2_SP_REGNUM
Definition: nios2-tdep.h:34
nios2_unwind_cache::reg_value
struct reg_value reg_value[NIOS2_NUM_REGS]
Definition: nios2-tdep.c:98
nios2_gdbarch_init
static struct gdbarch * nios2_gdbarch_init(struct gdbarch_info info, struct gdbarch_list *arches)
Definition: nios2-tdep.c:2237
trad_frame_cache_zalloc
struct trad_frame_cache * trad_frame_cache_zalloc(struct frame_info *this_frame)
Definition: trad-frame.c:36
set_gdbarch_unwind_sp
void set_gdbarch_unwind_sp(struct gdbarch *gdbarch, gdbarch_unwind_sp_ftype unwind_sp)
Definition: gdbarch.c:3103
nios2_frame_unwind
static const struct frame_unwind nios2_frame_unwind
Definition: nios2-tdep.c:1999
gdbarch_list::gdbarch
struct gdbarch * gdbarch
Definition: gdbarch.h:1622
tdesc_feature
Definition: target-descriptions.c:516
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int regnum
Definition: aarch64-tdep.c:77
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Definition: frame-base.h:58
setdebuglist
struct cmd_list_element * setdebuglist
Definition: cli-cmds.c:153
branch_none
Definition: nios2-tdep.c:704
NIOS2_LAST_ARGREG
#define NIOS2_LAST_ARGREG
Definition: nios2-tdep.h:60
get_frame_register_unsigned
ULONGEST get_frame_register_unsigned(struct frame_info *frame, int regnum)
Definition: frame.c:1308
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void set_gdbarch_breakpoint_kind_from_pc(struct gdbarch *gdbarch, gdbarch_breakpoint_kind_from_pc_ftype breakpoint_kind_from_pc)
Definition: gdbarch.c:2871
set_gdbarch_long_long_bit
void set_gdbarch_long_long_bit(struct gdbarch *gdbarch, int long_long_bit)
Definition: gdbarch.c:1623
trad_frame_cache::this_frame
struct frame_info * this_frame
Definition: trad-frame.c:29
reg_value
Definition: nios2-tdep.c:64
NIOS2_Z_REGNUM
#define NIOS2_Z_REGNUM
Definition: nios2-tdep.h:27
reg
Definition: regdef.h:22
gdb_assert
#define gdb_assert(expr)
Definition: gdb_assert.h:32
gdbarch_info::target_desc
const struct target_desc * target_desc
Definition: gdbarch.h:1660
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Definition: value.c:169
nios2_stub_frame_prev_register
static struct value * nios2_stub_frame_prev_register(struct frame_info *this_frame, void **this_cache, int regnum)
Definition: nios2-tdep.c:2066
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void set_gdbarch_software_single_step(struct gdbarch *gdbarch, gdbarch_software_single_step_ftype software_single_step)
Definition: gdbarch.c:3258
NIOS2_IENABLE_REGNUM
#define NIOS2_IENABLE_REGNUM
Definition: nios2-tdep.h:45
reg_saved::basereg
int basereg
Definition: nios2-tdep.c:78
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const struct floatformat * floatformats_ieee_single[BFD_ENDIAN_UNKNOWN]
Definition: gdbtypes.c:72
trad_frame_cache::this_id
struct frame_id this_id
Definition: trad-frame.c:32
NIOS2_ECCINJ_REGNUM
#define NIOS2_ECCINJ_REGNUM
Definition: nios2-tdep.h:52
reg_value::offset
unsigned int offset
Definition: nios2-tdep.c:67
nios2_unwind_cache::reg_saved
struct reg_saved reg_saved[NIOS2_NUM_REGS]
Definition: nios2-tdep.c:101
tdesc_use_registers
void tdesc_use_registers(struct gdbarch *gdbarch, const struct target_desc *target_desc, struct tdesc_arch_data *early_data)
Definition: target-descriptions.c:1374
core_addr_lessthan
int core_addr_lessthan(CORE_ADDR lhs, CORE_ADDR rhs)
Definition: arch-utils.c:117
gdb_byte
bfd_byte gdb_byte
Definition: common-types.h:38
NIOS2_TLBACC_REGNUM
#define NIOS2_TLBACC_REGNUM
Definition: nios2-tdep.h:50
NIOS2_BADADDR_REGNUM
#define NIOS2_BADADDR_REGNUM
Definition: nios2-tdep.h:53
align_up
ULONGEST align_up(ULONGEST v, int n)
Definition: utils.c:2997
dwarf2-frame.h
nios2_unwind_cache::return_regnum
int return_regnum
Definition: nios2-tdep.c:95
nios2_match_add
static int nios2_match_add(uint32_t insn, const struct nios2_opcode *op, unsigned long mach, int *ra, int *rb, int *rc)
Definition: nios2-tdep.c:308
XCNEW
#define XCNEW(T)
Definition: poison.h:121
gdbcore.h
frame_relative_level
int frame_relative_level(struct frame_info *fi)
Definition: frame.c:2610
frame_unwind_got_register
struct value * frame_unwind_got_register(struct frame_info *frame, int regnum, int new_regnum)
Definition: frame-unwind.c:223
regcache_cooked_write_unsigned
void regcache_cooked_write_unsigned(struct regcache *regcache, int regnum, ULONGEST val)
Definition: regcache.c:806
target_read_memory
int target_read_memory(CORE_ADDR memaddr, gdb_byte *myaddr, ssize_t len)
Definition: target.c:1370
branch_geu
Definition: nios2-tdep.c:708
reg_value::reg
int reg
Definition: nios2-tdep.c:66
regcache_read_pc
CORE_ADDR regcache_read_pc(struct regcache *regcache)
Definition: regcache.c:1229
target_desc
Definition: target-descriptions.c:591
find_function_addr
CORE_ADDR find_function_addr(struct value *function, struct type **retval_type)
Definition: infcall.c:250
builtin_type::builtin_data_ptr
struct type * builtin_data_ptr
Definition: gdbtypes.h:1554
NIOS2_GP_REGNUM
#define NIOS2_GP_REGNUM
Definition: nios2-tdep.h:33
in_plt_section
static int in_plt_section(CORE_ADDR pc)
Definition: objfiles.h:542
set_gdbarch_int_bit
void set_gdbarch_int_bit(struct gdbarch *gdbarch, int int_bit)
Definition: gdbarch.c:1589
NIOS2_R4_REGNUM
#define NIOS2_R4_REGNUM
Definition: nios2-tdep.h:31
nios2_return_value
static enum return_value_convention nios2_return_value(struct gdbarch *gdbarch, struct value *function, struct type *type, struct regcache *regcache, gdb_byte *readbuf, const gdb_byte *writebuf)
Definition: nios2-tdep.c:1786
tdesc_register_type
struct type * tdesc_register_type(struct gdbarch *gdbarch, int regno)
Definition: target-descriptions.c:1195
nios2_match_ldw
static int nios2_match_ldw(uint32_t insn, const struct nios2_opcode *op, unsigned long mach, int *ra, int *rb, int *imm)
Definition: nios2-tdep.c:526
offset
int offset
Definition: agent.c:65
add_setshow_boolean_cmd
void add_setshow_boolean_cmd(const char *name, enum command_class theclass, int *var, const char *set_doc, const char *show_doc, const char *help_doc, cmd_const_sfunc_ftype *set_func, show_value_ftype *show_func, struct cmd_list_element **set_list, struct cmd_list_element **show_list)
Definition: cli-decode.c:569
NIOS2_CPUID_REGNUM
#define NIOS2_CPUID_REGNUM
Definition: nios2-tdep.h:47
target-descriptions.h
regcache::arch
gdbarch * arch() const
Definition: regcache.c:221
dwarf2_append_unwinders
void dwarf2_append_unwinders(struct gdbarch *gdbarch)
Definition: dwarf2-frame.c:1384
regcache_cooked_read
enum register_status regcache_cooked_read(struct regcache *regcache, int regnum, gdb_byte *buf)
Definition: regcache.c:661
branch_ge
Definition: nios2-tdep.c:707
nios2_get_longjmp_target
static int nios2_get_longjmp_target(struct frame_info *frame, CORE_ADDR *pc)
Definition: nios2-tdep.c:2219
trad_frame_set_this_base
void trad_frame_set_this_base(struct trad_frame_cache *this_trad_cache, CORE_ADDR this_base)
Definition: trad-frame.c:185
target.h
nios2_unwind_cache::cfa
CORE_ADDR cfa
Definition: nios2-tdep.c:89
value.h
frame_unwind
Definition: frame-unwind.h:144
NIOS2_RA_REGNUM
#define NIOS2_RA_REGNUM
Definition: nios2-tdep.h:38
nios2_frame_this_id
static void nios2_frame_this_id(struct frame_info *this_frame, void **this_cache, struct frame_id *this_id)
Definition: nios2-tdep.c:1942
set_gdbarch_double_format
void set_gdbarch_double_format(struct gdbarch *gdbarch, const struct floatformat **double_format)
Definition: gdbarch.c:1739
tdesc_data_alloc
struct tdesc_arch_data * tdesc_data_alloc(void)
Definition: target-descriptions.c:1051
NIOS2_CDX_OPCODE_SIZE
#define NIOS2_CDX_OPCODE_SIZE
Definition: nios2-tdep.h:67
gdbtypes.h
nios2_match_orhi
static int nios2_match_orhi(uint32_t insn, const struct nios2_opcode *op, unsigned long mach, int *ra, int *rb, unsigned int *uimm)
Definition: nios2-tdep.c:440
default_frame_unwind_stop_reason
enum unwind_stop_reason default_frame_unwind_stop_reason(struct frame_info *this_frame, void **this_cache)
Definition: frame-unwind.c:184
tdesc_find_feature
const struct tdesc_feature * tdesc_find_feature(const struct target_desc *target_desc, const char *name)
Definition: target-descriptions.c:942
tdesc_arch_data
Definition: target-descriptions.c:670
register_size
int register_size(struct gdbarch *gdbarch, int regnum)
Definition: regcache.c:164
regcache
Definition: regcache.h:232
gdbarch_info
Definition: gdbarch.h:1626
nios2_match_jmpr
static int nios2_match_jmpr(uint32_t insn, const struct nios2_opcode *op, unsigned long mach, int *ra)
Definition: nios2-tdep.c:862
gdb_stdlog
#define gdb_stdlog
Definition: utils.h:349
value_type
struct type * value_type(const struct value *value)
Definition: value.c:1095
set_gdbarch_long_bit
void set_gdbarch_long_bit(struct gdbarch *gdbarch, int long_bit)
Definition: gdbarch.c:1606
set_gdbarch_return_value
void set_gdbarch_return_value(struct gdbarch *gdbarch, gdbarch_return_value_ftype return_value)
Definition: gdbarch.c:2738
gdbarch_bfd_arch_info
const struct bfd_arch_info * gdbarch_bfd_arch_info(struct gdbarch *gdbarch)
Definition: gdbarch.c:1500
showdebuglist
struct cmd_list_element * showdebuglist
Definition: cli-cmds.c:155
gdbarch_pc_regnum
int gdbarch_pc_regnum(struct gdbarch *gdbarch)
Definition: gdbarch.c:2163
nios2_frame_base_address
static CORE_ADDR nios2_frame_base_address(struct frame_info *this_frame, void **this_cache)
Definition: nios2-tdep.c:1988
regset.h
nios2_fetch_insn
static const struct nios2_opcode * nios2_fetch_insn(struct gdbarch *gdbarch, CORE_ADDR pc, unsigned int *insnp)
Definition: nios2-tdep.c:278
NIOS2_MPUBASE_REGNUM
#define NIOS2_MPUBASE_REGNUM
Definition: nios2-tdep.h:55
nios2_dummy_id
static struct frame_id nios2_dummy_id(struct gdbarch *gdbarch, struct frame_info *this_frame)
Definition: nios2-tdep.c:1804
tdesc_nios2
struct target_desc * tdesc_nios2
Definition: nios2.c:8
initialize_tdesc_nios2
static void initialize_tdesc_nios2(void)
Definition: nios2.c:10
TYPE_LENGTH
#define TYPE_LENGTH(thistype)
Definition: gdbtypes.h:1235
set_gdbarch_ptr_bit
void set_gdbarch_ptr_bit(struct gdbarch *gdbarch, int ptr_bit)
Definition: gdbarch.c:1841
set_gdbarch_push_dummy_call
void set_gdbarch_push_dummy_call(struct gdbarch *gdbarch, gdbarch_push_dummy_call_ftype push_dummy_call)
Definition: gdbarch.c:2381
nios2_frame_prev_register
static struct value * nios2_frame_prev_register(struct frame_info *this_frame, void **this_cache, int regnum)
Definition: nios2-tdep.c:1958
class_maintenance
Definition: command.h:43
read_memory_unsigned_integer
ULONGEST read_memory_unsigned_integer(CORE_ADDR memaddr, int len, enum bfd_endian byte_order)
Definition: corefile.c:326
set_gdbarch_sw_breakpoint_from_kind
void set_gdbarch_sw_breakpoint_from_kind(struct gdbarch *gdbarch, gdbarch_sw_breakpoint_from_kind_ftype sw_breakpoint_from_kind)
Definition: gdbarch.c:2888
nios2_in_epilogue_p
static int nios2_in_epilogue_p(struct gdbarch *gdbarch, CORE_ADDR current_pc, CORE_ADDR start_pc)
Definition: nios2-tdep.c:1005
NIOS2_PC_REGNUM
#define NIOS2_PC_REGNUM
Definition: nios2-tdep.h:39
write_memory
void write_memory(CORE_ADDR memaddr, const bfd_byte *myaddr, ssize_t len)
Definition: corefile.c:394
set_gdbarch_skip_prologue
void set_gdbarch_skip_prologue(struct gdbarch *gdbarch, gdbarch_skip_prologue_ftype skip_prologue)
Definition: gdbarch.c:2772
tdesc_data
static struct gdbarch_data * tdesc_data
Definition: target-descriptions.c:725
RETURN_VALUE_REGISTER_CONVENTION
Definition: defs.h:251
value::offset
LONGEST offset
Definition: value.c:243
reg_saved::addr
CORE_ADDR addr
Definition: nios2-tdep.c:79
trad_frame_get_register
struct value * trad_frame_get_register(struct trad_frame_cache *this_trad_cache, struct frame_info *this_frame, int regnum)
Definition: trad-frame.c:162
gdbarch_byte_order_for_code
enum bfd_endian gdbarch_byte_order_for_code(struct gdbarch *gdbarch)
Definition: gdbarch.c:1518
set_gdbarch_pc_regnum
void set_gdbarch_pc_regnum(struct gdbarch *gdbarch, int pc_regnum)
Definition: gdbarch.c:2173
nios2_stub_frame_unwind
static const struct frame_unwind nios2_stub_frame_unwind
Definition: nios2-tdep.c:2099
gdbcmd.h
tdesc_has_registers
int tdesc_has_registers(const struct target_desc *target_desc)
Definition: target-descriptions.c:926
set_gdbarch_register_name
void set_gdbarch_register_name(struct gdbarch *gdbarch, gdbarch_register_name_ftype register_name)
Definition: gdbarch.c:2292
get_frame_func
CORE_ADDR get_frame_func(struct frame_info *this_frame)
Definition: frame.c:1001
NIOS2_FP_REGNUM
#define NIOS2_FP_REGNUM
Definition: nios2-tdep.h:35
nios2_stack_frame_destroyed_p
static int nios2_stack_frame_destroyed_p(struct gdbarch *gdbarch, CORE_ADDR pc)
Definition: nios2-tdep.c:1114
size
size_t size
Definition: go32-nat.c:242
gdbarch_alloc
struct gdbarch * gdbarch_alloc(const struct gdbarch_info *info, struct gdbarch_tdep *tdep)
Definition: gdbarch.c:361
set_gdbarch_inner_than
void set_gdbarch_inner_than(struct gdbarch *gdbarch, gdbarch_inner_than_ftype inner_than)
Definition: gdbarch.c:2837
nios2_sw_breakpoint_from_kind
static const gdb_byte * nios2_sw_breakpoint_from_kind(struct gdbarch *gdbarch, int kind, int *size)
Definition: nios2-tdep.c:1721
frame_id
Definition: frame.h:111
get_frame_arch
struct gdbarch * get_frame_arch(struct frame_info *this_frame)
Definition: frame.c:2691
LONGEST
long long LONGEST
Definition: common-types.h:52
regcache_cooked_write
void regcache_cooked_write(struct regcache *regcache, int regnum, const gdb_byte *buf)
Definition: regcache.c:873
NIOS2_MPUACC_REGNUM
#define NIOS2_MPUACC_REGNUM
Definition: nios2-tdep.h:56
NIOS2_CONFIG_REGNUM
#define NIOS2_CONFIG_REGNUM
Definition: nios2-tdep.h:54
symfile.h
gdbarch_target_desc
const struct target_desc * gdbarch_target_desc(struct gdbarch *gdbarch)
Definition: gdbarch.c:1536
nios2_push_dummy_call
static CORE_ADDR nios2_push_dummy_call(struct gdbarch *gdbarch, struct value *function, struct regcache *regcache, CORE_ADDR bp_addr, int nargs, struct value **args, CORE_ADDR sp, int struct_return, CORE_ADDR struct_addr)
Definition: nios2-tdep.c:1814
nios2_register_name
static const char * nios2_register_name(struct gdbarch *gdbarch, int regno)
Definition: nios2-tdep.c:172
gdbarch_list
Definition: gdbarch.h:1620
nios2_match_ldwm
static int nios2_match_ldwm(uint32_t insn, const struct nios2_opcode *op, unsigned long mach, unsigned int *reglist, int *ra, int *imm, int *wb, int *id, int *ret)
Definition: nios2-tdep.c:651