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linux-x86-low.c
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1 /* GNU/Linux/x86-64 specific low level interface, for the remote server
2 for GDB.
3 Copyright (C) 2002-2018 Free Software Foundation, Inc.
4
5 This file is part of GDB.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
19
20 #include "server.h"
21 #include <signal.h>
22 #include <limits.h>
23 #include <inttypes.h>
24 #include "linux-low.h"
25 #include "i387-fp.h"
26 #include "x86-low.h"
27 #include "x86-xstate.h"
28 #include "nat/gdb_ptrace.h"
29
30 #ifdef __x86_64__
31 #include "nat/amd64-linux-siginfo.h"
32 #endif
33
34 #include "gdb_proc_service.h"
35 /* Don't include elf/common.h if linux/elf.h got included by
36 gdb_proc_service.h. */
37 #ifndef ELFMAG0
38 #include "elf/common.h"
39 #endif
40
41 #include "agent.h"
42 #include "tdesc.h"
43 #include "tracepoint.h"
44 #include "ax.h"
45 #include "nat/linux-nat.h"
46 #include "nat/x86-linux.h"
47 #include "nat/x86-linux-dregs.h"
48 #include "linux-x86-tdesc.h"
49
50 #ifdef __x86_64__
51 static struct target_desc *tdesc_amd64_linux_no_xml;
52 #endif
53 static struct target_desc *tdesc_i386_linux_no_xml;
54
55
56 static unsigned char jump_insn[] = { 0xe9, 0, 0, 0, 0 };
57 static unsigned char small_jump_insn[] = { 0x66, 0xe9, 0, 0 };
58
59 /* Backward compatibility for gdb without XML support. */
60
61 static const char *xmltarget_i386_linux_no_xml = "@<target>\
62 <architecture>i386</architecture>\
63 <osabi>GNU/Linux</osabi>\
64 </target>";
65
66 #ifdef __x86_64__
67 static const char *xmltarget_amd64_linux_no_xml = "@<target>\
68 <architecture>i386:x86-64</architecture>\
69 <osabi>GNU/Linux</osabi>\
70 </target>";
71 #endif
72
73 #include <sys/reg.h>
74 #include <sys/procfs.h>
75 #include "nat/gdb_ptrace.h"
76 #include <sys/uio.h>
77
78 #ifndef PTRACE_GET_THREAD_AREA
79 #define PTRACE_GET_THREAD_AREA 25
80 #endif
81
82 /* This definition comes from prctl.h, but some kernels may not have it. */
83 #ifndef PTRACE_ARCH_PRCTL
84 #define PTRACE_ARCH_PRCTL 30
85 #endif
86
87 /* The following definitions come from prctl.h, but may be absent
88 for certain configurations. */
89 #ifndef ARCH_GET_FS
90 #define ARCH_SET_GS 0x1001
91 #define ARCH_SET_FS 0x1002
92 #define ARCH_GET_FS 0x1003
93 #define ARCH_GET_GS 0x1004
94 #endif
95
96 /* Per-process arch-specific data we want to keep. */
97
98 struct arch_process_info
99 {
100 struct x86_debug_reg_state debug_reg_state;
101 };
102
103 #ifdef __x86_64__
104
105 /* Mapping between the general-purpose registers in `struct user'
106 format and GDB's register array layout.
107 Note that the transfer layout uses 64-bit regs. */
108 static /*const*/ int i386_regmap[] =
109 {
110 RAX * 8, RCX * 8, RDX * 8, RBX * 8,
111 RSP * 8, RBP * 8, RSI * 8, RDI * 8,
112 RIP * 8, EFLAGS * 8, CS * 8, SS * 8,
113 DS * 8, ES * 8, FS * 8, GS * 8
114 };
115
116 #define I386_NUM_REGS (sizeof (i386_regmap) / sizeof (i386_regmap[0]))
117
118 /* So code below doesn't have to care, i386 or amd64. */
119 #define ORIG_EAX ORIG_RAX
120 #define REGSIZE 8
121
122 static const int x86_64_regmap[] =
123 {
124 RAX * 8, RBX * 8, RCX * 8, RDX * 8,
125 RSI * 8, RDI * 8, RBP * 8, RSP * 8,
126 R8 * 8, R9 * 8, R10 * 8, R11 * 8,
127 R12 * 8, R13 * 8, R14 * 8, R15 * 8,
128 RIP * 8, EFLAGS * 8, CS * 8, SS * 8,
129 DS * 8, ES * 8, FS * 8, GS * 8,
130 -1, -1, -1, -1, -1, -1, -1, -1,
131 -1, -1, -1, -1, -1, -1, -1, -1,
132 -1, -1, -1, -1, -1, -1, -1, -1,
133 -1,
134 -1, -1, -1, -1, -1, -1, -1, -1,
135 ORIG_RAX * 8,
136 #ifdef HAVE_STRUCT_USER_REGS_STRUCT_FS_BASE
137 21 * 8, 22 * 8,
138 #else
139 -1, -1,
140 #endif
141 -1, -1, -1, -1, /* MPX registers BND0 ... BND3. */
142 -1, -1, /* MPX registers BNDCFGU, BNDSTATUS. */
143 -1, -1, -1, -1, -1, -1, -1, -1, /* xmm16 ... xmm31 (AVX512) */
144 -1, -1, -1, -1, -1, -1, -1, -1,
145 -1, -1, -1, -1, -1, -1, -1, -1, /* ymm16 ... ymm31 (AVX512) */
146 -1, -1, -1, -1, -1, -1, -1, -1,
147 -1, -1, -1, -1, -1, -1, -1, -1, /* k0 ... k7 (AVX512) */
148 -1, -1, -1, -1, -1, -1, -1, -1, /* zmm0 ... zmm31 (AVX512) */
149 -1, -1, -1, -1, -1, -1, -1, -1,
150 -1, -1, -1, -1, -1, -1, -1, -1,
151 -1, -1, -1, -1, -1, -1, -1, -1,
152 -1 /* pkru */
153 };
154
155 #define X86_64_NUM_REGS (sizeof (x86_64_regmap) / sizeof (x86_64_regmap[0]))
156 #define X86_64_USER_REGS (GS + 1)
157
158 #else /* ! __x86_64__ */
159
160 /* Mapping between the general-purpose registers in `struct user'
161 format and GDB's register array layout. */
162 static /*const*/ int i386_regmap[] =
163 {
164 EAX * 4, ECX * 4, EDX * 4, EBX * 4,
165 UESP * 4, EBP * 4, ESI * 4, EDI * 4,
166 EIP * 4, EFL * 4, CS * 4, SS * 4,
167 DS * 4, ES * 4, FS * 4, GS * 4
168 };
169
170 #define I386_NUM_REGS (sizeof (i386_regmap) / sizeof (i386_regmap[0]))
171
172 #define REGSIZE 4
173
174 #endif
175
176 #ifdef __x86_64__
177
178 /* Returns true if the current inferior belongs to a x86-64 process,
179 per the tdesc. */
180
181 static int
182 is_64bit_tdesc (void)
183 {
184 struct regcache *regcache = get_thread_regcache (current_thread, 0);
185
186 return register_size (regcache->tdesc, 0) == 8;
187 }
188
189 #endif
190
191
192 /* Called by libthread_db. */
193
194 ps_err_e
195 ps_get_thread_area (struct ps_prochandle *ph,
196 lwpid_t lwpid, int idx, void **base)
197 {
198 #ifdef __x86_64__
199 int use_64bit = is_64bit_tdesc ();
200
201 if (use_64bit)
202 {
203 switch (idx)
204 {
205 case FS:
206 if (ptrace (PTRACE_ARCH_PRCTL, lwpid, base, ARCH_GET_FS) == 0)
207 return PS_OK;
208 break;
209 case GS:
210 if (ptrace (PTRACE_ARCH_PRCTL, lwpid, base, ARCH_GET_GS) == 0)
211 return PS_OK;
212 break;
213 default:
214 return PS_BADADDR;
215 }
216 return PS_ERR;
217 }
218 #endif
219
220 {
221 unsigned int desc[4];
222
223 if (ptrace (PTRACE_GET_THREAD_AREA, lwpid,
224 (void *) (intptr_t) idx, (unsigned long) &desc) < 0)
225 return PS_ERR;
226
227 /* Ensure we properly extend the value to 64-bits for x86_64. */
228 *base = (void *) (uintptr_t) desc[1];
229 return PS_OK;
230 }
231 }
232
233 /* Get the thread area address. This is used to recognize which
234 thread is which when tracing with the in-process agent library. We
235 don't read anything from the address, and treat it as opaque; it's
236 the address itself that we assume is unique per-thread. */
237
238 static int
239 x86_get_thread_area (int lwpid, CORE_ADDR *addr)
240 {
241 #ifdef __x86_64__
242 int use_64bit = is_64bit_tdesc ();
243
244 if (use_64bit)
245 {
246 void *base;
247 if (ptrace (PTRACE_ARCH_PRCTL, lwpid, &base, ARCH_GET_FS) == 0)
248 {
249 *addr = (CORE_ADDR) (uintptr_t) base;
250 return 0;
251 }
252
253 return -1;
254 }
255 #endif
256
257 {
258 struct lwp_info *lwp = find_lwp_pid (pid_to_ptid (lwpid));
259 struct thread_info *thr = get_lwp_thread (lwp);
260 struct regcache *regcache = get_thread_regcache (thr, 1);
261 unsigned int desc[4];
262 ULONGEST gs = 0;
263 const int reg_thread_area = 3; /* bits to scale down register value. */
264 int idx;
265
266 collect_register_by_name (regcache, "gs", &gs);
267
268 idx = gs >> reg_thread_area;
269
270 if (ptrace (PTRACE_GET_THREAD_AREA,
271 lwpid_of (thr),
272 (void *) (long) idx, (unsigned long) &desc) < 0)
273 return -1;
274
275 *addr = desc[1];
276 return 0;
277 }
278 }
279
280
281
282 static int
283 x86_cannot_store_register (int regno)
284 {
285 #ifdef __x86_64__
286 if (is_64bit_tdesc ())
287 return 0;
288 #endif
289
290 return regno >= I386_NUM_REGS;
291 }
292
293 static int
294 x86_cannot_fetch_register (int regno)
295 {
296 #ifdef __x86_64__
297 if (is_64bit_tdesc ())
298 return 0;
299 #endif
300
301 return regno >= I386_NUM_REGS;
302 }
303
304 static void
305 x86_fill_gregset (struct regcache *regcache, void *buf)
306 {
307 int i;
308
309 #ifdef __x86_64__
310 if (register_size (regcache->tdesc, 0) == 8)
311 {
312 for (i = 0; i < X86_64_NUM_REGS; i++)
313 if (x86_64_regmap[i] != -1)
314 collect_register (regcache, i, ((char *) buf) + x86_64_regmap[i]);
315
316 #ifndef HAVE_STRUCT_USER_REGS_STRUCT_FS_BASE
317 {
318 unsigned long base;
319 int lwpid = lwpid_of (current_thread);
320
321 collect_register_by_name (regcache, "fs_base", &base);
322 ptrace (PTRACE_ARCH_PRCTL, lwpid, &base, ARCH_SET_FS);
323
324 collect_register_by_name (regcache, "gs_base", &base);
325 ptrace (PTRACE_ARCH_PRCTL, lwpid, &base, ARCH_SET_GS);
326 }
327 #endif
328
329 return;
330 }
331
332 /* 32-bit inferior registers need to be zero-extended.
333 Callers would read uninitialized memory otherwise. */
334 memset (buf, 0x00, X86_64_USER_REGS * 8);
335 #endif
336
337 for (i = 0; i < I386_NUM_REGS; i++)
338 collect_register (regcache, i, ((char *) buf) + i386_regmap[i]);
339
340 collect_register_by_name (regcache, "orig_eax",
341 ((char *) buf) + ORIG_EAX * REGSIZE);
342 }
343
344 static void
345 x86_store_gregset (struct regcache *regcache, const void *buf)
346 {
347 int i;
348
349 #ifdef __x86_64__
350 if (register_size (regcache->tdesc, 0) == 8)
351 {
352 for (i = 0; i < X86_64_NUM_REGS; i++)
353 if (x86_64_regmap[i] != -1)
354 supply_register (regcache, i, ((char *) buf) + x86_64_regmap[i]);
355
356 #ifndef HAVE_STRUCT_USER_REGS_STRUCT_FS_BASE
357 {
358 unsigned long base;
359 int lwpid = lwpid_of (current_thread);
360
361 if (ptrace (PTRACE_ARCH_PRCTL, lwpid, &base, ARCH_GET_FS) == 0)
362 supply_register_by_name (regcache, "fs_base", &base);
363
364 if (ptrace (PTRACE_ARCH_PRCTL, lwpid, &base, ARCH_GET_GS) == 0)
365 supply_register_by_name (regcache, "gs_base", &base);
366 }
367 #endif
368 return;
369 }
370 #endif
371
372 for (i = 0; i < I386_NUM_REGS; i++)
373 supply_register (regcache, i, ((char *) buf) + i386_regmap[i]);
374
375 supply_register_by_name (regcache, "orig_eax",
376 ((char *) buf) + ORIG_EAX * REGSIZE);
377 }
378
379 static void
380 x86_fill_fpregset (struct regcache *regcache, void *buf)
381 {
382 #ifdef __x86_64__
383 i387_cache_to_fxsave (regcache, buf);
384 #else
385 i387_cache_to_fsave (regcache, buf);
386 #endif
387 }
388
389 static void
390 x86_store_fpregset (struct regcache *regcache, const void *buf)
391 {
392 #ifdef __x86_64__
393 i387_fxsave_to_cache (regcache, buf);
394 #else
395 i387_fsave_to_cache (regcache, buf);
396 #endif
397 }
398
399 #ifndef __x86_64__
400
401 static void
402 x86_fill_fpxregset (struct regcache *regcache, void *buf)
403 {
404 i387_cache_to_fxsave (regcache, buf);
405 }
406
407 static void
408 x86_store_fpxregset (struct regcache *regcache, const void *buf)
409 {
410 i387_fxsave_to_cache (regcache, buf);
411 }
412
413 #endif
414
415 static void
416 x86_fill_xstateregset (struct regcache *regcache, void *buf)
417 {
418 i387_cache_to_xsave (regcache, buf);
419 }
420
421 static void
422 x86_store_xstateregset (struct regcache *regcache, const void *buf)
423 {
424 i387_xsave_to_cache (regcache, buf);
425 }
426
427 /* ??? The non-biarch i386 case stores all the i387 regs twice.
428 Once in i387_.*fsave.* and once in i387_.*fxsave.*.
429 This is, presumably, to handle the case where PTRACE_[GS]ETFPXREGS
430 doesn't work. IWBN to avoid the duplication in the case where it
431 does work. Maybe the arch_setup routine could check whether it works
432 and update the supported regsets accordingly. */
433
434 static struct regset_info x86_regsets[] =
435 {
436 #ifdef HAVE_PTRACE_GETREGS
437 { PTRACE_GETREGS, PTRACE_SETREGS, 0, sizeof (elf_gregset_t),
438 GENERAL_REGS,
439 x86_fill_gregset, x86_store_gregset },
440 { PTRACE_GETREGSET, PTRACE_SETREGSET, NT_X86_XSTATE, 0,
441 EXTENDED_REGS, x86_fill_xstateregset, x86_store_xstateregset },
442 # ifndef __x86_64__
443 # ifdef HAVE_PTRACE_GETFPXREGS
444 { PTRACE_GETFPXREGS, PTRACE_SETFPXREGS, 0, sizeof (elf_fpxregset_t),
445 EXTENDED_REGS,
446 x86_fill_fpxregset, x86_store_fpxregset },
447 # endif
448 # endif
449 { PTRACE_GETFPREGS, PTRACE_SETFPREGS, 0, sizeof (elf_fpregset_t),
450 FP_REGS,
451 x86_fill_fpregset, x86_store_fpregset },
452 #endif /* HAVE_PTRACE_GETREGS */
453 NULL_REGSET
454 };
455
456 static CORE_ADDR
457 x86_get_pc (struct regcache *regcache)
458 {
459 int use_64bit = register_size (regcache->tdesc, 0) == 8;
460
461 if (use_64bit)
462 {
463 uint64_t pc;
464
465 collect_register_by_name (regcache, "rip", &pc);
466 return (CORE_ADDR) pc;
467 }
468 else
469 {
470 uint32_t pc;
471
472 collect_register_by_name (regcache, "eip", &pc);
473 return (CORE_ADDR) pc;
474 }
475 }
476
477 static void
478 x86_set_pc (struct regcache *regcache, CORE_ADDR pc)
479 {
480 int use_64bit = register_size (regcache->tdesc, 0) == 8;
481
482 if (use_64bit)
483 {
484 uint64_t newpc = pc;
485
486 supply_register_by_name (regcache, "rip", &newpc);
487 }
488 else
489 {
490 uint32_t newpc = pc;
491
492 supply_register_by_name (regcache, "eip", &newpc);
493 }
494 }
495
496 static const gdb_byte x86_breakpoint[] = { 0xCC };
497 #define x86_breakpoint_len 1
498
499 static int
500 x86_breakpoint_at (CORE_ADDR pc)
501 {
502 unsigned char c;
503
504 (*the_target->read_memory) (pc, &c, 1);
505 if (c == 0xCC)
506 return 1;
507
508 return 0;
509 }
510
511 /* Low-level function vector. */
512 struct x86_dr_low_type x86_dr_low =
513 {
514 x86_linux_dr_set_control,
515 x86_linux_dr_set_addr,
516 x86_linux_dr_get_addr,
517 x86_linux_dr_get_status,
518 x86_linux_dr_get_control,
519 sizeof (void *),
520 };
521
522 /* Breakpoint/Watchpoint support. */
523
524 static int
525 x86_supports_z_point_type (char z_type)
526 {
527 switch (z_type)
528 {
529 case Z_PACKET_SW_BP:
530 case Z_PACKET_HW_BP:
531 case Z_PACKET_WRITE_WP:
532 case Z_PACKET_ACCESS_WP:
533 return 1;
534 default:
535 return 0;
536 }
537 }
538
539 static int
540 x86_insert_point (enum raw_bkpt_type type, CORE_ADDR addr,
541 int size, struct raw_breakpoint *bp)
542 {
543 struct process_info *proc = current_process ();
544
545 switch (type)
546 {
547 case raw_bkpt_type_hw:
548 case raw_bkpt_type_write_wp:
549 case raw_bkpt_type_access_wp:
550 {
551 enum target_hw_bp_type hw_type
552 = raw_bkpt_type_to_target_hw_bp_type (type);
553 struct x86_debug_reg_state *state
554 = &proc->priv->arch_private->debug_reg_state;
555
556 return x86_dr_insert_watchpoint (state, hw_type, addr, size);
557 }
558
559 default:
560 /* Unsupported. */
561 return 1;
562 }
563 }
564
565 static int
566 x86_remove_point (enum raw_bkpt_type type, CORE_ADDR addr,
567 int size, struct raw_breakpoint *bp)
568 {
569 struct process_info *proc = current_process ();
570
571 switch (type)
572 {
573 case raw_bkpt_type_hw:
574 case raw_bkpt_type_write_wp:
575 case raw_bkpt_type_access_wp:
576 {
577 enum target_hw_bp_type hw_type
578 = raw_bkpt_type_to_target_hw_bp_type (type);
579 struct x86_debug_reg_state *state
580 = &proc->priv->arch_private->debug_reg_state;
581
582 return x86_dr_remove_watchpoint (state, hw_type, addr, size);
583 }
584 default:
585 /* Unsupported. */
586 return 1;
587 }
588 }
589
590 static int
591 x86_stopped_by_watchpoint (void)
592 {
593 struct process_info *proc = current_process ();
594 return x86_dr_stopped_by_watchpoint (&proc->priv->arch_private->debug_reg_state);
595 }
596
597 static CORE_ADDR
598 x86_stopped_data_address (void)
599 {
600 struct process_info *proc = current_process ();
601 CORE_ADDR addr;
602 if (x86_dr_stopped_data_address (&proc->priv->arch_private->debug_reg_state,
603 &addr))
604 return addr;
605 return 0;
606 }
607
608 /* Called when a new process is created. */
609
610 static struct arch_process_info *
611 x86_linux_new_process (void)
612 {
613 struct arch_process_info *info = XCNEW (struct arch_process_info);
614
615 x86_low_init_dregs (&info->debug_reg_state);
616
617 return info;
618 }
619
620 /* Called when a process is being deleted. */
621
622 static void
623 x86_linux_delete_process (struct arch_process_info *info)
624 {
625 xfree (info);
626 }
627
628 /* Target routine for linux_new_fork. */
629
630 static void
631 x86_linux_new_fork (struct process_info *parent, struct process_info *child)
632 {
633 /* These are allocated by linux_add_process. */
634 gdb_assert (parent->priv != NULL
635 && parent->priv->arch_private != NULL);
636 gdb_assert (child->priv != NULL
637 && child->priv->arch_private != NULL);
638
639 /* Linux kernel before 2.6.33 commit
640 72f674d203cd230426437cdcf7dd6f681dad8b0d
641 will inherit hardware debug registers from parent
642 on fork/vfork/clone. Newer Linux kernels create such tasks with
643 zeroed debug registers.
644
645 GDB core assumes the child inherits the watchpoints/hw
646 breakpoints of the parent, and will remove them all from the
647 forked off process. Copy the debug registers mirrors into the
648 new process so that all breakpoints and watchpoints can be
649 removed together. The debug registers mirror will become zeroed
650 in the end before detaching the forked off process, thus making
651 this compatible with older Linux kernels too. */
652
653 *child->priv->arch_private = *parent->priv->arch_private;
654 }
655
656 /* See nat/x86-dregs.h. */
657
658 struct x86_debug_reg_state *
659 x86_debug_reg_state (pid_t pid)
660 {
661 struct process_info *proc = find_process_pid (pid);
662
663 return &proc->priv->arch_private->debug_reg_state;
664 }
665
666 /* When GDBSERVER is built as a 64-bit application on linux, the
667 PTRACE_GETSIGINFO data is always presented in 64-bit layout. Since
668 debugging a 32-bit inferior with a 64-bit GDBSERVER should look the same
669 as debugging it with a 32-bit GDBSERVER, we do the 32-bit <-> 64-bit
670 conversion in-place ourselves. */
671
672 /* Convert a ptrace/host siginfo object, into/from the siginfo in the
673 layout of the inferiors' architecture. Returns true if any
674 conversion was done; false otherwise. If DIRECTION is 1, then copy
675 from INF to PTRACE. If DIRECTION is 0, copy from PTRACE to
676 INF. */
677
678 static int
679 x86_siginfo_fixup (siginfo_t *ptrace, gdb_byte *inf, int direction)
680 {
681 #ifdef __x86_64__
682 unsigned int machine;
683 int tid = lwpid_of (current_thread);
684 int is_elf64 = linux_pid_exe_is_elf_64_file (tid, &machine);
685
686 /* Is the inferior 32-bit? If so, then fixup the siginfo object. */
687 if (!is_64bit_tdesc ())
688 return amd64_linux_siginfo_fixup_common (ptrace, inf, direction,
689 FIXUP_32);
690 /* No fixup for native x32 GDB. */
691 else if (!is_elf64 && sizeof (void *) == 8)
692 return amd64_linux_siginfo_fixup_common (ptrace, inf, direction,
693 FIXUP_X32);
694 #endif
695
696 return 0;
697 }
698
699 static int use_xml;
700
701 /* Format of XSAVE extended state is:
702 struct
703 {
704 fxsave_bytes[0..463]
705 sw_usable_bytes[464..511]
706 xstate_hdr_bytes[512..575]
707 avx_bytes[576..831]
708 future_state etc
709 };
710
711 Same memory layout will be used for the coredump NT_X86_XSTATE
712 representing the XSAVE extended state registers.
713
714 The first 8 bytes of the sw_usable_bytes[464..467] is the OS enabled
715 extended state mask, which is the same as the extended control register
716 0 (the XFEATURE_ENABLED_MASK register), XCR0. We can use this mask
717 together with the mask saved in the xstate_hdr_bytes to determine what
718 states the processor/OS supports and what state, used or initialized,
719 the process/thread is in. */
720 #define I386_LINUX_XSAVE_XCR0_OFFSET 464
721
722 /* Does the current host support the GETFPXREGS request? The header
723 file may or may not define it, and even if it is defined, the
724 kernel will return EIO if it's running on a pre-SSE processor. */
725 int have_ptrace_getfpxregs =
726 #ifdef HAVE_PTRACE_GETFPXREGS
727 -1
728 #else
729 0
730 #endif
731 ;
732
733 /* Get Linux/x86 target description from running target. */
734
735 static const struct target_desc *
736 x86_linux_read_description (void)
737 {
738 unsigned int machine;
739 int is_elf64;
740 int xcr0_features;
741 int tid;
742 static uint64_t xcr0;
743 struct regset_info *regset;
744
745 tid = lwpid_of (current_thread);
746
747 is_elf64 = linux_pid_exe_is_elf_64_file (tid, &machine);
748
749 if (sizeof (void *) == 4)
750 {
751 if (is_elf64 > 0)
752 error (_("Can't debug 64-bit process with 32-bit GDBserver"));
753 #ifndef __x86_64__
754 else if (machine == EM_X86_64)
755 error (_("Can't debug x86-64 process with 32-bit GDBserver"));
756 #endif
757 }
758
759 #if !defined __x86_64__ && defined HAVE_PTRACE_GETFPXREGS
760 if (machine == EM_386 && have_ptrace_getfpxregs == -1)
761 {
762 elf_fpxregset_t fpxregs;
763
764 if (ptrace (PTRACE_GETFPXREGS, tid, 0, (long) &fpxregs) < 0)
765 {
766 have_ptrace_getfpxregs = 0;
767 have_ptrace_getregset = 0;
768 return i386_linux_read_description (X86_XSTATE_X87);
769 }
770 else
771 have_ptrace_getfpxregs = 1;
772 }
773 #endif
774
775 if (!use_xml)
776 {
777 x86_xcr0 = X86_XSTATE_SSE_MASK;
778
779 /* Don't use XML. */
780 #ifdef __x86_64__
781 if (machine == EM_X86_64)
782 return tdesc_amd64_linux_no_xml;
783 else
784 #endif
785 return tdesc_i386_linux_no_xml;
786 }
787
788 if (have_ptrace_getregset == -1)
789 {
790 uint64_t xstateregs[(X86_XSTATE_SSE_SIZE / sizeof (uint64_t))];
791 struct iovec iov;
792
793 iov.iov_base = xstateregs;
794 iov.iov_len = sizeof (xstateregs);
795
796 /* Check if PTRACE_GETREGSET works. */
797 if (ptrace (PTRACE_GETREGSET, tid,
798 (unsigned int) NT_X86_XSTATE, (long) &iov) < 0)
799 have_ptrace_getregset = 0;
800 else
801 {
802 have_ptrace_getregset = 1;
803
804 /* Get XCR0 from XSAVE extended state. */
805 xcr0 = xstateregs[(I386_LINUX_XSAVE_XCR0_OFFSET
806 / sizeof (uint64_t))];
807
808 /* Use PTRACE_GETREGSET if it is available. */
809 for (regset = x86_regsets;
810 regset->fill_function != NULL; regset++)
811 if (regset->get_request == PTRACE_GETREGSET)
812 regset->size = X86_XSTATE_SIZE (xcr0);
813 else if (regset->type != GENERAL_REGS)
814 regset->size = 0;
815 }
816 }
817
818 /* Check the native XCR0 only if PTRACE_GETREGSET is available. */
819 xcr0_features = (have_ptrace_getregset
820 && (xcr0 & X86_XSTATE_ALL_MASK));
821
822 if (xcr0_features)
823 x86_xcr0 = xcr0;
824
825 if (machine == EM_X86_64)
826 {
827 #ifdef __x86_64__
828 const target_desc *tdesc = NULL;
829
830 if (xcr0_features)
831 {
832 tdesc = amd64_linux_read_description (xcr0 & X86_XSTATE_ALL_MASK,
833 !is_elf64);
834 }
835
836 if (tdesc == NULL)
837 tdesc = amd64_linux_read_description (X86_XSTATE_SSE_MASK, !is_elf64);
838 return tdesc;
839 #endif
840 }
841 else
842 {
843 const target_desc *tdesc = NULL;
844
845 if (xcr0_features)
846 tdesc = i386_linux_read_description (xcr0 & X86_XSTATE_ALL_MASK);
847
848 if (tdesc == NULL)
849 tdesc = i386_linux_read_description (X86_XSTATE_SSE);
850
851 return tdesc;
852 }
853
854 gdb_assert_not_reached ("failed to return tdesc");
855 }
856
857 /* Update all the target description of all processes; a new GDB
858 connected, and it may or not support xml target descriptions. */
859
860 static void
861 x86_linux_update_xmltarget (void)
862 {
863 struct thread_info *saved_thread = current_thread;
864
865 /* Before changing the register cache's internal layout, flush the
866 contents of the current valid caches back to the threads, and
867 release the current regcache objects. */
868 regcache_release ();
869
870 for_each_process ([] (process_info *proc) {
871 int pid = proc->pid;
872
873 /* Look up any thread of this process. */
874 current_thread = find_any_thread_of_pid (pid);
875
876 the_low_target.arch_setup ();
877 });
878
879 current_thread = saved_thread;
880 }
881
882 /* Process qSupported query, "xmlRegisters=". Update the buffer size for
883 PTRACE_GETREGSET. */
884
885 static void
886 x86_linux_process_qsupported (char **features, int count)
887 {
888 int i;
889
890 /* Return if gdb doesn't support XML. If gdb sends "xmlRegisters="
891 with "i386" in qSupported query, it supports x86 XML target
892 descriptions. */
893 use_xml = 0;
894 for (i = 0; i < count; i++)
895 {
896 const char *feature = features[i];
897
898 if (startswith (feature, "xmlRegisters="))
899 {
900 char *copy = xstrdup (feature + 13);
901 char *p;
902
903 for (p = strtok (copy, ","); p != NULL; p = strtok (NULL, ","))
904 {
905 if (strcmp (p, "i386") == 0)
906 {
907 use_xml = 1;
908 break;
909 }
910 }
911
912 free (copy);
913 }
914 }
915 x86_linux_update_xmltarget ();
916 }
917
918 /* Common for x86/x86-64. */
919
920 static struct regsets_info x86_regsets_info =
921 {
922 x86_regsets, /* regsets */
923 0, /* num_regsets */
924 NULL, /* disabled_regsets */
925 };
926
927 #ifdef __x86_64__
928 static struct regs_info amd64_linux_regs_info =
929 {
930 NULL, /* regset_bitmap */
931 NULL, /* usrregs_info */
932 &x86_regsets_info
933 };
934 #endif
935 static struct usrregs_info i386_linux_usrregs_info =
936 {
937 I386_NUM_REGS,
938 i386_regmap,
939 };
940
941 static struct regs_info i386_linux_regs_info =
942 {
943 NULL, /* regset_bitmap */
944 &i386_linux_usrregs_info,
945 &x86_regsets_info
946 };
947
948 const struct regs_info *
949 x86_linux_regs_info (void)
950 {
951 #ifdef __x86_64__
952 if (is_64bit_tdesc ())
953 return &amd64_linux_regs_info;
954 else
955 #endif
956 return &i386_linux_regs_info;
957 }
958
959 /* Initialize the target description for the architecture of the
960 inferior. */
961
962 static void
963 x86_arch_setup (void)
964 {
965 current_process ()->tdesc = x86_linux_read_description ();
966 }
967
968 /* Fill *SYSNO and *SYSRET with the syscall nr trapped and the syscall return
969 code. This should only be called if LWP got a SYSCALL_SIGTRAP. */
970
971 static void
972 x86_get_syscall_trapinfo (struct regcache *regcache, int *sysno)
973 {
974 int use_64bit = register_size (regcache->tdesc, 0) == 8;
975
976 if (use_64bit)
977 {
978 long l_sysno;
979
980 collect_register_by_name (regcache, "orig_rax", &l_sysno);
981 *sysno = (int) l_sysno;
982 }
983 else
984 collect_register_by_name (regcache, "orig_eax", sysno);
985 }
986
987 static int
988 x86_supports_tracepoints (void)
989 {
990 return 1;
991 }
992
993 static void
994 append_insns (CORE_ADDR *to, size_t len, const unsigned char *buf)
995 {
996 write_inferior_memory (*to, buf, len);
997 *to += len;
998 }
999
1000 static int
1001 push_opcode (unsigned char *buf, const char *op)
1002 {
1003 unsigned char *buf_org = buf;
1004
1005 while (1)
1006 {
1007 char *endptr;
1008 unsigned long ul = strtoul (op, &endptr, 16);
1009
1010 if (endptr == op)
1011 break;
1012
1013 *buf++ = ul;
1014 op = endptr;
1015 }
1016
1017 return buf - buf_org;
1018 }
1019
1020 #ifdef __x86_64__
1021
1022 /* Build a jump pad that saves registers and calls a collection
1023 function. Writes a jump instruction to the jump pad to
1024 JJUMPAD_INSN. The caller is responsible to write it in at the
1025 tracepoint address. */
1026
1027 static int
1028 amd64_install_fast_tracepoint_jump_pad (CORE_ADDR tpoint, CORE_ADDR tpaddr,
1029 CORE_ADDR collector,
1030 CORE_ADDR lockaddr,
1031 ULONGEST orig_size,
1032 CORE_ADDR *jump_entry,
1033 CORE_ADDR *trampoline,
1034 ULONGEST *trampoline_size,
1035 unsigned char *jjump_pad_insn,
1036 ULONGEST *jjump_pad_insn_size,
1037 CORE_ADDR *adjusted_insn_addr,
1038 CORE_ADDR *adjusted_insn_addr_end,
1039 char *err)
1040 {
1041 unsigned char buf[40];
1042 int i, offset;
1043 int64_t loffset;
1044
1045 CORE_ADDR buildaddr = *jump_entry;
1046
1047 /* Build the jump pad. */
1048
1049 /* First, do tracepoint data collection. Save registers. */
1050 i = 0;
1051 /* Need to ensure stack pointer saved first. */
1052 buf[i++] = 0x54; /* push %rsp */
1053 buf[i++] = 0x55; /* push %rbp */
1054 buf[i++] = 0x57; /* push %rdi */
1055 buf[i++] = 0x56; /* push %rsi */
1056 buf[i++] = 0x52; /* push %rdx */
1057 buf[i++] = 0x51; /* push %rcx */
1058 buf[i++] = 0x53; /* push %rbx */
1059 buf[i++] = 0x50; /* push %rax */
1060 buf[i++] = 0x41; buf[i++] = 0x57; /* push %r15 */
1061 buf[i++] = 0x41; buf[i++] = 0x56; /* push %r14 */
1062 buf[i++] = 0x41; buf[i++] = 0x55; /* push %r13 */
1063 buf[i++] = 0x41; buf[i++] = 0x54; /* push %r12 */
1064 buf[i++] = 0x41; buf[i++] = 0x53; /* push %r11 */
1065 buf[i++] = 0x41; buf[i++] = 0x52; /* push %r10 */
1066 buf[i++] = 0x41; buf[i++] = 0x51; /* push %r9 */
1067 buf[i++] = 0x41; buf[i++] = 0x50; /* push %r8 */
1068 buf[i++] = 0x9c; /* pushfq */
1069 buf[i++] = 0x48; /* movabs <addr>,%rdi */
1070 buf[i++] = 0xbf;
1071 memcpy (buf + i, &tpaddr, 8);
1072 i += 8;
1073 buf[i++] = 0x57; /* push %rdi */
1074 append_insns (&buildaddr, i, buf);
1075
1076 /* Stack space for the collecting_t object. */
1077 i = 0;
1078 i += push_opcode (&buf[i], "48 83 ec 18"); /* sub $0x18,%rsp */
1079 i += push_opcode (&buf[i], "48 b8"); /* mov <tpoint>,%rax */
1080 memcpy (buf + i, &tpoint, 8);
1081 i += 8;
1082 i += push_opcode (&buf[i], "48 89 04 24"); /* mov %rax,(%rsp) */
1083 i += push_opcode (&buf[i],
1084 "64 48 8b 04 25 00 00 00 00"); /* mov %fs:0x0,%rax */
1085 i += push_opcode (&buf[i], "48 89 44 24 08"); /* mov %rax,0x8(%rsp) */
1086 append_insns (&buildaddr, i, buf);
1087
1088 /* spin-lock. */
1089 i = 0;
1090 i += push_opcode (&buf[i], "48 be"); /* movl <lockaddr>,%rsi */
1091 memcpy (&buf[i], (void *) &lockaddr, 8);
1092 i += 8;
1093 i += push_opcode (&buf[i], "48 89 e1"); /* mov %rsp,%rcx */
1094 i += push_opcode (&buf[i], "31 c0"); /* xor %eax,%eax */
1095 i += push_opcode (&buf[i], "f0 48 0f b1 0e"); /* lock cmpxchg %rcx,(%rsi) */
1096 i += push_opcode (&buf[i], "48 85 c0"); /* test %rax,%rax */
1097 i += push_opcode (&buf[i], "75 f4"); /* jne <again> */
1098 append_insns (&buildaddr, i, buf);
1099
1100 /* Set up the gdb_collect call. */
1101 /* At this point, (stack pointer + 0x18) is the base of our saved
1102 register block. */
1103
1104 i = 0;
1105 i += push_opcode (&buf[i], "48 89 e6"); /* mov %rsp,%rsi */
1106 i += push_opcode (&buf[i], "48 83 c6 18"); /* add $0x18,%rsi */
1107
1108 /* tpoint address may be 64-bit wide. */
1109 i += push_opcode (&buf[i], "48 bf"); /* movl <addr>,%rdi */
1110 memcpy (buf + i, &tpoint, 8);
1111 i += 8;
1112 append_insns (&buildaddr, i, buf);
1113
1114 /* The collector function being in the shared library, may be
1115 >31-bits away off the jump pad. */
1116 i = 0;
1117 i += push_opcode (&buf[i], "48 b8"); /* mov $collector,%rax */
1118 memcpy (buf + i, &collector, 8);
1119 i += 8;
1120 i += push_opcode (&buf[i], "ff d0"); /* callq *%rax */
1121 append_insns (&buildaddr, i, buf);
1122
1123 /* Clear the spin-lock. */
1124 i = 0;
1125 i += push_opcode (&buf[i], "31 c0"); /* xor %eax,%eax */
1126 i += push_opcode (&buf[i], "48 a3"); /* mov %rax, lockaddr */
1127 memcpy (buf + i, &lockaddr, 8);
1128 i += 8;
1129 append_insns (&buildaddr, i, buf);
1130
1131 /* Remove stack that had been used for the collect_t object. */
1132 i = 0;
1133 i += push_opcode (&buf[i], "48 83 c4 18"); /* add $0x18,%rsp */
1134 append_insns (&buildaddr, i, buf);
1135
1136 /* Restore register state. */
1137 i = 0;
1138 buf[i++] = 0x48; /* add $0x8,%rsp */
1139 buf[i++] = 0x83;
1140 buf[i++] = 0xc4;
1141 buf[i++] = 0x08;
1142 buf[i++] = 0x9d; /* popfq */
1143 buf[i++] = 0x41; buf[i++] = 0x58; /* pop %r8 */
1144 buf[i++] = 0x41; buf[i++] = 0x59; /* pop %r9 */
1145 buf[i++] = 0x41; buf[i++] = 0x5a; /* pop %r10 */
1146 buf[i++] = 0x41; buf[i++] = 0x5b; /* pop %r11 */
1147 buf[i++] = 0x41; buf[i++] = 0x5c; /* pop %r12 */
1148 buf[i++] = 0x41; buf[i++] = 0x5d; /* pop %r13 */
1149 buf[i++] = 0x41; buf[i++] = 0x5e; /* pop %r14 */
1150 buf[i++] = 0x41; buf[i++] = 0x5f; /* pop %r15 */
1151 buf[i++] = 0x58; /* pop %rax */
1152 buf[i++] = 0x5b; /* pop %rbx */
1153 buf[i++] = 0x59; /* pop %rcx */
1154 buf[i++] = 0x5a; /* pop %rdx */
1155 buf[i++] = 0x5e; /* pop %rsi */
1156 buf[i++] = 0x5f; /* pop %rdi */
1157 buf[i++] = 0x5d; /* pop %rbp */
1158 buf[i++] = 0x5c; /* pop %rsp */
1159 append_insns (&buildaddr, i, buf);
1160
1161 /* Now, adjust the original instruction to execute in the jump
1162 pad. */
1163 *adjusted_insn_addr = buildaddr;
1164 relocate_instruction (&buildaddr, tpaddr);
1165 *adjusted_insn_addr_end = buildaddr;
1166
1167 /* Finally, write a jump back to the program. */
1168
1169 loffset = (tpaddr + orig_size) - (buildaddr + sizeof (jump_insn));
1170 if (loffset > INT_MAX || loffset < INT_MIN)
1171 {
1172 sprintf (err,
1173 "E.Jump back from jump pad too far from tracepoint "
1174 "(offset 0x%" PRIx64 " > int32).", loffset);
1175 return 1;
1176 }
1177
1178 offset = (int) loffset;
1179 memcpy (buf, jump_insn, sizeof (jump_insn));
1180 memcpy (buf + 1, &offset, 4);
1181 append_insns (&buildaddr, sizeof (jump_insn), buf);
1182
1183 /* The jump pad is now built. Wire in a jump to our jump pad. This
1184 is always done last (by our caller actually), so that we can
1185 install fast tracepoints with threads running. This relies on
1186 the agent's atomic write support. */
1187 loffset = *jump_entry - (tpaddr + sizeof (jump_insn));
1188 if (loffset > INT_MAX || loffset < INT_MIN)
1189 {
1190 sprintf (err,
1191 "E.Jump pad too far from tracepoint "
1192 "(offset 0x%" PRIx64 " > int32).", loffset);
1193 return 1;
1194 }
1195
1196 offset = (int) loffset;
1197
1198 memcpy (buf, jump_insn, sizeof (jump_insn));
1199 memcpy (buf + 1, &offset, 4);
1200 memcpy (jjump_pad_insn, buf, sizeof (jump_insn));
1201 *jjump_pad_insn_size = sizeof (jump_insn);
1202
1203 /* Return the end address of our pad. */
1204 *jump_entry = buildaddr;
1205
1206 return 0;
1207 }
1208
1209 #endif /* __x86_64__ */
1210
1211 /* Build a jump pad that saves registers and calls a collection
1212 function. Writes a jump instruction to the jump pad to
1213 JJUMPAD_INSN. The caller is responsible to write it in at the
1214 tracepoint address. */
1215
1216 static int
1217 i386_install_fast_tracepoint_jump_pad (CORE_ADDR tpoint, CORE_ADDR tpaddr,
1218 CORE_ADDR collector,
1219 CORE_ADDR lockaddr,
1220 ULONGEST orig_size,
1221 CORE_ADDR *jump_entry,
1222 CORE_ADDR *trampoline,
1223 ULONGEST *trampoline_size,
1224 unsigned char *jjump_pad_insn,
1225 ULONGEST *jjump_pad_insn_size,
1226 CORE_ADDR *adjusted_insn_addr,
1227 CORE_ADDR *adjusted_insn_addr_end,
1228 char *err)
1229 {
1230 unsigned char buf[0x100];
1231 int i, offset;
1232 CORE_ADDR buildaddr = *jump_entry;
1233
1234 /* Build the jump pad. */
1235
1236 /* First, do tracepoint data collection. Save registers. */
1237 i = 0;
1238 buf[i++] = 0x60; /* pushad */
1239 buf[i++] = 0x68; /* push tpaddr aka $pc */
1240 *((int *)(buf + i)) = (int) tpaddr;
1241 i += 4;
1242 buf[i++] = 0x9c; /* pushf */
1243 buf[i++] = 0x1e; /* push %ds */
1244 buf[i++] = 0x06; /* push %es */
1245 buf[i++] = 0x0f; /* push %fs */
1246 buf[i++] = 0xa0;
1247 buf[i++] = 0x0f; /* push %gs */
1248 buf[i++] = 0xa8;
1249 buf[i++] = 0x16; /* push %ss */
1250 buf[i++] = 0x0e; /* push %cs */
1251 append_insns (&buildaddr, i, buf);
1252
1253 /* Stack space for the collecting_t object. */
1254 i = 0;
1255 i += push_opcode (&buf[i], "83 ec 08"); /* sub $0x8,%esp */
1256
1257 /* Build the object. */
1258 i += push_opcode (&buf[i], "b8"); /* mov <tpoint>,%eax */
1259 memcpy (buf + i, &tpoint, 4);
1260 i += 4;
1261 i += push_opcode (&buf[i], "89 04 24"); /* mov %eax,(%esp) */
1262
1263 i += push_opcode (&buf[i], "65 a1 00 00 00 00"); /* mov %gs:0x0,%eax */
1264 i += push_opcode (&buf[i], "89 44 24 04"); /* mov %eax,0x4(%esp) */
1265 append_insns (&buildaddr, i, buf);
1266
1267 /* spin-lock. Note this is using cmpxchg, which leaves i386 behind.
1268 If we cared for it, this could be using xchg alternatively. */
1269
1270 i = 0;
1271 i += push_opcode (&buf[i], "31 c0"); /* xor %eax,%eax */
1272 i += push_opcode (&buf[i], "f0 0f b1 25"); /* lock cmpxchg
1273 %esp,<lockaddr> */
1274 memcpy (&buf[i], (void *) &lockaddr, 4);
1275 i += 4;
1276 i += push_opcode (&buf[i], "85 c0"); /* test %eax,%eax */
1277 i += push_opcode (&buf[i], "75 f2"); /* jne <again> */
1278 append_insns (&buildaddr, i, buf);
1279
1280
1281 /* Set up arguments to the gdb_collect call. */
1282 i = 0;
1283 i += push_opcode (&buf[i], "89 e0"); /* mov %esp,%eax */
1284 i += push_opcode (&buf[i], "83 c0 08"); /* add $0x08,%eax */
1285 i += push_opcode (&buf[i], "89 44 24 fc"); /* mov %eax,-0x4(%esp) */
1286 append_insns (&buildaddr, i, buf);
1287
1288 i = 0;
1289 i += push_opcode (&buf[i], "83 ec 08"); /* sub $0x8,%esp */
1290 append_insns (&buildaddr, i, buf);
1291
1292 i = 0;
1293 i += push_opcode (&buf[i], "c7 04 24"); /* movl <addr>,(%esp) */
1294 memcpy (&buf[i], (void *) &tpoint, 4);
1295 i += 4;
1296 append_insns (&buildaddr, i, buf);
1297
1298 buf[0] = 0xe8; /* call <reladdr> */
1299 offset = collector - (buildaddr + sizeof (jump_insn));
1300 memcpy (buf + 1, &offset, 4);
1301 append_insns (&buildaddr, 5, buf);
1302 /* Clean up after the call. */
1303 buf[0] = 0x83; /* add $0x8,%esp */
1304 buf[1] = 0xc4;
1305 buf[2] = 0x08;
1306 append_insns (&buildaddr, 3, buf);
1307
1308
1309 /* Clear the spin-lock. This would need the LOCK prefix on older
1310 broken archs. */
1311 i = 0;
1312 i += push_opcode (&buf[i], "31 c0"); /* xor %eax,%eax */
1313 i += push_opcode (&buf[i], "a3"); /* mov %eax, lockaddr */
1314 memcpy (buf + i, &lockaddr, 4);
1315 i += 4;
1316 append_insns (&buildaddr, i, buf);
1317
1318
1319 /* Remove stack that had been used for the collect_t object. */
1320 i = 0;
1321 i += push_opcode (&buf[i], "83 c4 08"); /* add $0x08,%esp */
1322 append_insns (&buildaddr, i, buf);
1323
1324 i = 0;
1325 buf[i++] = 0x83; /* add $0x4,%esp (no pop of %cs, assume unchanged) */
1326 buf[i++] = 0xc4;
1327 buf[i++] = 0x04;
1328 buf[i++] = 0x17; /* pop %ss */
1329 buf[i++] = 0x0f; /* pop %gs */
1330 buf[i++] = 0xa9;
1331 buf[i++] = 0x0f; /* pop %fs */
1332 buf[i++] = 0xa1;
1333 buf[i++] = 0x07; /* pop %es */
1334 buf[i++] = 0x1f; /* pop %ds */
1335 buf[i++] = 0x9d; /* popf */
1336 buf[i++] = 0x83; /* add $0x4,%esp (pop of tpaddr aka $pc) */
1337 buf[i++] = 0xc4;
1338 buf[i++] = 0x04;
1339 buf[i++] = 0x61; /* popad */
1340 append_insns (&buildaddr, i, buf);
1341
1342 /* Now, adjust the original instruction to execute in the jump
1343 pad. */
1344 *adjusted_insn_addr = buildaddr;
1345 relocate_instruction (&buildaddr, tpaddr);
1346 *adjusted_insn_addr_end = buildaddr;
1347
1348 /* Write the jump back to the program. */
1349 offset = (tpaddr + orig_size) - (buildaddr + sizeof (jump_insn));
1350 memcpy (buf, jump_insn, sizeof (jump_insn));
1351 memcpy (buf + 1, &offset, 4);
1352 append_insns (&buildaddr, sizeof (jump_insn), buf);
1353
1354 /* The jump pad is now built. Wire in a jump to our jump pad. This
1355 is always done last (by our caller actually), so that we can
1356 install fast tracepoints with threads running. This relies on
1357 the agent's atomic write support. */
1358 if (orig_size == 4)
1359 {
1360 /* Create a trampoline. */
1361 *trampoline_size = sizeof (jump_insn);
1362 if (!claim_trampoline_space (*trampoline_size, trampoline))
1363 {
1364 /* No trampoline space available. */
1365 strcpy (err,
1366 "E.Cannot allocate trampoline space needed for fast "
1367 "tracepoints on 4-byte instructions.");
1368 return 1;
1369 }
1370
1371 offset = *jump_entry - (*trampoline + sizeof (jump_insn));
1372 memcpy (buf, jump_insn, sizeof (jump_insn));
1373 memcpy (buf + 1, &offset, 4);
1374 write_inferior_memory (*trampoline, buf, sizeof (jump_insn));
1375
1376 /* Use a 16-bit relative jump instruction to jump to the trampoline. */
1377 offset = (*trampoline - (tpaddr + sizeof (small_jump_insn))) & 0xffff;
1378 memcpy (buf, small_jump_insn, sizeof (small_jump_insn));
1379 memcpy (buf + 2, &offset, 2);
1380 memcpy (jjump_pad_insn, buf, sizeof (small_jump_insn));
1381 *jjump_pad_insn_size = sizeof (small_jump_insn);
1382 }
1383 else
1384 {
1385 /* Else use a 32-bit relative jump instruction. */
1386 offset = *jump_entry - (tpaddr + sizeof (jump_insn));
1387 memcpy (buf, jump_insn, sizeof (jump_insn));
1388 memcpy (buf + 1, &offset, 4);
1389 memcpy (jjump_pad_insn, buf, sizeof (jump_insn));
1390 *jjump_pad_insn_size = sizeof (jump_insn);
1391 }
1392
1393 /* Return the end address of our pad. */
1394 *jump_entry = buildaddr;
1395
1396 return 0;
1397 }
1398
1399 static int
1400 x86_install_fast_tracepoint_jump_pad (CORE_ADDR tpoint, CORE_ADDR tpaddr,
1401 CORE_ADDR collector,
1402 CORE_ADDR lockaddr,
1403 ULONGEST orig_size,
1404 CORE_ADDR *jump_entry,
1405 CORE_ADDR *trampoline,
1406 ULONGEST *trampoline_size,
1407 unsigned char *jjump_pad_insn,
1408 ULONGEST *jjump_pad_insn_size,
1409 CORE_ADDR *adjusted_insn_addr,
1410 CORE_ADDR *adjusted_insn_addr_end,
1411 char *err)
1412 {
1413 #ifdef __x86_64__
1414 if (is_64bit_tdesc ())
1415 return amd64_install_fast_tracepoint_jump_pad (tpoint, tpaddr,
1416 collector, lockaddr,
1417 orig_size, jump_entry,
1418 trampoline, trampoline_size,
1419 jjump_pad_insn,
1420 jjump_pad_insn_size,
1421 adjusted_insn_addr,
1422 adjusted_insn_addr_end,
1423 err);
1424 #endif
1425
1426 return i386_install_fast_tracepoint_jump_pad (tpoint, tpaddr,
1427 collector, lockaddr,
1428 orig_size, jump_entry,
1429 trampoline, trampoline_size,
1430 jjump_pad_insn,
1431 jjump_pad_insn_size,
1432 adjusted_insn_addr,
1433 adjusted_insn_addr_end,
1434 err);
1435 }
1436
1437 /* Return the minimum instruction length for fast tracepoints on x86/x86-64
1438 architectures. */
1439
1440 static int
1441 x86_get_min_fast_tracepoint_insn_len (void)
1442 {
1443 static int warned_about_fast_tracepoints = 0;
1444
1445 #ifdef __x86_64__
1446 /* On x86-64, 5-byte jump instructions with a 4-byte offset are always
1447 used for fast tracepoints. */
1448 if (is_64bit_tdesc ())
1449 return 5;
1450 #endif
1451
1452 if (agent_loaded_p ())
1453 {
1454 char errbuf[IPA_BUFSIZ];
1455
1456 errbuf[0] = '\0';
1457
1458 /* On x86, if trampolines are available, then 4-byte jump instructions
1459 with a 2-byte offset may be used, otherwise 5-byte jump instructions
1460 with a 4-byte offset are used instead. */
1461 if (have_fast_tracepoint_trampoline_buffer (errbuf))
1462 return 4;
1463 else
1464 {
1465 /* GDB has no channel to explain to user why a shorter fast
1466 tracepoint is not possible, but at least make GDBserver
1467 mention that something has gone awry. */
1468 if (!warned_about_fast_tracepoints)
1469 {
1470 warning ("4-byte fast tracepoints not available; %s\n", errbuf);
1471 warned_about_fast_tracepoints = 1;
1472 }
1473 return 5;
1474 }
1475 }
1476 else
1477 {
1478 /* Indicate that the minimum length is currently unknown since the IPA
1479 has not loaded yet. */
1480 return 0;
1481 }
1482 }
1483
1484 static void
1485 add_insns (unsigned char *start, int len)
1486 {
1487 CORE_ADDR buildaddr = current_insn_ptr;
1488
1489 if (debug_threads)
1490 debug_printf ("Adding %d bytes of insn at %s\n",
1491 len, paddress (buildaddr));
1492
1493 append_insns (&buildaddr, len, start);
1494 current_insn_ptr = buildaddr;
1495 }
1496
1497 /* Our general strategy for emitting code is to avoid specifying raw
1498 bytes whenever possible, and instead copy a block of inline asm
1499 that is embedded in the function. This is a little messy, because
1500 we need to keep the compiler from discarding what looks like dead
1501 code, plus suppress various warnings. */
1502
1503 #define EMIT_ASM(NAME, INSNS) \
1504 do \
1505 { \
1506 extern unsigned char start_ ## NAME, end_ ## NAME; \
1507 add_insns (&start_ ## NAME, &end_ ## NAME - &start_ ## NAME); \
1508 __asm__ ("jmp end_" #NAME "\n" \
1509 "\t" "start_" #NAME ":" \
1510 "\t" INSNS "\n" \
1511 "\t" "end_" #NAME ":"); \
1512 } while (0)
1513
1514 #ifdef __x86_64__
1515
1516 #define EMIT_ASM32(NAME,INSNS) \
1517 do \
1518 { \
1519 extern unsigned char start_ ## NAME, end_ ## NAME; \
1520 add_insns (&start_ ## NAME, &end_ ## NAME - &start_ ## NAME); \
1521 __asm__ (".code32\n" \
1522 "\t" "jmp end_" #NAME "\n" \
1523 "\t" "start_" #NAME ":\n" \
1524 "\t" INSNS "\n" \
1525 "\t" "end_" #NAME ":\n" \
1526 ".code64\n"); \
1527 } while (0)
1528
1529 #else
1530
1531 #define EMIT_ASM32(NAME,INSNS) EMIT_ASM(NAME,INSNS)
1532
1533 #endif
1534
1535 #ifdef __x86_64__
1536
1537 static void
1538 amd64_emit_prologue (void)
1539 {
1540 EMIT_ASM (amd64_prologue,
1541 "pushq %rbp\n\t"
1542 "movq %rsp,%rbp\n\t"
1543 "sub $0x20,%rsp\n\t"
1544 "movq %rdi,-8(%rbp)\n\t"
1545 "movq %rsi,-16(%rbp)");
1546 }
1547
1548
1549 static void
1550 amd64_emit_epilogue (void)
1551 {
1552 EMIT_ASM (amd64_epilogue,
1553 "movq -16(%rbp),%rdi\n\t"
1554 "movq %rax,(%rdi)\n\t"
1555 "xor %rax,%rax\n\t"
1556 "leave\n\t"
1557 "ret");
1558 }
1559
1560 static void
1561 amd64_emit_add (void)
1562 {
1563 EMIT_ASM (amd64_add,
1564 "add (%rsp),%rax\n\t"
1565 "lea 0x8(%rsp),%rsp");
1566 }
1567
1568 static void
1569 amd64_emit_sub (void)
1570 {
1571 EMIT_ASM (amd64_sub,
1572 "sub %rax,(%rsp)\n\t"
1573 "pop %rax");
1574 }
1575
1576 static void
1577 amd64_emit_mul (void)
1578 {
1579 emit_error = 1;
1580 }
1581
1582 static void
1583 amd64_emit_lsh (void)
1584 {
1585 emit_error = 1;
1586 }
1587
1588 static void
1589 amd64_emit_rsh_signed (void)
1590 {
1591 emit_error = 1;
1592 }
1593
1594 static void
1595 amd64_emit_rsh_unsigned (void)
1596 {
1597 emit_error = 1;
1598 }
1599
1600 static void
1601 amd64_emit_ext (int arg)
1602 {
1603 switch (arg)
1604 {
1605 case 8:
1606 EMIT_ASM (amd64_ext_8,
1607 "cbtw\n\t"
1608 "cwtl\n\t"
1609 "cltq");
1610 break;
1611 case 16:
1612 EMIT_ASM (amd64_ext_16,
1613 "cwtl\n\t"
1614 "cltq");
1615 break;
1616 case 32:
1617 EMIT_ASM (amd64_ext_32,
1618 "cltq");
1619 break;
1620 default:
1621 emit_error = 1;
1622 }
1623 }
1624
1625 static void
1626 amd64_emit_log_not (void)
1627 {
1628 EMIT_ASM (amd64_log_not,
1629 "test %rax,%rax\n\t"
1630 "sete %cl\n\t"
1631 "movzbq %cl,%rax");
1632 }
1633
1634 static void
1635 amd64_emit_bit_and (void)
1636 {
1637 EMIT_ASM (amd64_and,
1638 "and (%rsp),%rax\n\t"
1639 "lea 0x8(%rsp),%rsp");
1640 }
1641
1642 static void
1643 amd64_emit_bit_or (void)
1644 {
1645 EMIT_ASM (amd64_or,
1646 "or (%rsp),%rax\n\t"
1647 "lea 0x8(%rsp),%rsp");
1648 }
1649
1650 static void
1651 amd64_emit_bit_xor (void)
1652 {
1653 EMIT_ASM (amd64_xor,
1654 "xor (%rsp),%rax\n\t"
1655 "lea 0x8(%rsp),%rsp");
1656 }
1657
1658 static void
1659 amd64_emit_bit_not (void)
1660 {
1661 EMIT_ASM (amd64_bit_not,
1662 "xorq $0xffffffffffffffff,%rax");
1663 }
1664
1665 static void
1666 amd64_emit_equal (void)
1667 {
1668 EMIT_ASM (amd64_equal,
1669 "cmp %rax,(%rsp)\n\t"
1670 "je .Lamd64_equal_true\n\t"
1671 "xor %rax,%rax\n\t"
1672 "jmp .Lamd64_equal_end\n\t"
1673 ".Lamd64_equal_true:\n\t"
1674 "mov $0x1,%rax\n\t"
1675 ".Lamd64_equal_end:\n\t"
1676 "lea 0x8(%rsp),%rsp");
1677 }
1678
1679 static void
1680 amd64_emit_less_signed (void)
1681 {
1682 EMIT_ASM (amd64_less_signed,
1683 "cmp %rax,(%rsp)\n\t"
1684 "jl .Lamd64_less_signed_true\n\t"
1685 "xor %rax,%rax\n\t"
1686 "jmp .Lamd64_less_signed_end\n\t"
1687 ".Lamd64_less_signed_true:\n\t"
1688 "mov $1,%rax\n\t"
1689 ".Lamd64_less_signed_end:\n\t"
1690 "lea 0x8(%rsp),%rsp");
1691 }
1692
1693 static void
1694 amd64_emit_less_unsigned (void)
1695 {
1696 EMIT_ASM (amd64_less_unsigned,
1697 "cmp %rax,(%rsp)\n\t"
1698 "jb .Lamd64_less_unsigned_true\n\t"
1699 "xor %rax,%rax\n\t"
1700 "jmp .Lamd64_less_unsigned_end\n\t"
1701 ".Lamd64_less_unsigned_true:\n\t"
1702 "mov $1,%rax\n\t"
1703 ".Lamd64_less_unsigned_end:\n\t"
1704 "lea 0x8(%rsp),%rsp");
1705 }
1706
1707 static void
1708 amd64_emit_ref (int size)
1709 {
1710 switch (size)
1711 {
1712 case 1:
1713 EMIT_ASM (amd64_ref1,
1714 "movb (%rax),%al");
1715 break;
1716 case 2:
1717 EMIT_ASM (amd64_ref2,
1718 "movw (%rax),%ax");
1719 break;
1720 case 4:
1721 EMIT_ASM (amd64_ref4,
1722 "movl (%rax),%eax");
1723 break;
1724 case 8:
1725 EMIT_ASM (amd64_ref8,
1726 "movq (%rax),%rax");
1727 break;
1728 }
1729 }
1730
1731 static void
1732 amd64_emit_if_goto (int *offset_p, int *size_p)
1733 {
1734 EMIT_ASM (amd64_if_goto,
1735 "mov %rax,%rcx\n\t"
1736 "pop %rax\n\t"
1737 "cmp $0,%rcx\n\t"
1738 ".byte 0x0f, 0x85, 0x0, 0x0, 0x0, 0x0");
1739 if (offset_p)
1740 *offset_p = 10;
1741 if (size_p)
1742 *size_p = 4;
1743 }
1744
1745 static void
1746 amd64_emit_goto (int *offset_p, int *size_p)
1747 {
1748 EMIT_ASM (amd64_goto,
1749 ".byte 0xe9, 0x0, 0x0, 0x0, 0x0");
1750 if (offset_p)
1751 *offset_p = 1;
1752 if (size_p)
1753 *size_p = 4;
1754 }
1755
1756 static void
1757 amd64_write_goto_address (CORE_ADDR from, CORE_ADDR to, int size)
1758 {
1759 int diff = (to - (from + size));
1760 unsigned char buf[sizeof (int)];
1761
1762 if (size != 4)
1763 {
1764 emit_error = 1;
1765 return;
1766 }
1767
1768 memcpy (buf, &diff, sizeof (int));
1769 write_inferior_memory (from, buf, sizeof (int));
1770 }
1771
1772 static void
1773 amd64_emit_const (LONGEST num)
1774 {
1775 unsigned char buf[16];
1776 int i;
1777 CORE_ADDR buildaddr = current_insn_ptr;
1778
1779 i = 0;
1780 buf[i++] = 0x48; buf[i++] = 0xb8; /* mov $<n>,%rax */
1781 memcpy (&buf[i], &num, sizeof (num));
1782 i += 8;
1783 append_insns (&buildaddr, i, buf);
1784 current_insn_ptr = buildaddr;
1785 }
1786
1787 static void
1788 amd64_emit_call (CORE_ADDR fn)
1789 {
1790 unsigned char buf[16];
1791 int i;
1792 CORE_ADDR buildaddr;
1793 LONGEST offset64;
1794
1795 /* The destination function being in the shared library, may be
1796 >31-bits away off the compiled code pad. */
1797
1798 buildaddr = current_insn_ptr;
1799
1800 offset64 = fn - (buildaddr + 1 /* call op */ + 4 /* 32-bit offset */);
1801
1802 i = 0;
1803
1804 if (offset64 > INT_MAX || offset64 < INT_MIN)
1805 {
1806 /* Offset is too large for a call. Use callq, but that requires
1807 a register, so avoid it if possible. Use r10, since it is
1808 call-clobbered, we don't have to push/pop it. */
1809 buf[i++] = 0x48; /* mov $fn,%r10 */
1810 buf[i++] = 0xba;
1811 memcpy (buf + i, &fn, 8);
1812 i += 8;
1813 buf[i++] = 0xff; /* callq *%r10 */
1814 buf[i++] = 0xd2;
1815 }
1816 else
1817 {
1818 int offset32 = offset64; /* we know we can't overflow here. */
1819
1820 buf[i++] = 0xe8; /* call <reladdr> */
1821 memcpy (buf + i, &offset32, 4);
1822 i += 4;
1823 }
1824
1825 append_insns (&buildaddr, i, buf);
1826 current_insn_ptr = buildaddr;
1827 }
1828
1829 static void
1830 amd64_emit_reg (int reg)
1831 {
1832 unsigned char buf[16];
1833 int i;
1834 CORE_ADDR buildaddr;
1835
1836 /* Assume raw_regs is still in %rdi. */
1837 buildaddr = current_insn_ptr;
1838 i = 0;
1839 buf[i++] = 0xbe; /* mov $<n>,%esi */
1840 memcpy (&buf[i], &reg, sizeof (reg));
1841 i += 4;
1842 append_insns (&buildaddr, i, buf);
1843 current_insn_ptr = buildaddr;
1844 amd64_emit_call (get_raw_reg_func_addr ());
1845 }
1846
1847 static void
1848 amd64_emit_pop (void)
1849 {
1850 EMIT_ASM (amd64_pop,
1851 "pop %rax");
1852 }
1853
1854 static void
1855 amd64_emit_stack_flush (void)
1856 {
1857 EMIT_ASM (amd64_stack_flush,
1858 "push %rax");
1859 }
1860
1861 static void
1862 amd64_emit_zero_ext (int arg)
1863 {
1864 switch (arg)
1865 {
1866 case 8:
1867 EMIT_ASM (amd64_zero_ext_8,
1868 "and $0xff,%rax");
1869 break;
1870 case 16:
1871 EMIT_ASM (amd64_zero_ext_16,
1872 "and $0xffff,%rax");
1873 break;
1874 case 32:
1875 EMIT_ASM (amd64_zero_ext_32,
1876 "mov $0xffffffff,%rcx\n\t"
1877 "and %rcx,%rax");
1878 break;
1879 default:
1880 emit_error = 1;
1881 }
1882 }
1883
1884 static void
1885 amd64_emit_swap (void)
1886 {
1887 EMIT_ASM (amd64_swap,
1888 "mov %rax,%rcx\n\t"
1889 "pop %rax\n\t"
1890 "push %rcx");
1891 }
1892
1893 static void
1894 amd64_emit_stack_adjust (int n)
1895 {
1896 unsigned char buf[16];
1897 int i;
1898 CORE_ADDR buildaddr = current_insn_ptr;
1899
1900 i = 0;
1901 buf[i++] = 0x48; /* lea $<n>(%rsp),%rsp */
1902 buf[i++] = 0x8d;
1903 buf[i++] = 0x64;
1904 buf[i++] = 0x24;
1905 /* This only handles adjustments up to 16, but we don't expect any more. */
1906 buf[i++] = n * 8;
1907 append_insns (&buildaddr, i, buf);
1908 current_insn_ptr = buildaddr;
1909 }
1910
1911 /* FN's prototype is `LONGEST(*fn)(int)'. */
1912
1913 static void
1914 amd64_emit_int_call_1 (CORE_ADDR fn, int arg1)
1915 {
1916 unsigned char buf[16];
1917 int i;
1918 CORE_ADDR buildaddr;
1919
1920 buildaddr = current_insn_ptr;
1921 i = 0;
1922 buf[i++] = 0xbf; /* movl $<n>,%edi */
1923 memcpy (&buf[i], &arg1, sizeof (arg1));
1924 i += 4;
1925 append_insns (&buildaddr, i, buf);
1926 current_insn_ptr = buildaddr;
1927 amd64_emit_call (fn);
1928 }
1929
1930 /* FN's prototype is `void(*fn)(int,LONGEST)'. */
1931
1932 static void
1933 amd64_emit_void_call_2 (CORE_ADDR fn, int arg1)
1934 {
1935 unsigned char buf[16];
1936 int i;
1937 CORE_ADDR buildaddr;
1938
1939 buildaddr = current_insn_ptr;
1940 i = 0;
1941 buf[i++] = 0xbf; /* movl $<n>,%edi */
1942 memcpy (&buf[i], &arg1, sizeof (arg1));
1943 i += 4;
1944 append_insns (&buildaddr, i, buf);
1945 current_insn_ptr = buildaddr;
1946 EMIT_ASM (amd64_void_call_2_a,
1947 /* Save away a copy of the stack top. */
1948 "push %rax\n\t"
1949 /* Also pass top as the second argument. */
1950 "mov %rax,%rsi");
1951 amd64_emit_call (fn);
1952 EMIT_ASM (amd64_void_call_2_b,
1953 /* Restore the stack top, %rax may have been trashed. */
1954 "pop %rax");
1955 }
1956
1957 void
1958 amd64_emit_eq_goto (int *offset_p, int *size_p)
1959 {
1960 EMIT_ASM (amd64_eq,
1961 "cmp %rax,(%rsp)\n\t"
1962 "jne .Lamd64_eq_fallthru\n\t"
1963 "lea 0x8(%rsp),%rsp\n\t"
1964 "pop %rax\n\t"
1965 /* jmp, but don't trust the assembler to choose the right jump */
1966 ".byte 0xe9, 0x0, 0x0, 0x0, 0x0\n\t"
1967 ".Lamd64_eq_fallthru:\n\t"
1968 "lea 0x8(%rsp),%rsp\n\t"
1969 "pop %rax");
1970
1971 if (offset_p)
1972 *offset_p = 13;
1973 if (size_p)
1974 *size_p = 4;
1975 }
1976
1977 void
1978 amd64_emit_ne_goto (int *offset_p, int *size_p)
1979 {
1980 EMIT_ASM (amd64_ne,
1981 "cmp %rax,(%rsp)\n\t"
1982 "je .Lamd64_ne_fallthru\n\t"
1983 "lea 0x8(%rsp),%rsp\n\t"
1984 "pop %rax\n\t"
1985 /* jmp, but don't trust the assembler to choose the right jump */
1986 ".byte 0xe9, 0x0, 0x0, 0x0, 0x0\n\t"
1987 ".Lamd64_ne_fallthru:\n\t"
1988 "lea 0x8(%rsp),%rsp\n\t"
1989 "pop %rax");
1990
1991 if (offset_p)
1992 *offset_p = 13;
1993 if (size_p)
1994 *size_p = 4;
1995 }
1996
1997 void
1998 amd64_emit_lt_goto (int *offset_p, int *size_p)
1999 {
2000 EMIT_ASM (amd64_lt,
2001 "cmp %rax,(%rsp)\n\t"
2002 "jnl .Lamd64_lt_fallthru\n\t"
2003 "lea 0x8(%rsp),%rsp\n\t"
2004 "pop %rax\n\t"
2005 /* jmp, but don't trust the assembler to choose the right jump */
2006 ".byte 0xe9, 0x0, 0x0, 0x0, 0x0\n\t"
2007 ".Lamd64_lt_fallthru:\n\t"
2008 "lea 0x8(%rsp),%rsp\n\t"
2009 "pop %rax");
2010
2011 if (offset_p)
2012 *offset_p = 13;
2013 if (size_p)
2014 *size_p = 4;
2015 }
2016
2017 void
2018 amd64_emit_le_goto (int *offset_p, int *size_p)
2019 {
2020 EMIT_ASM (amd64_le,
2021 "cmp %rax,(%rsp)\n\t"
2022 "jnle .Lamd64_le_fallthru\n\t"
2023 "lea 0x8(%rsp),%rsp\n\t"
2024 "pop %rax\n\t"
2025 /* jmp, but don't trust the assembler to choose the right jump */
2026 ".byte 0xe9, 0x0, 0x0, 0x0, 0x0\n\t"
2027 ".Lamd64_le_fallthru:\n\t"
2028 "lea 0x8(%rsp),%rsp\n\t"
2029 "pop %rax");
2030
2031 if (offset_p)
2032 *offset_p = 13;
2033 if (size_p)
2034 *size_p = 4;
2035 }
2036
2037 void
2038 amd64_emit_gt_goto (int *offset_p, int *size_p)
2039 {
2040 EMIT_ASM (amd64_gt,
2041 "cmp %rax,(%rsp)\n\t"
2042 "jng .Lamd64_gt_fallthru\n\t"
2043 "lea 0x8(%rsp),%rsp\n\t"
2044 "pop %rax\n\t"
2045 /* jmp, but don't trust the assembler to choose the right jump */
2046 ".byte 0xe9, 0x0, 0x0, 0x0, 0x0\n\t"
2047 ".Lamd64_gt_fallthru:\n\t"
2048 "lea 0x8(%rsp),%rsp\n\t"
2049 "pop %rax");
2050
2051 if (offset_p)
2052 *offset_p = 13;
2053 if (size_p)
2054 *size_p = 4;
2055 }
2056
2057 void
2058 amd64_emit_ge_goto (int *offset_p, int *size_p)
2059 {
2060 EMIT_ASM (amd64_ge,
2061 "cmp %rax,(%rsp)\n\t"
2062 "jnge .Lamd64_ge_fallthru\n\t"
2063 ".Lamd64_ge_jump:\n\t"
2064 "lea 0x8(%rsp),%rsp\n\t"
2065 "pop %rax\n\t"
2066 /* jmp, but don't trust the assembler to choose the right jump */
2067 ".byte 0xe9, 0x0, 0x0, 0x0, 0x0\n\t"
2068 ".Lamd64_ge_fallthru:\n\t"
2069 "lea 0x8(%rsp),%rsp\n\t"
2070 "pop %rax");
2071
2072 if (offset_p)
2073 *offset_p = 13;
2074 if (size_p)
2075 *size_p = 4;
2076 }
2077
2078 struct emit_ops amd64_emit_ops =
2079 {
2080 amd64_emit_prologue,
2081 amd64_emit_epilogue,
2082 amd64_emit_add,
2083 amd64_emit_sub,
2084 amd64_emit_mul,
2085 amd64_emit_lsh,
2086 amd64_emit_rsh_signed,
2087 amd64_emit_rsh_unsigned,
2088 amd64_emit_ext,
2089 amd64_emit_log_not,
2090 amd64_emit_bit_and,
2091 amd64_emit_bit_or,
2092 amd64_emit_bit_xor,
2093 amd64_emit_bit_not,
2094 amd64_emit_equal,
2095 amd64_emit_less_signed,
2096 amd64_emit_less_unsigned,
2097 amd64_emit_ref,
2098 amd64_emit_if_goto,
2099 amd64_emit_goto,
2100 amd64_write_goto_address,
2101 amd64_emit_const,
2102 amd64_emit_call,
2103 amd64_emit_reg,
2104 amd64_emit_pop,
2105 amd64_emit_stack_flush,
2106 amd64_emit_zero_ext,
2107 amd64_emit_swap,
2108 amd64_emit_stack_adjust,
2109 amd64_emit_int_call_1,
2110 amd64_emit_void_call_2,
2111 amd64_emit_eq_goto,
2112 amd64_emit_ne_goto,
2113 amd64_emit_lt_goto,
2114 amd64_emit_le_goto,
2115 amd64_emit_gt_goto,
2116 amd64_emit_ge_goto
2117 };
2118
2119 #endif /* __x86_64__ */
2120
2121 static void
2122 i386_emit_prologue (void)
2123 {
2124 EMIT_ASM32 (i386_prologue,
2125 "push %ebp\n\t"
2126 "mov %esp,%ebp\n\t"
2127 "push %ebx");
2128 /* At this point, the raw regs base address is at 8(%ebp), and the
2129 value pointer is at 12(%ebp). */
2130 }
2131
2132 static void
2133 i386_emit_epilogue (void)
2134 {
2135 EMIT_ASM32 (i386_epilogue,
2136 "mov 12(%ebp),%ecx\n\t"
2137 "mov %eax,(%ecx)\n\t"
2138 "mov %ebx,0x4(%ecx)\n\t"
2139 "xor %eax,%eax\n\t"
2140 "pop %ebx\n\t"
2141 "pop %ebp\n\t"
2142 "ret");
2143 }
2144
2145 static void
2146 i386_emit_add (void)
2147 {
2148 EMIT_ASM32 (i386_add,
2149 "add (%esp),%eax\n\t"
2150 "adc 0x4(%esp),%ebx\n\t"
2151 "lea 0x8(%esp),%esp");
2152 }
2153
2154 static void
2155 i386_emit_sub (void)
2156 {
2157 EMIT_ASM32 (i386_sub,
2158 "subl %eax,(%esp)\n\t"
2159 "sbbl %ebx,4(%esp)\n\t"
2160 "pop %eax\n\t"
2161 "pop %ebx\n\t");
2162 }
2163
2164 static void
2165 i386_emit_mul (void)
2166 {
2167 emit_error = 1;
2168 }
2169
2170 static void
2171 i386_emit_lsh (void)
2172 {
2173 emit_error = 1;
2174 }
2175
2176 static void
2177 i386_emit_rsh_signed (void)
2178 {
2179 emit_error = 1;
2180 }
2181
2182 static void
2183 i386_emit_rsh_unsigned (void)
2184 {
2185 emit_error = 1;
2186 }
2187
2188 static void
2189 i386_emit_ext (int arg)
2190 {
2191 switch (arg)
2192 {
2193 case 8:
2194 EMIT_ASM32 (i386_ext_8,
2195 "cbtw\n\t"
2196 "cwtl\n\t"
2197 "movl %eax,%ebx\n\t"
2198 "sarl $31,%ebx");
2199 break;
2200 case 16:
2201 EMIT_ASM32 (i386_ext_16,
2202 "cwtl\n\t"
2203 "movl %eax,%ebx\n\t"
2204 "sarl $31,%ebx");
2205 break;
2206 case 32:
2207 EMIT_ASM32 (i386_ext_32,
2208 "movl %eax,%ebx\n\t"
2209 "sarl $31,%ebx");
2210 break;
2211 default:
2212 emit_error = 1;
2213 }
2214 }
2215
2216 static void
2217 i386_emit_log_not (void)
2218 {
2219 EMIT_ASM32 (i386_log_not,
2220 "or %ebx,%eax\n\t"
2221 "test %eax,%eax\n\t"
2222 "sete %cl\n\t"
2223 "xor %ebx,%ebx\n\t"
2224 "movzbl %cl,%eax");
2225 }
2226
2227 static void
2228 i386_emit_bit_and (void)
2229 {
2230 EMIT_ASM32 (i386_and,
2231 "and (%esp),%eax\n\t"
2232 "and 0x4(%esp),%ebx\n\t"
2233 "lea 0x8(%esp),%esp");
2234 }
2235
2236 static void
2237 i386_emit_bit_or (void)
2238 {
2239 EMIT_ASM32 (i386_or,
2240 "or (%esp),%eax\n\t"
2241 "or 0x4(%esp),%ebx\n\t"
2242 "lea 0x8(%esp),%esp");
2243 }
2244
2245 static void
2246 i386_emit_bit_xor (void)
2247 {
2248 EMIT_ASM32 (i386_xor,
2249 "xor (%esp),%eax\n\t"
2250 "xor 0x4(%esp),%ebx\n\t"
2251 "lea 0x8(%esp),%esp");
2252 }
2253
2254 static void
2255 i386_emit_bit_not (void)
2256 {
2257 EMIT_ASM32 (i386_bit_not,
2258 "xor $0xffffffff,%eax\n\t"
2259 "xor $0xffffffff,%ebx\n\t");
2260 }
2261
2262 static void
2263 i386_emit_equal (void)
2264 {
2265 EMIT_ASM32 (i386_equal,
2266 "cmpl %ebx,4(%esp)\n\t"
2267 "jne .Li386_equal_false\n\t"
2268 "cmpl %eax,(%esp)\n\t"
2269 "je .Li386_equal_true\n\t"
2270 ".Li386_equal_false:\n\t"
2271 "xor %eax,%eax\n\t"
2272 "jmp .Li386_equal_end\n\t"
2273 ".Li386_equal_true:\n\t"
2274 "mov $1,%eax\n\t"
2275 ".Li386_equal_end:\n\t"
2276 "xor %ebx,%ebx\n\t"
2277 "lea 0x8(%esp),%esp");
2278 }
2279
2280 static void
2281 i386_emit_less_signed (void)
2282 {
2283 EMIT_ASM32 (i386_less_signed,
2284 "cmpl %ebx,4(%esp)\n\t"
2285 "jl .Li386_less_signed_true\n\t"
2286 "jne .Li386_less_signed_false\n\t"
2287 "cmpl %eax,(%esp)\n\t"
2288 "jl .Li386_less_signed_true\n\t"
2289 ".Li386_less_signed_false:\n\t"
2290 "xor %eax,%eax\n\t"
2291 "jmp .Li386_less_signed_end\n\t"
2292 ".Li386_less_signed_true:\n\t"
2293 "mov $1,%eax\n\t"
2294 ".Li386_less_signed_end:\n\t"
2295 "xor %ebx,%ebx\n\t"
2296 "lea 0x8(%esp),%esp");
2297 }
2298
2299 static void
2300 i386_emit_less_unsigned (void)
2301 {
2302 EMIT_ASM32 (i386_less_unsigned,
2303 "cmpl %ebx,4(%esp)\n\t"
2304 "jb .Li386_less_unsigned_true\n\t"
2305 "jne .Li386_less_unsigned_false\n\t"
2306 "cmpl %eax,(%esp)\n\t"
2307 "jb .Li386_less_unsigned_true\n\t"
2308 ".Li386_less_unsigned_false:\n\t"
2309 "xor %eax,%eax\n\t"
2310 "jmp .Li386_less_unsigned_end\n\t"
2311 ".Li386_less_unsigned_true:\n\t"
2312 "mov $1,%eax\n\t"
2313 ".Li386_less_unsigned_end:\n\t"
2314 "xor %ebx,%ebx\n\t"
2315 "lea 0x8(%esp),%esp");
2316 }
2317
2318 static void
2319 i386_emit_ref (int size)
2320 {
2321 switch (size)
2322 {
2323 case 1:
2324 EMIT_ASM32 (i386_ref1,
2325 "movb (%eax),%al");
2326 break;
2327 case 2:
2328 EMIT_ASM32 (i386_ref2,
2329 "movw (%eax),%ax");
2330 break;
2331 case 4:
2332 EMIT_ASM32 (i386_ref4,
2333 "movl (%eax),%eax");
2334 break;
2335 case 8:
2336 EMIT_ASM32 (i386_ref8,
2337 "movl 4(%eax),%ebx\n\t"
2338 "movl (%eax),%eax");
2339 break;
2340 }
2341 }
2342
2343 static void
2344 i386_emit_if_goto (int *offset_p, int *size_p)
2345 {
2346 EMIT_ASM32 (i386_if_goto,
2347 "mov %eax,%ecx\n\t"
2348 "or %ebx,%ecx\n\t"
2349 "pop %eax\n\t"
2350 "pop %ebx\n\t"
2351 "cmpl $0,%ecx\n\t"
2352 /* Don't trust the assembler to choose the right jump */
2353 ".byte 0x0f, 0x85, 0x0, 0x0, 0x0, 0x0");
2354
2355 if (offset_p)
2356 *offset_p = 11; /* be sure that this matches the sequence above */
2357 if (size_p)
2358 *size_p = 4;
2359 }
2360
2361 static void
2362 i386_emit_goto (int *offset_p, int *size_p)
2363 {
2364 EMIT_ASM32 (i386_goto,
2365 /* Don't trust the assembler to choose the right jump */
2366 ".byte 0xe9, 0x0, 0x0, 0x0, 0x0");
2367 if (offset_p)
2368 *offset_p = 1;
2369 if (size_p)
2370 *size_p = 4;
2371 }
2372
2373 static void
2374 i386_write_goto_address (CORE_ADDR from, CORE_ADDR to, int size)
2375 {
2376 int diff = (to - (from + size));
2377 unsigned char buf[sizeof (int)];
2378
2379 /* We're only doing 4-byte sizes at the moment. */
2380 if (size != 4)
2381 {
2382 emit_error = 1;
2383 return;
2384 }
2385
2386 memcpy (buf, &diff, sizeof (int));
2387 write_inferior_memory (from, buf, sizeof (int));
2388 }
2389
2390 static void
2391 i386_emit_const (LONGEST num)
2392 {
2393 unsigned char buf[16];
2394 int i, hi, lo;
2395 CORE_ADDR buildaddr = current_insn_ptr;
2396
2397 i = 0;
2398 buf[i++] = 0xb8; /* mov $<n>,%eax */
2399 lo = num & 0xffffffff;
2400 memcpy (&buf[i], &lo, sizeof (lo));
2401 i += 4;
2402 hi = ((num >> 32) & 0xffffffff);
2403 if (hi)
2404 {
2405 buf[i++] = 0xbb; /* mov $<n>,%ebx */
2406 memcpy (&buf[i], &hi, sizeof (hi));
2407 i += 4;
2408 }
2409 else
2410 {
2411 buf[i++] = 0x31; buf[i++] = 0xdb; /* xor %ebx,%ebx */
2412 }
2413 append_insns (&buildaddr, i, buf);
2414 current_insn_ptr = buildaddr;
2415 }
2416
2417 static void
2418 i386_emit_call (CORE_ADDR fn)
2419 {
2420 unsigned char buf[16];
2421 int i, offset;
2422 CORE_ADDR buildaddr;
2423
2424 buildaddr = current_insn_ptr;
2425 i = 0;
2426 buf[i++] = 0xe8; /* call <reladdr> */
2427 offset = ((int) fn) - (buildaddr + 5);
2428 memcpy (buf + 1, &offset, 4);
2429 append_insns (&buildaddr, 5, buf);
2430 current_insn_ptr = buildaddr;
2431 }
2432
2433 static void
2434 i386_emit_reg (int reg)
2435 {
2436 unsigned char buf[16];
2437 int i;
2438 CORE_ADDR buildaddr;
2439
2440 EMIT_ASM32 (i386_reg_a,
2441 "sub $0x8,%esp");
2442 buildaddr = current_insn_ptr;
2443 i = 0;
2444 buf[i++] = 0xb8; /* mov $<n>,%eax */
2445 memcpy (&buf[i], &reg, sizeof (reg));
2446 i += 4;
2447 append_insns (&buildaddr, i, buf);
2448 current_insn_ptr = buildaddr;
2449 EMIT_ASM32 (i386_reg_b,
2450 "mov %eax,4(%esp)\n\t"
2451 "mov 8(%ebp),%eax\n\t"
2452 "mov %eax,(%esp)");
2453 i386_emit_call (get_raw_reg_func_addr ());
2454 EMIT_ASM32 (i386_reg_c,
2455 "xor %ebx,%ebx\n\t"
2456 "lea 0x8(%esp),%esp");
2457 }
2458
2459 static void
2460 i386_emit_pop (void)
2461 {
2462 EMIT_ASM32 (i386_pop,
2463 "pop %eax\n\t"
2464 "pop %ebx");
2465 }
2466
2467 static void
2468 i386_emit_stack_flush (void)
2469 {
2470 EMIT_ASM32 (i386_stack_flush,
2471 "push %ebx\n\t"
2472 "push %eax");
2473 }
2474
2475 static void
2476 i386_emit_zero_ext (int arg)
2477 {
2478 switch (arg)
2479 {
2480 case 8:
2481 EMIT_ASM32 (i386_zero_ext_8,
2482 "and $0xff,%eax\n\t"
2483 "xor %ebx,%ebx");
2484 break;
2485 case 16:
2486 EMIT_ASM32 (i386_zero_ext_16,
2487 "and $0xffff,%eax\n\t"
2488 "xor %ebx,%ebx");
2489 break;
2490 case 32:
2491 EMIT_ASM32 (i386_zero_ext_32,
2492 "xor %ebx,%ebx");
2493 break;
2494 default:
2495 emit_error = 1;
2496 }
2497 }
2498
2499 static void
2500 i386_emit_swap (void)
2501 {
2502 EMIT_ASM32 (i386_swap,
2503 "mov %eax,%ecx\n\t"
2504 "mov %ebx,%edx\n\t"
2505 "pop %eax\n\t"
2506 "pop %ebx\n\t"
2507 "push %edx\n\t"
2508 "push %ecx");
2509 }
2510
2511 static void
2512 i386_emit_stack_adjust (int n)
2513 {
2514 unsigned char buf[16];
2515 int i;
2516 CORE_ADDR buildaddr = current_insn_ptr;
2517
2518 i = 0;
2519 buf[i++] = 0x8d; /* lea $<n>(%esp),%esp */
2520 buf[i++] = 0x64;
2521 buf[i++] = 0x24;
2522 buf[i++] = n * 8;
2523 append_insns (&buildaddr, i, buf);
2524 current_insn_ptr = buildaddr;
2525 }
2526
2527 /* FN's prototype is `LONGEST(*fn)(int)'. */
2528
2529 static void
2530 i386_emit_int_call_1 (CORE_ADDR fn, int arg1)
2531 {
2532 unsigned char buf[16];
2533 int i;
2534 CORE_ADDR buildaddr;
2535
2536 EMIT_ASM32 (i386_int_call_1_a,
2537 /* Reserve a bit of stack space. */
2538 "sub $0x8,%esp");
2539 /* Put the one argument on the stack. */
2540 buildaddr = current_insn_ptr;
2541 i = 0;
2542 buf[i++] = 0xc7; /* movl $<arg1>,(%esp) */
2543 buf[i++] = 0x04;
2544 buf[i++] = 0x24;
2545 memcpy (&buf[i], &arg1, sizeof (arg1));
2546 i += 4;
2547 append_insns (&buildaddr, i, buf);
2548 current_insn_ptr = buildaddr;
2549 i386_emit_call (fn);
2550 EMIT_ASM32 (i386_int_call_1_c,
2551 "mov %edx,%ebx\n\t"
2552 "lea 0x8(%esp),%esp");
2553 }
2554
2555 /* FN's prototype is `void(*fn)(int,LONGEST)'. */
2556
2557 static void
2558 i386_emit_void_call_2 (CORE_ADDR fn, int arg1)
2559 {
2560 unsigned char buf[16];
2561 int i;
2562 CORE_ADDR buildaddr;
2563
2564 EMIT_ASM32 (i386_void_call_2_a,
2565 /* Preserve %eax only; we don't have to worry about %ebx. */
2566 "push %eax\n\t"
2567 /* Reserve a bit of stack space for arguments. */
2568 "sub $0x10,%esp\n\t"
2569 /* Copy "top" to the second argument position. (Note that
2570 we can't assume function won't scribble on its
2571 arguments, so don't try to restore from this.) */
2572 "mov %eax,4(%esp)\n\t"
2573 "mov %ebx,8(%esp)");
2574 /* Put the first argument on the stack. */
2575 buildaddr = current_insn_ptr;
2576 i = 0;
2577 buf[i++] = 0xc7; /* movl $<arg1>,(%esp) */
2578 buf[i++] = 0x04;
2579 buf[i++] = 0x24;
2580 memcpy (&buf[i], &arg1, sizeof (arg1));
2581 i += 4;
2582 append_insns (&buildaddr, i, buf);
2583 current_insn_ptr = buildaddr;
2584 i386_emit_call (fn);
2585 EMIT_ASM32 (i386_void_call_2_b,
2586 "lea 0x10(%esp),%esp\n\t"
2587 /* Restore original stack top. */
2588 "pop %eax");
2589 }
2590
2591
2592 void
2593 i386_emit_eq_goto (int *offset_p, int *size_p)
2594 {
2595 EMIT_ASM32 (eq,
2596 /* Check low half first, more likely to be decider */
2597 "cmpl %eax,(%esp)\n\t"
2598 "jne .Leq_fallthru\n\t"
2599 "cmpl %ebx,4(%esp)\n\t"
2600 "jne .Leq_fallthru\n\t"
2601 "lea 0x8(%esp),%esp\n\t"
2602 "pop %eax\n\t"
2603 "pop %ebx\n\t"
2604 /* jmp, but don't trust the assembler to choose the right jump */
2605 ".byte 0xe9, 0x0, 0x0, 0x0, 0x0\n\t"
2606 ".Leq_fallthru:\n\t"
2607 "lea 0x8(%esp),%esp\n\t"
2608 "pop %eax\n\t"
2609 "pop %ebx");
2610
2611 if (offset_p)
2612 *offset_p = 18;
2613 if (size_p)
2614 *size_p = 4;
2615 }
2616
2617 void
2618 i386_emit_ne_goto (int *offset_p, int *size_p)
2619 {
2620 EMIT_ASM32 (ne,
2621 /* Check low half first, more likely to be decider */
2622 "cmpl %eax,(%esp)\n\t"
2623 "jne .Lne_jump\n\t"
2624 "cmpl %ebx,4(%esp)\n\t"
2625 "je .Lne_fallthru\n\t"
2626 ".Lne_jump:\n\t"
2627 "lea 0x8(%esp),%esp\n\t"
2628 "pop %eax\n\t"
2629 "pop %ebx\n\t"
2630 /* jmp, but don't trust the assembler to choose the right jump */
2631 ".byte 0xe9, 0x0, 0x0, 0x0, 0x0\n\t"
2632 ".Lne_fallthru:\n\t"
2633 "lea 0x8(%esp),%esp\n\t"
2634 "pop %eax\n\t"
2635 "pop %ebx");
2636
2637 if (offset_p)
2638 *offset_p = 18;
2639 if (size_p)
2640 *size_p = 4;
2641 }
2642
2643 void
2644 i386_emit_lt_goto (int *offset_p, int *size_p)
2645 {
2646 EMIT_ASM32 (lt,
2647 "cmpl %ebx,4(%esp)\n\t"
2648 "jl .Llt_jump\n\t"
2649 "jne .Llt_fallthru\n\t"
2650 "cmpl %eax,(%esp)\n\t"
2651 "jnl .Llt_fallthru\n\t"
2652 ".Llt_jump:\n\t"
2653 "lea 0x8(%esp),%esp\n\t"
2654 "pop %eax\n\t"
2655 "pop %ebx\n\t"
2656 /* jmp, but don't trust the assembler to choose the right jump */
2657 ".byte 0xe9, 0x0, 0x0, 0x0, 0x0\n\t"
2658 ".Llt_fallthru:\n\t"
2659 "lea 0x8(%esp),%esp\n\t"
2660 "pop %eax\n\t"
2661 "pop %ebx");
2662
2663 if (offset_p)
2664 *offset_p = 20;
2665 if (size_p)
2666 *size_p = 4;
2667 }
2668
2669 void
2670 i386_emit_le_goto (int *offset_p, int *size_p)
2671 {
2672 EMIT_ASM32 (le,
2673 "cmpl %ebx,4(%esp)\n\t"
2674 "jle .Lle_jump\n\t"
2675 "jne .Lle_fallthru\n\t"
2676 "cmpl %eax,(%esp)\n\t"
2677 "jnle .Lle_fallthru\n\t"
2678 ".Lle_jump:\n\t"
2679 "lea 0x8(%esp),%esp\n\t"
2680 "pop %eax\n\t"
2681 "pop %ebx\n\t"
2682 /* jmp, but don't trust the assembler to choose the right jump */
2683 ".byte 0xe9, 0x0, 0x0, 0x0, 0x0\n\t"
2684 ".Lle_fallthru:\n\t"
2685 "lea 0x8(%esp),%esp\n\t"
2686 "pop %eax\n\t"
2687 "pop %ebx");
2688
2689 if (offset_p)
2690 *offset_p = 20;
2691 if (size_p)
2692 *size_p = 4;
2693 }
2694
2695 void
2696 i386_emit_gt_goto (int *offset_p, int *size_p)
2697 {
2698 EMIT_ASM32 (gt,
2699 "cmpl %ebx,4(%esp)\n\t"
2700 "jg .Lgt_jump\n\t"
2701 "jne .Lgt_fallthru\n\t"
2702 "cmpl %eax,(%esp)\n\t"
2703 "jng .Lgt_fallthru\n\t"
2704 ".Lgt_jump:\n\t"
2705 "lea 0x8(%esp),%esp\n\t"
2706 "pop %eax\n\t"
2707 "pop %ebx\n\t"
2708 /* jmp, but don't trust the assembler to choose the right jump */
2709 ".byte 0xe9, 0x0, 0x0, 0x0, 0x0\n\t"
2710 ".Lgt_fallthru:\n\t"
2711 "lea 0x8(%esp),%esp\n\t"
2712 "pop %eax\n\t"
2713 "pop %ebx");
2714
2715 if (offset_p)
2716 *offset_p = 20;
2717 if (size_p)
2718 *size_p = 4;
2719 }
2720
2721 void
2722 i386_emit_ge_goto (int *offset_p, int *size_p)
2723 {
2724 EMIT_ASM32 (ge,
2725 "cmpl %ebx,4(%esp)\n\t"
2726 "jge .Lge_jump\n\t"
2727 "jne .Lge_fallthru\n\t"
2728 "cmpl %eax,(%esp)\n\t"
2729 "jnge .Lge_fallthru\n\t"
2730 ".Lge_jump:\n\t"
2731 "lea 0x8(%esp),%esp\n\t"
2732 "pop %eax\n\t"
2733 "pop %ebx\n\t"
2734 /* jmp, but don't trust the assembler to choose the right jump */
2735 ".byte 0xe9, 0x0, 0x0, 0x0, 0x0\n\t"
2736 ".Lge_fallthru:\n\t"
2737 "lea 0x8(%esp),%esp\n\t"
2738 "pop %eax\n\t"
2739 "pop %ebx");
2740
2741 if (offset_p)
2742 *offset_p = 20;
2743 if (size_p)
2744 *size_p = 4;
2745 }
2746
2747 struct emit_ops i386_emit_ops =
2748 {
2749 i386_emit_prologue,
2750 i386_emit_epilogue,
2751 i386_emit_add,
2752 i386_emit_sub,
2753 i386_emit_mul,
2754 i386_emit_lsh,
2755 i386_emit_rsh_signed,
2756 i386_emit_rsh_unsigned,
2757 i386_emit_ext,
2758 i386_emit_log_not,
2759 i386_emit_bit_and,
2760 i386_emit_bit_or,
2761 i386_emit_bit_xor,
2762 i386_emit_bit_not,
2763 i386_emit_equal,
2764 i386_emit_less_signed,
2765 i386_emit_less_unsigned,
2766 i386_emit_ref,
2767 i386_emit_if_goto,
2768 i386_emit_goto,
2769 i386_write_goto_address,
2770 i386_emit_const,
2771 i386_emit_call,
2772 i386_emit_reg,
2773 i386_emit_pop,
2774 i386_emit_stack_flush,
2775 i386_emit_zero_ext,
2776 i386_emit_swap,
2777 i386_emit_stack_adjust,
2778 i386_emit_int_call_1,
2779 i386_emit_void_call_2,
2780 i386_emit_eq_goto,
2781 i386_emit_ne_goto,
2782 i386_emit_lt_goto,
2783 i386_emit_le_goto,
2784 i386_emit_gt_goto,
2785 i386_emit_ge_goto
2786 };
2787
2788
2789 static struct emit_ops *
2790 x86_emit_ops (void)
2791 {
2792 #ifdef __x86_64__
2793 if (is_64bit_tdesc ())
2794 return &amd64_emit_ops;
2795 else
2796 #endif
2797 return &i386_emit_ops;
2798 }
2799
2800 /* Implementation of linux_target_ops method "sw_breakpoint_from_kind". */
2801
2802 static const gdb_byte *
2803 x86_sw_breakpoint_from_kind (int kind, int *size)
2804 {
2805 *size = x86_breakpoint_len;
2806 return x86_breakpoint;
2807 }
2808
2809 static int
2810 x86_supports_range_stepping (void)
2811 {
2812 return 1;
2813 }
2814
2815 /* Implementation of linux_target_ops method "supports_hardware_single_step".
2816 */
2817
2818 static int
2819 x86_supports_hardware_single_step (void)
2820 {
2821 return 1;
2822 }
2823
2824 static int
2825 x86_get_ipa_tdesc_idx (void)
2826 {
2827 struct regcache *regcache = get_thread_regcache (current_thread, 0);
2828 const struct target_desc *tdesc = regcache->tdesc;
2829
2830 #ifdef __x86_64__
2831 return amd64_get_ipa_tdesc_idx (tdesc);
2832 #endif
2833
2834 if (tdesc == tdesc_i386_linux_no_xml)
2835 return X86_TDESC_SSE;
2836
2837 return i386_get_ipa_tdesc_idx (tdesc);
2838 }
2839
2840 /* This is initialized assuming an amd64 target.
2841 x86_arch_setup will correct it for i386 or amd64 targets. */
2842
2843 struct linux_target_ops the_low_target =
2844 {
2845 x86_arch_setup,
2846 x86_linux_regs_info,
2847 x86_cannot_fetch_register,
2848 x86_cannot_store_register,
2849 NULL, /* fetch_register */
2850 x86_get_pc,
2851 x86_set_pc,
2852 NULL, /* breakpoint_kind_from_pc */
2853 x86_sw_breakpoint_from_kind,
2854 NULL,
2855 1,
2856 x86_breakpoint_at,
2857 x86_supports_z_point_type,
2858 x86_insert_point,
2859 x86_remove_point,
2860 x86_stopped_by_watchpoint,
2861 x86_stopped_data_address,
2862 /* collect_ptrace_register/supply_ptrace_register are not needed in the
2863 native i386 case (no registers smaller than an xfer unit), and are not
2864 used in the biarch case (HAVE_LINUX_USRREGS is not defined). */
2865 NULL,
2866 NULL,
2867 /* need to fix up i386 siginfo if host is amd64 */
2868 x86_siginfo_fixup,
2869 x86_linux_new_process,
2870 x86_linux_delete_process,
2871 x86_linux_new_thread,
2872 x86_linux_delete_thread,
2873 x86_linux_new_fork,
2874 x86_linux_prepare_to_resume,
2875 x86_linux_process_qsupported,
2876 x86_supports_tracepoints,
2877 x86_get_thread_area,
2878 x86_install_fast_tracepoint_jump_pad,
2879 x86_emit_ops,
2880 x86_get_min_fast_tracepoint_insn_len,
2881 x86_supports_range_stepping,
2882 NULL, /* breakpoint_kind_from_current_state */
2883 x86_supports_hardware_single_step,
2884 x86_get_syscall_trapinfo,
2885 x86_get_ipa_tdesc_idx,
2886 };
2887
2888 void
2889 initialize_low_arch (void)
2890 {
2891 /* Initialize the Linux target descriptions. */
2892 #ifdef __x86_64__
2893 tdesc_amd64_linux_no_xml = allocate_target_description ();
2894 copy_target_description (tdesc_amd64_linux_no_xml,
2895 amd64_linux_read_description (X86_XSTATE_SSE_MASK,
2896 false));
2897 tdesc_amd64_linux_no_xml->xmltarget = xmltarget_amd64_linux_no_xml;
2898 #endif
2899
2900 #if GDB_SELF_TEST
2901 initialize_low_tdesc ();
2902 #endif
2903
2904 tdesc_i386_linux_no_xml = allocate_target_description ();
2905 copy_target_description (tdesc_i386_linux_no_xml,
2906 i386_linux_read_description (X86_XSTATE_SSE_MASK));
2907 tdesc_i386_linux_no_xml->xmltarget = xmltarget_i386_linux_no_xml;
2908
2909 initialize_regsets_info (&x86_regsets_info);
2910 }
debug_threads
int debug_threads
Definition: debug.c:24
lwpid_t
unsigned int lwpid_t
Definition: gdb_proc_service.h:63
regcache::tdesc
const struct target_desc * tdesc
Definition: regcache.h:34
i387_xsave_to_cache
void i387_xsave_to_cache(struct regcache *regcache, const void *buf)
Definition: i387-fp.c:666
have_ptrace_getfpxregs
int have_ptrace_getfpxregs
Definition: linux-x86-low.c:725
raw_bkpt_type_to_target_hw_bp_type
enum target_hw_bp_type raw_bkpt_type_to_target_hw_bp_type(enum raw_bkpt_type raw_type)
Definition: mem-break.c:243
x86_linux_dr_get_status
unsigned long x86_linux_dr_get_status(void)
Definition: x86-linux-dregs.c:133
current_thread
struct thread_info * current_thread
Definition: inferiors.c:28
collect_register
void collect_register(struct regcache *regcache, int n, void *buf)
Definition: regcache.c:402
i386_emit_bit_or
static void i386_emit_bit_or(void)
Definition: linux-x86-low.c:2237
i386_emit_reg
static void i386_emit_reg(int reg)
Definition: linux-x86-low.c:2434
xfree
static void xfree(T *ptr)
Definition: common-utils.h:54
x86_stopped_by_watchpoint
static int x86_stopped_by_watchpoint(void)
Definition: linux-x86-low.c:591
i386_emit_ops
struct emit_ops i386_emit_ops
Definition: linux-x86-low.c:2747
x86_store_fpregset
static void x86_store_fpregset(struct regcache *regcache, const void *buf)
Definition: linux-x86-low.c:390
i386_emit_bit_not
static void i386_emit_bit_not(void)
Definition: linux-x86-low.c:2255
i386_write_goto_address
static void i386_write_goto_address(CORE_ADDR from, CORE_ADDR to, int size)
Definition: linux-x86-low.c:2374
x86_fill_fpxregset
static void x86_fill_fpxregset(struct regcache *regcache, void *buf)
Definition: linux-x86-low.c:402
raw_bkpt_type_hw
Definition: mem-break.h:47
x86_regsets_info
static struct regsets_info x86_regsets_info
Definition: linux-x86-low.c:920
x86_siginfo_fixup
static int x86_siginfo_fixup(siginfo_t *ptrace, gdb_byte *inf, int direction)
Definition: linux-x86-low.c:679
X86_XSTATE_SSE_MASK
#define X86_XSTATE_SSE_MASK
Definition: x86-xstate.h:42
CORE_ADDR
bfd_vma CORE_ADDR
Definition: common-types.h:41
supply_register_by_name
void supply_register_by_name(struct regcache *regcache, const char *name, const void *buf)
Definition: regcache.c:393
ARCH_GET_FS
#define ARCH_GET_FS
Definition: linux-x86-low.c:92
i386_emit_rsh_signed
static void i386_emit_rsh_signed(void)
Definition: linux-x86-low.c:2177
i387_fxsave_to_cache
void i387_fxsave_to_cache(struct regcache *regcache, const void *buf)
Definition: i387-fp.c:613
x86_linux_new_fork
static void x86_linux_new_fork(struct process_info *parent, struct process_info *child)
Definition: linux-x86-low.c:631
lwp_info
Definition: linux-low.h:276
push_opcode
static int push_opcode(unsigned char *buf, const char *op)
Definition: linux-x86-low.c:1001
initialize_low_arch
void initialize_low_arch(void)
Definition: linux-x86-low.c:2889
arch_process_info::debug_reg_state
struct aarch64_debug_reg_state debug_reg_state
Definition: linux-aarch64-low.c:62
i386_linux_read_description
const struct target_desc * i386_linux_read_description(uint64_t xcr0)
Definition: linux-x86-tdesc.c:78
i386_emit_stack_flush
static void i386_emit_stack_flush(void)
Definition: linux-x86-low.c:2468
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void warning(const char *fmt,...)
Definition: errors.c:26
lwpid_of
static long lwpid_of(const thread_info *thread)
Definition: gdbthread.h:222
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void regcache_release(void)
Definition: regcache.c:279
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static void x86_fill_xstateregset(struct regcache *regcache, void *buf)
Definition: linux-x86-low.c:416
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struct lwp_info * find_lwp_pid(ptid_t ptid)
Definition: linux-low.c:1812
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int emit_error
Definition: ax.c:143
EMIT_ASM32
#define EMIT_ASM32(NAME, INSNS)
Definition: linux-x86-low.c:1531
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Definition: inferiors.h:34
ps_prochandle
Definition: gdb_proc_service.h:150
i386_emit_ext
static void i386_emit_ext(int arg)
Definition: linux-x86-low.c:2189
Z_PACKET_HW_BP
#define Z_PACKET_HW_BP
Definition: mem-break.h:34
memset
void * memset(T *s, int c, size_t n)=delete
x86_dr_low_type
Definition: x86-dregs.h:39
i386_emit_goto
static void i386_emit_goto(int *offset_p, int *size_p)
Definition: linux-x86-low.c:2362
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static void x86_store_gregset(struct regcache *regcache, const void *buf)
Definition: linux-x86-low.c:345
i387_fsave_to_cache
void i387_fsave_to_cache(struct regcache *regcache, const void *buf)
Definition: i387-fp.c:187
have_ptrace_getregset
int have_ptrace_getregset
Definition: linux-low.c:137
paddress
char * paddress(CORE_ADDR addr)
Definition: utils.c:124
find_any_thread_of_pid
struct thread_info * find_any_thread_of_pid(int pid)
Definition: inferiors.c:83
x86-xstate.h
x86_fill_gregset
static void x86_fill_gregset(struct regcache *regcache, void *buf)
Definition: linux-x86-low.c:305
ps_err_e
ps_err_e
Definition: gdb_proc_service.h:51
is_64bit_tdesc
static int is_64bit_tdesc(void)
Definition: linux-aarch64-low.c:68
x86-linux.h
jump_insn
static unsigned char jump_insn[]
Definition: linux-x86-low.c:56
x86_dr_remove_watchpoint
int x86_dr_remove_watchpoint(struct x86_debug_reg_state *state, enum target_hw_bp_type type, CORE_ADDR addr, int len)
Definition: x86-dregs.c:512
i386_emit_eq_goto
void i386_emit_eq_goto(int *offset_p, int *size_p)
Definition: linux-x86-low.c:2593
_
#define _(String)
Definition: gdb_locale.h:35
target_desc::xmltarget
const char * xmltarget
Definition: tdesc.h:54
x86_dr_stopped_data_address
int x86_dr_stopped_data_address(struct x86_debug_reg_state *state, CORE_ADDR *addr_p)
Definition: x86-dregs.c:567
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Definition: linux-low.h:128
i386_emit_if_goto
static void i386_emit_if_goto(int *offset_p, int *size_p)
Definition: linux-x86-low.c:2344
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static struct regset_info x86_regsets[]
Definition: linux-x86-low.c:434
PTRACE_ARCH_PRCTL
#define PTRACE_ARCH_PRCTL
Definition: linux-x86-low.c:84
small_jump_insn
static unsigned char small_jump_insn[]
Definition: linux-x86-low.c:57
arch_process_info
Definition: linux-aarch64-low.c:50
x86_linux_dr_set_control
void x86_linux_dr_set_control(unsigned long control)
Definition: x86-linux-dregs.c:123
x86_emit_ops
static struct emit_ops * x86_emit_ops(void)
Definition: linux-x86-low.c:2790
the_target
struct target_ops * the_target
Definition: target.c:24
ps_get_thread_area
ps_err_e ps_get_thread_area(struct ps_prochandle *ph, lwpid_t lwpid, int idx, void **base)
Definition: linux-x86-low.c:195
x86_supports_z_point_type
static int x86_supports_z_point_type(char z_type)
Definition: linux-x86-low.c:525
process_info::tdesc
const struct target_desc * tdesc
Definition: inferiors.h:67
regcache
Definition: regcache.h:31
gdb_proc_service.h
ax.h
ptrace
PTRACE_TYPE_RET ptrace()
X86_XSTATE_SIZE
#define X86_XSTATE_SIZE(XCR0)
Definition: x86-xstate.h:69
i386_emit_int_call_1
static void i386_emit_int_call_1(CORE_ADDR fn, int arg1)
Definition: linux-x86-low.c:2530
i386_emit_bit_xor
static void i386_emit_bit_xor(void)
Definition: linux-x86-low.c:2246
FIXUP_32
Definition: amd64-linux-siginfo.h:48
xstrdup
char * xstrdup(const char *s)
Definition: utils.c:44
allocate_target_description
struct target_desc * allocate_target_description(void)
Definition: tdesc.c:41
x86_dr_insert_watchpoint
int x86_dr_insert_watchpoint(struct x86_debug_reg_state *state, enum target_hw_bp_type type, CORE_ADDR addr, int len)
Definition: x86-dregs.c:470
process_info_private::arch_private
struct arch_process_info * arch_private
Definition: linux-low.h:116
i386_emit_call
static void i386_emit_call(CORE_ADDR fn)
Definition: linux-x86-low.c:2418
x86_debug_reg_state
struct x86_debug_reg_state * x86_debug_reg_state(pid_t pid)
Definition: linux-x86-low.c:659
thread_info
Definition: gdbthread.h:30
i386_emit_lsh
static void i386_emit_lsh(void)
Definition: linux-x86-low.c:2171
x86_linux_new_thread
void x86_linux_new_thread(struct lwp_info *lwp)
Definition: x86-linux.c:63
amd64-linux-siginfo.h
raw_breakpoint
Definition: mem-break.c:85
raw_bkpt_type_access_wp
Definition: mem-break.h:56
x86_cannot_fetch_register
static int x86_cannot_fetch_register(int regno)
Definition: linux-x86-low.c:294
linux-low.h
Z_PACKET_SW_BP
#define Z_PACKET_SW_BP
Definition: mem-break.h:33
amd64_linux_siginfo_fixup_common
int amd64_linux_siginfo_fixup_common(siginfo_t *ptrace, gdb_byte *inf, int direction, enum amd64_siginfo_fixup_mode mode)
Definition: amd64-linux-siginfo.c:561
i386_emit_add
static void i386_emit_add(void)
Definition: linux-x86-low.c:2146
collect_register_by_name
void collect_register_by_name(struct regcache *regcache, const char *name, void *buf)
Definition: regcache.c:441
linux-x86-tdesc.h
raw_bkpt_type
raw_bkpt_type
Definition: mem-break.h:41
i386_emit_ref
static void i386_emit_ref(int size)
Definition: linux-x86-low.c:2319
current_insn_ptr
CORE_ADDR current_insn_ptr
Definition: ax.c:141
copy_target_description
void copy_target_description(struct target_desc *dest, const struct target_desc *src)
Definition: tdesc.c:51
x86_get_pc
static CORE_ADDR x86_get_pc(struct regcache *regcache)
Definition: linux-x86-low.c:457
x86_linux_regs_info
const struct regs_info * x86_linux_regs_info(void)
Definition: linux-x86-low.c:949
find_process_pid
process_info * find_process_pid(int pid)
Definition: inferiors.c:164
i386_install_fast_tracepoint_jump_pad
static int i386_install_fast_tracepoint_jump_pad(CORE_ADDR tpoint, CORE_ADDR tpaddr, CORE_ADDR collector, CORE_ADDR lockaddr, ULONGEST orig_size, CORE_ADDR *jump_entry, CORE_ADDR *trampoline, ULONGEST *trampoline_size, unsigned char *jjump_pad_insn, ULONGEST *jjump_pad_insn_size, CORE_ADDR *adjusted_insn_addr, CORE_ADDR *adjusted_insn_addr_end, char *err)
Definition: linux-x86-low.c:1217
i386_emit_swap
static void i386_emit_swap(void)
Definition: linux-x86-low.c:2500
regs_info
Definition: linux-low.h:94
X86_XSTATE_SSE_SIZE
#define X86_XSTATE_SSE_SIZE
Definition: x86-xstate.h:53
offset
int offset
Definition: tracepoint.c:181
x86_set_pc
static void x86_set_pc(struct regcache *regcache, CORE_ADDR pc)
Definition: linux-x86-low.c:478
gdb_assert_not_reached
#define gdb_assert_not_reached(message)
Definition: gdb_assert.h:55
IPA_BUFSIZ
#define IPA_BUFSIZ
Definition: tracepoint.h:24
signal.h
pid_to_ptid
ptid_t pid_to_ptid(int pid)
Definition: ptid.c:39
x86_store_xstateregset
static void x86_store_xstateregset(struct regcache *regcache, const void *buf)
Definition: linux-x86-low.c:422
X86_XSTATE_SSE
#define X86_XSTATE_SSE
Definition: x86-xstate.h:25
append_insns
static void append_insns(CORE_ADDR *to, size_t len, const unsigned char *buf)
Definition: linux-x86-low.c:994
raw_bkpt_type_write_wp
Definition: mem-break.h:50
agent_loaded_p
int agent_loaded_p(void)
Definition: agent.c:77
get_lwp_thread
#define get_lwp_thread(lwp)
Definition: linux-low.h:264
register_size
int register_size(const struct target_desc *tdesc, int n)
Definition: regcache.c:293
tracepoint.h
free
void free(T *ptr)=delete
FIXUP_X32
Definition: amd64-linux-siginfo.h:49
server.h
initialize_low_tdesc
void initialize_low_tdesc()
Definition: linux-aarch64-tdesc-selftest.c:39
x86_get_ipa_tdesc_idx
static int x86_get_ipa_tdesc_idx(void)
Definition: linux-x86-low.c:2825
the_low_target
struct linux_target_ops the_low_target
Definition: linux-x86-low.c:2843
startswith
static int startswith(const char *string, const char *pattern)
Definition: common-utils.h:107
x86_cannot_store_register
static int x86_cannot_store_register(int regno)
Definition: linux-x86-low.c:283
PTRACE_SETREGSET
#define PTRACE_SETREGSET
Definition: linux-ptrace.h:51
i386_emit_lt_goto
void i386_emit_lt_goto(int *offset_p, int *size_p)
Definition: linux-x86-low.c:2644
i386_emit_mul
static void i386_emit_mul(void)
Definition: linux-x86-low.c:2165
x86_store_fpxregset
static void x86_store_fpxregset(struct regcache *regcache, const void *buf)
Definition: linux-x86-low.c:408
use_xml
static int use_xml
Definition: linux-x86-low.c:699
x86_linux_dr_set_addr
void x86_linux_dr_set_addr(int regnum, CORE_ADDR addr)
Definition: x86-linux-dregs.c:103
current_process
struct process_info * current_process(void)
Definition: inferiors.c:210
x86_breakpoint_len
#define x86_breakpoint_len
Definition: linux-x86-low.c:497
i386_emit_ge_goto
void i386_emit_ge_goto(int *offset_p, int *size_p)
Definition: linux-x86-low.c:2722
process_info::priv
struct process_info_private * priv
Definition: inferiors.h:70
usrregs_info
Definition: linux-low.h:83
x86_dr_stopped_by_watchpoint
int x86_dr_stopped_by_watchpoint(struct x86_debug_reg_state *state)
Definition: x86-dregs.c:647
x86_fill_fpregset
static void x86_fill_fpregset(struct regcache *regcache, void *buf)
Definition: linux-x86-low.c:380
PS_ERR
Definition: gdb_proc_service.h:54
x86_arch_setup
static void x86_arch_setup(void)
Definition: linux-x86-low.c:963
ARCH_SET_GS
#define ARCH_SET_GS
Definition: linux-x86-low.c:90
x86_get_min_fast_tracepoint_insn_len
static int x86_get_min_fast_tracepoint_insn_len(void)
Definition: linux-x86-low.c:1441
i386_emit_const
static void i386_emit_const(LONGEST num)
Definition: linux-x86-low.c:2391
have_fast_tracepoint_trampoline_buffer
int have_fast_tracepoint_trampoline_buffer(char *buf)
Definition: tracepoint.c:2995
x86_xcr0
unsigned long long x86_xcr0
Definition: i387-fp.c:883
PTRACE_GETREGSET
#define PTRACE_GETREGSET
Definition: linux-ptrace.h:47
i386_emit_ne_goto
void i386_emit_ne_goto(int *offset_p, int *size_p)
Definition: linux-x86-low.c:2618
gdb_assert
#define gdb_assert(expr)
Definition: gdb_assert.h:32
linux_pid_exe_is_elf_64_file
int linux_pid_exe_is_elf_64_file(int pid, unsigned int *machine)
Definition: linux-low.c:400
write_inferior_memory
int write_inferior_memory(CORE_ADDR memaddr, const unsigned char *myaddr, int len)
Definition: target.c:145
i387_cache_to_xsave
void i387_cache_to_xsave(struct regcache *regcache, void *buf)
Definition: i387-fp.c:276
i386_emit_pop
static void i386_emit_pop(void)
Definition: linux-x86-low.c:2460
ARCH_SET_FS
#define ARCH_SET_FS
Definition: linux-x86-low.c:91
inttypes.h
i386_linux_usrregs_info
static struct usrregs_info i386_linux_usrregs_info
Definition: linux-x86-low.c:935
x86_linux_dr_get_addr
CORE_ADDR x86_linux_dr_get_addr(int regnum)
Definition: x86-linux-dregs.c:93
emit_ops
Definition: ax.h:91
x86_install_fast_tracepoint_jump_pad
static int x86_install_fast_tracepoint_jump_pad(CORE_ADDR tpoint, CORE_ADDR tpaddr, CORE_ADDR collector, CORE_ADDR lockaddr, ULONGEST orig_size, CORE_ADDR *jump_entry, CORE_ADDR *trampoline, ULONGEST *trampoline_size, unsigned char *jjump_pad_insn, ULONGEST *jjump_pad_insn_size, CORE_ADDR *adjusted_insn_addr, CORE_ADDR *adjusted_insn_addr_end, char *err)
Definition: linux-x86-low.c:1400
x86_low_init_dregs
void x86_low_init_dregs(struct x86_debug_reg_state *state)
Definition: x86-low.c:27
x86_breakpoint
static const gdb_byte x86_breakpoint[]
Definition: linux-x86-low.c:496
x86_supports_tracepoints
static int x86_supports_tracepoints(void)
Definition: linux-x86-low.c:988
gdb_byte
bfd_byte gdb_byte
Definition: common-types.h:38
i386_emit_zero_ext
static void i386_emit_zero_ext(int arg)
Definition: linux-x86-low.c:2476
for_each_process
static void for_each_process(Func func)
Definition: inferiors.h:94
i387_cache_to_fsave
void i387_cache_to_fsave(struct regcache *regcache, void *buf)
Definition: i387-fp.c:147
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int pid
Definition: inferiors.h:41
i386_emit_rsh_unsigned
static void i386_emit_rsh_unsigned(void)
Definition: linux-x86-low.c:2183
claim_trampoline_space
int claim_trampoline_space(ULONGEST used, CORE_ADDR *trampoline)
Definition: tracepoint.c:2952
I386_NUM_REGS
#define I386_NUM_REGS
Definition: linux-x86-low.c:170
X86_TDESC_SSE
Definition: linux-x86-tdesc.h:27
x86-linux-dregs.h
x86_stopped_data_address
static CORE_ADDR x86_stopped_data_address(void)
Definition: linux-x86-low.c:598
x86_linux_delete_thread
void x86_linux_delete_thread(struct arch_lwp_info *arch_lwp)
Definition: x86-linux.c:71
x86_linux_read_description
static const struct target_desc * x86_linux_read_description(void)
Definition: linux-x86-low.c:736
i387_cache_to_fxsave
void i387_cache_to_fxsave(struct regcache *regcache, void *buf)
Definition: i387-fp.c:223
x86_linux_new_process
static struct arch_process_info * x86_linux_new_process(void)
Definition: linux-x86-low.c:611
XCNEW
#define XCNEW(T)
Definition: poison.h:121
i386_emit_less_signed
static void i386_emit_less_signed(void)
Definition: linux-x86-low.c:2281
REGSIZE
#define REGSIZE
Definition: linux-x86-low.c:172
target_desc
Definition: tdesc.h:33
get_raw_reg_func_addr
CORE_ADDR get_raw_reg_func_addr(void)
Definition: tracepoint.c:5883
i386_emit_gt_goto
void i386_emit_gt_goto(int *offset_p, int *size_p)
Definition: linux-x86-low.c:2696
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static void i386_emit_less_unsigned(void)
Definition: linux-x86-low.c:2300
x86_dr_low
struct x86_dr_low_type x86_dr_low
Definition: linux-x86-low.c:512
target_ops::read_memory
int(* read_memory)(CORE_ADDR memaddr, unsigned char *myaddr, int len)
Definition: target.h:166
i386_emit_epilogue
static void i386_emit_epilogue(void)
Definition: linux-x86-low.c:2133
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get_thread_regcache
struct regcache * get_thread_regcache(struct thread_info *thread, int fetch)
Definition: regcache.c:27
agent.h
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static int i386_regmap[]
Definition: linux-x86-low.c:162
Z_PACKET_ACCESS_WP
#define Z_PACKET_ACCESS_WP
Definition: mem-break.h:37
x86_remove_point
static int x86_remove_point(enum raw_bkpt_type type, CORE_ADDR addr, int size, struct raw_breakpoint *bp)
Definition: linux-x86-low.c:566
x86-low.h
x86_linux_dr_get_control
unsigned long x86_linux_dr_get_control(void)
Definition: x86-linux-dregs.c:115
target_hw_bp_type
target_hw_bp_type
Definition: break-common.h:22
tdesc_i386_linux_no_xml
static struct target_desc * tdesc_i386_linux_no_xml
Definition: linux-x86-low.c:53
i386_emit_log_not
static void i386_emit_log_not(void)
Definition: linux-x86-low.c:2217
i386_get_ipa_tdesc_idx
int i386_get_ipa_tdesc_idx(const struct target_desc *tdesc)
Definition: linux-x86-tdesc.c:142
PTRACE_GET_THREAD_AREA
#define PTRACE_GET_THREAD_AREA
Definition: linux-x86-low.c:79
X86_XSTATE_X87
#define X86_XSTATE_X87
Definition: x86-xstate.h:24
x86_supports_range_stepping
static int x86_supports_range_stepping(void)
Definition: linux-x86-low.c:2810
ARCH_GET_GS
#define ARCH_GET_GS
Definition: linux-x86-low.c:93
ULONGEST
unsigned long long ULONGEST
Definition: common-types.h:53
i386_emit_stack_adjust
static void i386_emit_stack_adjust(int n)
Definition: linux-x86-low.c:2512
i386_emit_equal
static void i386_emit_equal(void)
Definition: linux-x86-low.c:2263
x86_debug_reg_state
Definition: x86-dregs.h:77
PS_OK
Definition: gdb_proc_service.h:53
x86_linux_update_xmltarget
static void x86_linux_update_xmltarget(void)
Definition: linux-x86-low.c:861
i386_linux_regs_info
static struct regs_info i386_linux_regs_info
Definition: linux-x86-low.c:941
i386_emit_le_goto
void i386_emit_le_goto(int *offset_p, int *size_p)
Definition: linux-x86-low.c:2670
gdb_ptrace.h
i386_emit_bit_and
static void i386_emit_bit_and(void)
Definition: linux-x86-low.c:2228
linux_target_ops::arch_setup
void(* arch_setup)(void)
Definition: linux-low.h:131
debug_printf
void debug_printf(const char *fmt,...)
Definition: common-debug.c:30
x86_get_syscall_trapinfo
static void x86_get_syscall_trapinfo(struct regcache *regcache, int *sysno)
Definition: linux-x86-low.c:972
EMIT_ASM
#define EMIT_ASM(NAME, INSNS)
Definition: linux-x86-low.c:1503
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static int x86_supports_hardware_single_step(void)
Definition: linux-x86-low.c:2819
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static void x86_linux_process_qsupported(char **features, int count)
Definition: linux-x86-low.c:886
I386_LINUX_XSAVE_XCR0_OFFSET
#define I386_LINUX_XSAVE_XCR0_OFFSET
Definition: linux-x86-low.c:720
i386_emit_void_call_2
static void i386_emit_void_call_2(CORE_ADDR fn, int arg1)
Definition: linux-x86-low.c:2558
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void supply_register(struct regcache *regcache, int n, const void *buf)
Definition: regcache.c:318
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static void add_insns(unsigned char *start, int len)
Definition: linux-x86-low.c:1485
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static const char * xmltarget_i386_linux_no_xml
Definition: linux-x86-low.c:61
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static int x86_get_thread_area(int lwpid, CORE_ADDR *addr)
Definition: linux-x86-low.c:239
PS_BADADDR
Definition: gdb_proc_service.h:57
error
void error(const char *fmt,...)
Definition: errors.c:38
x86_linux_prepare_to_resume
void x86_linux_prepare_to_resume(struct lwp_info *lwp)
Definition: x86-linux.c:79
x86_breakpoint_at
static int x86_breakpoint_at(CORE_ADDR pc)
Definition: linux-x86-low.c:500
LONGEST
long long LONGEST
Definition: common-types.h:52
i386_emit_sub
static void i386_emit_sub(void)
Definition: linux-x86-low.c:2155
x86_sw_breakpoint_from_kind
static const gdb_byte * x86_sw_breakpoint_from_kind(int kind, int *size)
Definition: linux-x86-low.c:2803
relocate_instruction
int relocate_instruction(CORE_ADDR *to, CORE_ADDR oldloc)
Definition: remote-utils.c:1549
tdesc.h
Z_PACKET_WRITE_WP
#define Z_PACKET_WRITE_WP
Definition: mem-break.h:35
x86_insert_point
static int x86_insert_point(enum raw_bkpt_type type, CORE_ADDR addr, int size, struct raw_breakpoint *bp)
Definition: linux-x86-low.c:540
i387-fp.h
x86_linux_delete_process
static void x86_linux_delete_process(struct arch_process_info *info)
Definition: linux-x86-low.c:623
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static void i386_emit_prologue(void)
Definition: linux-x86-low.c:2122
X86_XSTATE_ALL_MASK
#define X86_XSTATE_ALL_MASK
Definition: x86-xstate.h:50