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/tmp/gdb-8.1/gdb/m32c-tdep.c
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1 /* Renesas M32C target-dependent code for GDB, the GNU debugger.
2
3 Copyright (C) 2004-2018 Free Software Foundation, Inc.
4
5 This file is part of GDB.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
19
20 #include "defs.h"
21 #include "elf-bfd.h"
22 #include "elf/m32c.h"
23 #include "gdb/sim-m32c.h"
24 #include "dis-asm.h"
25 #include "gdbtypes.h"
26 #include "regcache.h"
27 #include "arch-utils.h"
28 #include "frame.h"
29 #include "frame-unwind.h"
30 #include "dwarf2-frame.h"
31 #include "dwarf2expr.h"
32 #include "symtab.h"
33 #include "gdbcore.h"
34 #include "value.h"
35 #include "reggroups.h"
36 #include "prologue-value.h"
37 #include "target.h"
38 #include "objfiles.h"
39
40
41 /* The m32c tdep structure. */
42
43 static struct reggroup *m32c_dma_reggroup;
44
45 struct m32c_reg;
46
47 /* The type of a function that moves the value of REG between CACHE or
48 BUF --- in either direction. */
49 typedef enum register_status (m32c_write_reg_t) (struct m32c_reg *reg,
50 struct regcache *cache,
51 const gdb_byte *buf);
52
53 typedef enum register_status (m32c_read_reg_t) (struct m32c_reg *reg,
54 struct regcache *cache,
55 gdb_byte *buf);
56
57 struct m32c_reg
58 {
59 /* The name of this register. */
60 const char *name;
61
62 /* Its type. */
63 struct type *type;
64
65 /* The architecture this register belongs to. */
66 struct gdbarch *arch;
67
68 /* Its GDB register number. */
69 int num;
70
71 /* Its sim register number. */
72 int sim_num;
73
74 /* Its DWARF register number, or -1 if it doesn't have one. */
75 int dwarf_num;
76
77 /* Register group memberships. */
78 unsigned int general_p : 1;
79 unsigned int dma_p : 1;
80 unsigned int system_p : 1;
81 unsigned int save_restore_p : 1;
82
83 /* Functions to read its value from a regcache, and write its value
84 to a regcache. */
85 m32c_read_reg_t *read;
86 m32c_write_reg_t *write;
87
88 /* Data for READ and WRITE functions. The exact meaning depends on
89 the specific functions selected; see the comments for those
90 functions. */
91 struct m32c_reg *rx, *ry;
92 int n;
93 };
94
95
96 /* An overestimate of the number of raw and pseudoregisters we will
97 have. The exact answer depends on the variant of the architecture
98 at hand, but we can use this to declare statically allocated
99 arrays, and bump it up when needed. */
100 #define M32C_MAX_NUM_REGS (75)
101
102 /* The largest assigned DWARF register number. */
103 #define M32C_MAX_DWARF_REGNUM (40)
104
105
106 struct gdbarch_tdep
107 {
108 /* All the registers for this variant, indexed by GDB register
109 number, and the number of registers present. */
110 struct m32c_reg regs[M32C_MAX_NUM_REGS];
111
112 /* The number of valid registers. */
113 int num_regs;
114
115 /* Interesting registers. These are pointers into REGS. */
116 struct m32c_reg *pc, *flg;
117 struct m32c_reg *r0, *r1, *r2, *r3, *a0, *a1;
118 struct m32c_reg *r2r0, *r3r2r1r0, *r3r1r2r0;
119 struct m32c_reg *sb, *fb, *sp;
120
121 /* A table indexed by DWARF register numbers, pointing into
122 REGS. */
123 struct m32c_reg *dwarf_regs[M32C_MAX_DWARF_REGNUM + 1];
124
125 /* Types for this architecture. We can't use the builtin_type_foo
126 types, because they're not initialized when building a gdbarch
127 structure. */
128 struct type *voyd, *ptr_voyd, *func_voyd;
129 struct type *uint8, *uint16;
130 struct type *int8, *int16, *int32, *int64;
131
132 /* The types for data address and code address registers. */
133 struct type *data_addr_reg_type, *code_addr_reg_type;
134
135 /* The number of bytes a return address pushed by a 'jsr' instruction
136 occupies on the stack. */
137 int ret_addr_bytes;
138
139 /* The number of bytes an address register occupies on the stack
140 when saved by an 'enter' or 'pushm' instruction. */
141 int push_addr_bytes;
142 };
143
144
145 /* Types. */
146
147 static void
148 make_types (struct gdbarch *arch)
149 {
150 struct gdbarch_tdep *tdep = gdbarch_tdep (arch);
151 unsigned long mach = gdbarch_bfd_arch_info (arch)->mach;
152 int data_addr_reg_bits, code_addr_reg_bits;
153 char type_name[50];
154
155 #if 0
156 /* This is used to clip CORE_ADDR values, so this value is
157 appropriate both on the m32c, where pointers are 32 bits long,
158 and on the m16c, where pointers are sixteen bits long, but there
159 may be code above the 64k boundary. */
160 set_gdbarch_addr_bit (arch, 24);
161 #else
162 /* GCC uses 32 bits for addrs in the dwarf info, even though
163 only 16/24 bits are used. Setting addr_bit to 24 causes
164 errors in reading the dwarf addresses. */
165 set_gdbarch_addr_bit (arch, 32);
166 #endif
167
168 set_gdbarch_int_bit (arch, 16);
169 switch (mach)
170 {
171 case bfd_mach_m16c:
172 data_addr_reg_bits = 16;
173 code_addr_reg_bits = 24;
174 set_gdbarch_ptr_bit (arch, 16);
175 tdep->ret_addr_bytes = 3;
176 tdep->push_addr_bytes = 2;
177 break;
178
179 case bfd_mach_m32c:
180 data_addr_reg_bits = 24;
181 code_addr_reg_bits = 24;
182 set_gdbarch_ptr_bit (arch, 32);
183 tdep->ret_addr_bytes = 4;
184 tdep->push_addr_bytes = 4;
185 break;
186
187 default:
188 gdb_assert_not_reached ("unexpected mach");
189 }
190
191 /* The builtin_type_mumble variables are sometimes uninitialized when
192 this is called, so we avoid using them. */
193 tdep->voyd = arch_type (arch, TYPE_CODE_VOID, TARGET_CHAR_BIT, "void");
194 tdep->ptr_voyd
195 = arch_pointer_type (arch, gdbarch_ptr_bit (arch), NULL, tdep->voyd);
196 tdep->func_voyd = lookup_function_type (tdep->voyd);
197
198 xsnprintf (type_name, sizeof (type_name), "%s_data_addr_t",
199 gdbarch_bfd_arch_info (arch)->printable_name);
200 tdep->data_addr_reg_type
201 = arch_pointer_type (arch, data_addr_reg_bits, type_name, tdep->voyd);
202
203 xsnprintf (type_name, sizeof (type_name), "%s_code_addr_t",
204 gdbarch_bfd_arch_info (arch)->printable_name);
205 tdep->code_addr_reg_type
206 = arch_pointer_type (arch, code_addr_reg_bits, type_name, tdep->func_voyd);
207
208 tdep->uint8 = arch_integer_type (arch, 8, 1, "uint8_t");
209 tdep->uint16 = arch_integer_type (arch, 16, 1, "uint16_t");
210 tdep->int8 = arch_integer_type (arch, 8, 0, "int8_t");
211 tdep->int16 = arch_integer_type (arch, 16, 0, "int16_t");
212 tdep->int32 = arch_integer_type (arch, 32, 0, "int32_t");
213 tdep->int64 = arch_integer_type (arch, 64, 0, "int64_t");
214 }
215
216
217
218 /* Register set. */
219
220 static const char *
221 m32c_register_name (struct gdbarch *gdbarch, int num)
222 {
223 return gdbarch_tdep (gdbarch)->regs[num].name;
224 }
225
226
227 static struct type *
228 m32c_register_type (struct gdbarch *arch, int reg_nr)
229 {
230 return gdbarch_tdep (arch)->regs[reg_nr].type;
231 }
232
233
234 static int
235 m32c_register_sim_regno (struct gdbarch *gdbarch, int reg_nr)
236 {
237 return gdbarch_tdep (gdbarch)->regs[reg_nr].sim_num;
238 }
239
240
241 static int
242 m32c_debug_info_reg_to_regnum (struct gdbarch *gdbarch, int reg_nr)
243 {
244 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
245 if (0 <= reg_nr && reg_nr <= M32C_MAX_DWARF_REGNUM
246 && tdep->dwarf_regs[reg_nr])
247 return tdep->dwarf_regs[reg_nr]->num;
248 else
249 /* The DWARF CFI code expects to see -1 for invalid register
250 numbers. */
251 return -1;
252 }
253
254
255 static int
256 m32c_register_reggroup_p (struct gdbarch *gdbarch, int regnum,
257 struct reggroup *group)
258 {
259 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
260 struct m32c_reg *reg = &tdep->regs[regnum];
261
262 /* The anonymous raw registers aren't in any groups. */
263 if (! reg->name)
264 return 0;
265
266 if (group == all_reggroup)
267 return 1;
268
269 if (group == general_reggroup
270 && reg->general_p)
271 return 1;
272
273 if (group == m32c_dma_reggroup
274 && reg->dma_p)
275 return 1;
276
277 if (group == system_reggroup
278 && reg->system_p)
279 return 1;
280
281 /* Since the m32c DWARF register numbers refer to cooked registers, not
282 raw registers, and frame_pop depends on the save and restore groups
283 containing registers the DWARF CFI will actually mention, our save
284 and restore groups are cooked registers, not raw registers. (This is
285 why we can't use the default reggroup function.) */
286 if ((group == save_reggroup
287 || group == restore_reggroup)
288 && reg->save_restore_p)
289 return 1;
290
291 return 0;
292 }
293
294
295 /* Register move functions. We declare them here using
296 m32c_{read,write}_reg_t to check the types. */
297 static m32c_read_reg_t m32c_raw_read;
298 static m32c_read_reg_t m32c_banked_read;
299 static m32c_read_reg_t m32c_sb_read;
300 static m32c_read_reg_t m32c_part_read;
301 static m32c_read_reg_t m32c_cat_read;
302 static m32c_read_reg_t m32c_r3r2r1r0_read;
303
304 static m32c_write_reg_t m32c_raw_write;
305 static m32c_write_reg_t m32c_banked_write;
306 static m32c_write_reg_t m32c_sb_write;
307 static m32c_write_reg_t m32c_part_write;
308 static m32c_write_reg_t m32c_cat_write;
309 static m32c_write_reg_t m32c_r3r2r1r0_write;
310
311 /* Copy the value of the raw register REG from CACHE to BUF. */
312 static enum register_status
313 m32c_raw_read (struct m32c_reg *reg, struct regcache *cache, gdb_byte *buf)
314 {
315 return regcache_raw_read (cache, reg->num, buf);
316 }
317
318
319 /* Copy the value of the raw register REG from BUF to CACHE. */
320 static enum register_status
321 m32c_raw_write (struct m32c_reg *reg, struct regcache *cache,
322 const gdb_byte *buf)
323 {
324 regcache_raw_write (cache, reg->num, buf);
325
326 return REG_VALID;
327 }
328
329
330 /* Return the value of the 'flg' register in CACHE. */
331 static int
332 m32c_read_flg (struct regcache *cache)
333 {
334 struct gdbarch_tdep *tdep = gdbarch_tdep (cache->arch ());
335 ULONGEST flg;
336 regcache_raw_read_unsigned (cache, tdep->flg->num, &flg);
337 return flg & 0xffff;
338 }
339
340
341 /* Evaluate the real register number of a banked register. */
342 static struct m32c_reg *
343 m32c_banked_register (struct m32c_reg *reg, struct regcache *cache)
344 {
345 return ((m32c_read_flg (cache) & reg->n) ? reg->ry : reg->rx);
346 }
347
348
349 /* Move the value of a banked register from CACHE to BUF.
350 If the value of the 'flg' register in CACHE has any of the bits
351 masked in REG->n set, then read REG->ry. Otherwise, read
352 REG->rx. */
353 static enum register_status
354 m32c_banked_read (struct m32c_reg *reg, struct regcache *cache, gdb_byte *buf)
355 {
356 struct m32c_reg *bank_reg = m32c_banked_register (reg, cache);
357 return regcache_raw_read (cache, bank_reg->num, buf);
358 }
359
360
361 /* Move the value of a banked register from BUF to CACHE.
362 If the value of the 'flg' register in CACHE has any of the bits
363 masked in REG->n set, then write REG->ry. Otherwise, write
364 REG->rx. */
365 static enum register_status
366 m32c_banked_write (struct m32c_reg *reg, struct regcache *cache,
367 const gdb_byte *buf)
368 {
369 struct m32c_reg *bank_reg = m32c_banked_register (reg, cache);
370 regcache_raw_write (cache, bank_reg->num, buf);
371
372 return REG_VALID;
373 }
374
375
376 /* Move the value of SB from CACHE to BUF. On bfd_mach_m32c, SB is a
377 banked register; on bfd_mach_m16c, it's not. */
378 static enum register_status
379 m32c_sb_read (struct m32c_reg *reg, struct regcache *cache, gdb_byte *buf)
380 {
381 if (gdbarch_bfd_arch_info (reg->arch)->mach == bfd_mach_m16c)
382 return m32c_raw_read (reg->rx, cache, buf);
383 else
384 return m32c_banked_read (reg, cache, buf);
385 }
386
387
388 /* Move the value of SB from BUF to CACHE. On bfd_mach_m32c, SB is a
389 banked register; on bfd_mach_m16c, it's not. */
390 static enum register_status
391 m32c_sb_write (struct m32c_reg *reg, struct regcache *cache, const gdb_byte *buf)
392 {
393 if (gdbarch_bfd_arch_info (reg->arch)->mach == bfd_mach_m16c)
394 m32c_raw_write (reg->rx, cache, buf);
395 else
396 m32c_banked_write (reg, cache, buf);
397
398 return REG_VALID;
399 }
400
401
402 /* Assuming REG uses m32c_part_read and m32c_part_write, set *OFFSET_P
403 and *LEN_P to the offset and length, in bytes, of the part REG
404 occupies in its underlying register. The offset is from the
405 lower-addressed end, regardless of the architecture's endianness.
406 (The M32C family is always little-endian, but let's keep those
407 assumptions out of here.) */
408 static void
409 m32c_find_part (struct m32c_reg *reg, int *offset_p, int *len_p)
410 {
411 /* The length of the containing register, of which REG is one part. */
412 int containing_len = TYPE_LENGTH (reg->rx->type);
413
414 /* The length of one "element" in our imaginary array. */
415 int elt_len = TYPE_LENGTH (reg->type);
416
417 /* The offset of REG's "element" from the least significant end of
418 the containing register. */
419 int elt_offset = reg->n * elt_len;
420
421 /* If we extend off the end, trim the length of the element. */
422 if (elt_offset + elt_len > containing_len)
423 {
424 elt_len = containing_len - elt_offset;
425 /* We shouldn't be declaring partial registers that go off the
426 end of their containing registers. */
427 gdb_assert (elt_len > 0);
428 }
429
430 /* Flip the offset around if we're big-endian. */
431 if (gdbarch_byte_order (reg->arch) == BFD_ENDIAN_BIG)
432 elt_offset = TYPE_LENGTH (reg->rx->type) - elt_offset - elt_len;
433
434 *offset_p = elt_offset;
435 *len_p = elt_len;
436 }
437
438
439 /* Move the value of a partial register (r0h, intbl, etc.) from CACHE
440 to BUF. Treating the value of the register REG->rx as an array of
441 REG->type values, where higher indices refer to more significant
442 bits, read the value of the REG->n'th element. */
443 static enum register_status
444 m32c_part_read (struct m32c_reg *reg, struct regcache *cache, gdb_byte *buf)
445 {
446 int offset, len;
447
448 memset (buf, 0, TYPE_LENGTH (reg->type));
449 m32c_find_part (reg, &offset, &len);
450 return regcache_cooked_read_part (cache, reg->rx->num, offset, len, buf);
451 }
452
453
454 /* Move the value of a banked register from BUF to CACHE.
455 Treating the value of the register REG->rx as an array of REG->type
456 values, where higher indices refer to more significant bits, write
457 the value of the REG->n'th element. */
458 static enum register_status
459 m32c_part_write (struct m32c_reg *reg, struct regcache *cache,
460 const gdb_byte *buf)
461 {
462 int offset, len;
463
464 m32c_find_part (reg, &offset, &len);
465 regcache_cooked_write_part (cache, reg->rx->num, offset, len, buf);
466
467 return REG_VALID;
468 }
469
470
471 /* Move the value of REG from CACHE to BUF. REG's value is the
472 concatenation of the values of the registers REG->rx and REG->ry,
473 with REG->rx contributing the more significant bits. */
474 static enum register_status
475 m32c_cat_read (struct m32c_reg *reg, struct regcache *cache, gdb_byte *buf)
476 {
477 int high_bytes = TYPE_LENGTH (reg->rx->type);
478 int low_bytes = TYPE_LENGTH (reg->ry->type);
479 enum register_status status;
480
481 gdb_assert (TYPE_LENGTH (reg->type) == high_bytes + low_bytes);
482
483 if (gdbarch_byte_order (reg->arch) == BFD_ENDIAN_BIG)
484 {
485 status = regcache_cooked_read (cache, reg->rx->num, buf);
486 if (status == REG_VALID)
487 status = regcache_cooked_read (cache, reg->ry->num, buf + high_bytes);
488 }
489 else
490 {
491 status = regcache_cooked_read (cache, reg->rx->num, buf + low_bytes);
492 if (status == REG_VALID)
493 status = regcache_cooked_read (cache, reg->ry->num, buf);
494 }
495
496 return status;
497 }
498
499
500 /* Move the value of REG from CACHE to BUF. REG's value is the
501 concatenation of the values of the registers REG->rx and REG->ry,
502 with REG->rx contributing the more significant bits. */
503 static enum register_status
504 m32c_cat_write (struct m32c_reg *reg, struct regcache *cache,
505 const gdb_byte *buf)
506 {
507 int high_bytes = TYPE_LENGTH (reg->rx->type);
508 int low_bytes = TYPE_LENGTH (reg->ry->type);
509
510 gdb_assert (TYPE_LENGTH (reg->type) == high_bytes + low_bytes);
511
512 if (gdbarch_byte_order (reg->arch) == BFD_ENDIAN_BIG)
513 {
514 regcache_cooked_write (cache, reg->rx->num, buf);
515 regcache_cooked_write (cache, reg->ry->num, buf + high_bytes);
516 }
517 else
518 {
519 regcache_cooked_write (cache, reg->rx->num, buf + low_bytes);
520 regcache_cooked_write (cache, reg->ry->num, buf);
521 }
522
523 return REG_VALID;
524 }
525
526
527 /* Copy the value of the raw register REG from CACHE to BUF. REG is
528 the concatenation (from most significant to least) of r3, r2, r1,
529 and r0. */
530 static enum register_status
531 m32c_r3r2r1r0_read (struct m32c_reg *reg, struct regcache *cache, gdb_byte *buf)
532 {
533 struct gdbarch_tdep *tdep = gdbarch_tdep (reg->arch);
534 int len = TYPE_LENGTH (tdep->r0->type);
535 enum register_status status;
536
537 if (gdbarch_byte_order (reg->arch) == BFD_ENDIAN_BIG)
538 {
539 status = regcache_cooked_read (cache, tdep->r0->num, buf + len * 3);
540 if (status == REG_VALID)
541 status = regcache_cooked_read (cache, tdep->r1->num, buf + len * 2);
542 if (status == REG_VALID)
543 status = regcache_cooked_read (cache, tdep->r2->num, buf + len * 1);
544 if (status == REG_VALID)
545 status = regcache_cooked_read (cache, tdep->r3->num, buf);
546 }
547 else
548 {
549 status = regcache_cooked_read (cache, tdep->r0->num, buf);
550 if (status == REG_VALID)
551 status = regcache_cooked_read (cache, tdep->r1->num, buf + len * 1);
552 if (status == REG_VALID)
553 status = regcache_cooked_read (cache, tdep->r2->num, buf + len * 2);
554 if (status == REG_VALID)
555 status = regcache_cooked_read (cache, tdep->r3->num, buf + len * 3);
556 }
557
558 return status;
559 }
560
561
562 /* Copy the value of the raw register REG from BUF to CACHE. REG is
563 the concatenation (from most significant to least) of r3, r2, r1,
564 and r0. */
565 static enum register_status
566 m32c_r3r2r1r0_write (struct m32c_reg *reg, struct regcache *cache,
567 const gdb_byte *buf)
568 {
569 struct gdbarch_tdep *tdep = gdbarch_tdep (reg->arch);
570 int len = TYPE_LENGTH (tdep->r0->type);
571
572 if (gdbarch_byte_order (reg->arch) == BFD_ENDIAN_BIG)
573 {
574 regcache_cooked_write (cache, tdep->r0->num, buf + len * 3);
575 regcache_cooked_write (cache, tdep->r1->num, buf + len * 2);
576 regcache_cooked_write (cache, tdep->r2->num, buf + len * 1);
577 regcache_cooked_write (cache, tdep->r3->num, buf);
578 }
579 else
580 {
581 regcache_cooked_write (cache, tdep->r0->num, buf);
582 regcache_cooked_write (cache, tdep->r1->num, buf + len * 1);
583 regcache_cooked_write (cache, tdep->r2->num, buf + len * 2);
584 regcache_cooked_write (cache, tdep->r3->num, buf + len * 3);
585 }
586
587 return REG_VALID;
588 }
589
590
591 static enum register_status
592 m32c_pseudo_register_read (struct gdbarch *arch,
593 struct regcache *cache,
594 int cookednum,
595 gdb_byte *buf)
596 {
597 struct gdbarch_tdep *tdep = gdbarch_tdep (arch);
598 struct m32c_reg *reg;
599
600 gdb_assert (0 <= cookednum && cookednum < tdep->num_regs);
601 gdb_assert (arch == cache->arch ());
602 gdb_assert (arch == tdep->regs[cookednum].arch);
603 reg = &tdep->regs[cookednum];
604
605 return reg->read (reg, cache, buf);
606 }
607
608
609 static void
610 m32c_pseudo_register_write (struct gdbarch *arch,
611 struct regcache *cache,
612 int cookednum,
613 const gdb_byte *buf)
614 {
615 struct gdbarch_tdep *tdep = gdbarch_tdep (arch);
616 struct m32c_reg *reg;
617
618 gdb_assert (0 <= cookednum && cookednum < tdep->num_regs);
619 gdb_assert (arch == cache->arch ());
620 gdb_assert (arch == tdep->regs[cookednum].arch);
621 reg = &tdep->regs[cookednum];
622
623 reg->write (reg, cache, buf);
624 }
625
626
627 /* Add a register with the given fields to the end of ARCH's table.
628 Return a pointer to the newly added register. */
629 static struct m32c_reg *
630 add_reg (struct gdbarch *arch,
631 const char *name,
632 struct type *type,
633 int sim_num,
634 m32c_read_reg_t *read,
635 m32c_write_reg_t *write,
636 struct m32c_reg *rx,
637 struct m32c_reg *ry,
638 int n)
639 {
640 struct gdbarch_tdep *tdep = gdbarch_tdep (arch);
641 struct m32c_reg *r = &tdep->regs[tdep->num_regs];
642
643 gdb_assert (tdep->num_regs < M32C_MAX_NUM_REGS);
644
645 r->name = name;
646 r->type = type;
647 r->arch = arch;
648 r->num = tdep->num_regs;
649 r->sim_num = sim_num;
650 r->dwarf_num = -1;
651 r->general_p = 0;
652 r->dma_p = 0;
653 r->system_p = 0;
654 r->save_restore_p = 0;
655 r->read = read;
656 r->write = write;
657 r->rx = rx;
658 r->ry = ry;
659 r->n = n;
660
661 tdep->num_regs++;
662
663 return r;
664 }
665
666
667 /* Record NUM as REG's DWARF register number. */
668 static void
669 set_dwarf_regnum (struct m32c_reg *reg, int num)
670 {
671 gdb_assert (num < M32C_MAX_NUM_REGS);
672
673 /* Update the reg->DWARF mapping. Only count the first number
674 assigned to this register. */
675 if (reg->dwarf_num == -1)
676 reg->dwarf_num = num;
677
678 /* Update the DWARF->reg mapping. */
679 gdbarch_tdep (reg->arch)->dwarf_regs[num] = reg;
680 }
681
682
683 /* Mark REG as a general-purpose register, and return it. */
684 static struct m32c_reg *
685 mark_general (struct m32c_reg *reg)
686 {
687 reg->general_p = 1;
688 return reg;
689 }
690
691
692 /* Mark REG as a DMA register, and return it. */
693 static struct m32c_reg *
694 mark_dma (struct m32c_reg *reg)
695 {
696 reg->dma_p = 1;
697 return reg;
698 }
699
700
701 /* Mark REG as a SYSTEM register, and return it. */
702 static struct m32c_reg *
703 mark_system (struct m32c_reg *reg)
704 {
705 reg->system_p = 1;
706 return reg;
707 }
708
709
710 /* Mark REG as a save-restore register, and return it. */
711 static struct m32c_reg *
712 mark_save_restore (struct m32c_reg *reg)
713 {
714 reg->save_restore_p = 1;
715 return reg;
716 }
717
718
719 #define FLAGBIT_B 0x0010
720 #define FLAGBIT_U 0x0080
721
722 /* Handy macros for declaring registers. These all evaluate to
723 pointers to the register declared. Macros that define two
724 registers evaluate to a pointer to the first. */
725
726 /* A raw register named NAME, with type TYPE and sim number SIM_NUM. */
727 #define R(name, type, sim_num) \
728 (add_reg (arch, (name), (type), (sim_num), \
729 m32c_raw_read, m32c_raw_write, NULL, NULL, 0))
730
731 /* The simulator register number for a raw register named NAME. */
732 #define SIM(name) (m32c_sim_reg_ ## name)
733
734 /* A raw unsigned 16-bit data register named NAME.
735 NAME should be an identifier, not a string. */
736 #define R16U(name) \
737 (R(#name, tdep->uint16, SIM (name)))
738
739 /* A raw data address register named NAME.
740 NAME should be an identifier, not a string. */
741 #define RA(name) \
742 (R(#name, tdep->data_addr_reg_type, SIM (name)))
743
744 /* A raw code address register named NAME. NAME should
745 be an identifier, not a string. */
746 #define RC(name) \
747 (R(#name, tdep->code_addr_reg_type, SIM (name)))
748
749 /* A pair of raw registers named NAME0 and NAME1, with type TYPE.
750 NAME should be an identifier, not a string. */
751 #define RP(name, type) \
752 (R(#name "0", (type), SIM (name ## 0)), \
753 R(#name "1", (type), SIM (name ## 1)) - 1)
754
755 /* A raw banked general-purpose data register named NAME.
756 NAME should be an identifier, not a string. */
757 #define RBD(name) \
758 (R(NULL, tdep->int16, SIM (name ## _bank0)), \
759 R(NULL, tdep->int16, SIM (name ## _bank1)) - 1)
760
761 /* A raw banked data address register named NAME.
762 NAME should be an identifier, not a string. */
763 #define RBA(name) \
764 (R(NULL, tdep->data_addr_reg_type, SIM (name ## _bank0)), \
765 R(NULL, tdep->data_addr_reg_type, SIM (name ## _bank1)) - 1)
766
767 /* A cooked register named NAME referring to a raw banked register
768 from the bank selected by the current value of FLG. RAW_PAIR
769 should be a pointer to the first register in the banked pair.
770 NAME must be an identifier, not a string. */
771 #define CB(name, raw_pair) \
772 (add_reg (arch, #name, (raw_pair)->type, 0, \
773 m32c_banked_read, m32c_banked_write, \
774 (raw_pair), (raw_pair + 1), FLAGBIT_B))
775
776 /* A pair of registers named NAMEH and NAMEL, of type TYPE, that
777 access the top and bottom halves of the register pointed to by
778 NAME. NAME should be an identifier. */
779 #define CHL(name, type) \
780 (add_reg (arch, #name "h", (type), 0, \
781 m32c_part_read, m32c_part_write, name, NULL, 1), \
782 add_reg (arch, #name "l", (type), 0, \
783 m32c_part_read, m32c_part_write, name, NULL, 0) - 1)
784
785 /* A register constructed by concatenating the two registers HIGH and
786 LOW, whose name is HIGHLOW and whose type is TYPE. */
787 #define CCAT(high, low, type) \
788 (add_reg (arch, #high #low, (type), 0, \
789 m32c_cat_read, m32c_cat_write, (high), (low), 0))
790
791 /* Abbreviations for marking register group membership. */
792 #define G(reg) (mark_general (reg))
793 #define S(reg) (mark_system (reg))
794 #define DMA(reg) (mark_dma (reg))
795
796
797 /* Construct the register set for ARCH. */
798 static void
799 make_regs (struct gdbarch *arch)
800 {
801 struct gdbarch_tdep *tdep = gdbarch_tdep (arch);
802 int mach = gdbarch_bfd_arch_info (arch)->mach;
803 int num_raw_regs;
804 int num_cooked_regs;
805
806 struct m32c_reg *r0;
807 struct m32c_reg *r1;
808 struct m32c_reg *r2;
809 struct m32c_reg *r3;
810 struct m32c_reg *a0;
811 struct m32c_reg *a1;
812 struct m32c_reg *fb;
813 struct m32c_reg *sb;
814 struct m32c_reg *sp;
815 struct m32c_reg *r0hl;
816 struct m32c_reg *r1hl;
817 struct m32c_reg *r2r0;
818 struct m32c_reg *r3r1;
819 struct m32c_reg *r3r1r2r0;
820 struct m32c_reg *r3r2r1r0;
821 struct m32c_reg *a1a0;
822
823 struct m32c_reg *raw_r0_pair = RBD (r0);
824 struct m32c_reg *raw_r1_pair = RBD (r1);
825 struct m32c_reg *raw_r2_pair = RBD (r2);
826 struct m32c_reg *raw_r3_pair = RBD (r3);
827 struct m32c_reg *raw_a0_pair = RBA (a0);
828 struct m32c_reg *raw_a1_pair = RBA (a1);
829 struct m32c_reg *raw_fb_pair = RBA (fb);
830
831 /* sb is banked on the bfd_mach_m32c, but not on bfd_mach_m16c.
832 We always declare both raw registers, and deal with the distinction
833 in the pseudoregister. */
834 struct m32c_reg *raw_sb_pair = RBA (sb);
835
836 struct m32c_reg *usp = S (RA (usp));
837 struct m32c_reg *isp = S (RA (isp));
838 struct m32c_reg *intb = S (RC (intb));
839 struct m32c_reg *pc = G (RC (pc));
840 struct m32c_reg *flg = G (R16U (flg));
841
842 if (mach == bfd_mach_m32c)
843 {
844 struct m32c_reg *svf = S (R16U (svf));
845 struct m32c_reg *svp = S (RC (svp));
846 struct m32c_reg *vct = S (RC (vct));
847
848 struct m32c_reg *dmd01 = DMA (RP (dmd, tdep->uint8));
849 struct m32c_reg *dct01 = DMA (RP (dct, tdep->uint16));
850 struct m32c_reg *drc01 = DMA (RP (drc, tdep->uint16));
851 struct m32c_reg *dma01 = DMA (RP (dma, tdep->data_addr_reg_type));
852 struct m32c_reg *dsa01 = DMA (RP (dsa, tdep->data_addr_reg_type));
853 struct m32c_reg *dra01 = DMA (RP (dra, tdep->data_addr_reg_type));
854 }
855
856 num_raw_regs = tdep->num_regs;
857
858 r0 = G (CB (r0, raw_r0_pair));
859 r1 = G (CB (r1, raw_r1_pair));
860 r2 = G (CB (r2, raw_r2_pair));
861 r3 = G (CB (r3, raw_r3_pair));
862 a0 = G (CB (a0, raw_a0_pair));
863 a1 = G (CB (a1, raw_a1_pair));
864 fb = G (CB (fb, raw_fb_pair));
865
866 /* sb is banked on the bfd_mach_m32c, but not on bfd_mach_m16c.
867 Specify custom read/write functions that do the right thing. */
868 sb = G (add_reg (arch, "sb", raw_sb_pair->type, 0,
869 m32c_sb_read, m32c_sb_write,
870 raw_sb_pair, raw_sb_pair + 1, 0));
871
872 /* The current sp is either usp or isp, depending on the value of
873 the FLG register's U bit. */
874 sp = G (add_reg (arch, "sp", usp->type, 0,
875 m32c_banked_read, m32c_banked_write,
876 isp, usp, FLAGBIT_U));
877
878 r0hl = CHL (r0, tdep->int8);
879 r1hl = CHL (r1, tdep->int8);
880 CHL (r2, tdep->int8);
881 CHL (r3, tdep->int8);
882 CHL (intb, tdep->int16);
883
884 r2r0 = CCAT (r2, r0, tdep->int32);
885 r3r1 = CCAT (r3, r1, tdep->int32);
886 r3r1r2r0 = CCAT (r3r1, r2r0, tdep->int64);
887
888 r3r2r1r0
889 = add_reg (arch, "r3r2r1r0", tdep->int64, 0,
890 m32c_r3r2r1r0_read, m32c_r3r2r1r0_write, NULL, NULL, 0);
891
892 if (mach == bfd_mach_m16c)
893 a1a0 = CCAT (a1, a0, tdep->int32);
894 else
895 a1a0 = NULL;
896
897 num_cooked_regs = tdep->num_regs - num_raw_regs;
898
899 tdep->pc = pc;
900 tdep->flg = flg;
901 tdep->r0 = r0;
902 tdep->r1 = r1;
903 tdep->r2 = r2;
904 tdep->r3 = r3;
905 tdep->r2r0 = r2r0;
906 tdep->r3r2r1r0 = r3r2r1r0;
907 tdep->r3r1r2r0 = r3r1r2r0;
908 tdep->a0 = a0;
909 tdep->a1 = a1;
910 tdep->sb = sb;
911 tdep->fb = fb;
912 tdep->sp = sp;
913
914 /* Set up the DWARF register table. */
915 memset (tdep->dwarf_regs, 0, sizeof (tdep->dwarf_regs));
916 set_dwarf_regnum (r0hl + 1, 0x01);
917 set_dwarf_regnum (r0hl + 0, 0x02);
918 set_dwarf_regnum (r1hl + 1, 0x03);
919 set_dwarf_regnum (r1hl + 0, 0x04);
920 set_dwarf_regnum (r0, 0x05);
921 set_dwarf_regnum (r1, 0x06);
922 set_dwarf_regnum (r2, 0x07);
923 set_dwarf_regnum (r3, 0x08);
924 set_dwarf_regnum (a0, 0x09);
925 set_dwarf_regnum (a1, 0x0a);
926 set_dwarf_regnum (fb, 0x0b);
927 set_dwarf_regnum (sp, 0x0c);
928 set_dwarf_regnum (pc, 0x0d); /* GCC's invention */
929 set_dwarf_regnum (sb, 0x13);
930 set_dwarf_regnum (r2r0, 0x15);
931 set_dwarf_regnum (r3r1, 0x16);
932 if (a1a0)
933 set_dwarf_regnum (a1a0, 0x17);
934
935 /* Enumerate the save/restore register group.
936
937 The regcache_save and regcache_restore functions apply their read
938 function to each register in this group.
939
940 Since frame_pop supplies frame_unwind_register as its read
941 function, the registers meaningful to the Dwarf unwinder need to
942 be in this group.
943
944 On the other hand, when we make inferior calls, save_inferior_status
945 and restore_inferior_status use them to preserve the current register
946 values across the inferior call. For this, you'd kind of like to
947 preserve all the raw registers, to protect the interrupted code from
948 any sort of bank switching the callee might have done. But we handle
949 those cases so badly anyway --- for example, it matters whether we
950 restore FLG before or after we restore the general-purpose registers,
951 but there's no way to express that --- that it isn't worth worrying
952 about.
953
954 We omit control registers like inthl: if you call a function that
955 changes those, it's probably because you wanted that change to be
956 visible to the interrupted code. */
957 mark_save_restore (r0);
958 mark_save_restore (r1);
959 mark_save_restore (r2);
960 mark_save_restore (r3);
961 mark_save_restore (a0);
962 mark_save_restore (a1);
963 mark_save_restore (sb);
964 mark_save_restore (fb);
965 mark_save_restore (sp);
966 mark_save_restore (pc);
967 mark_save_restore (flg);
968
969 set_gdbarch_num_regs (arch, num_raw_regs);
970 set_gdbarch_num_pseudo_regs (arch, num_cooked_regs);
971 set_gdbarch_pc_regnum (arch, pc->num);
972 set_gdbarch_sp_regnum (arch, sp->num);
973 set_gdbarch_register_name (arch, m32c_register_name);
974 set_gdbarch_register_type (arch, m32c_register_type);
975 set_gdbarch_pseudo_register_read (arch, m32c_pseudo_register_read);
976 set_gdbarch_pseudo_register_write (arch, m32c_pseudo_register_write);
977 set_gdbarch_register_sim_regno (arch, m32c_register_sim_regno);
978 set_gdbarch_stab_reg_to_regnum (arch, m32c_debug_info_reg_to_regnum);
979 set_gdbarch_dwarf2_reg_to_regnum (arch, m32c_debug_info_reg_to_regnum);
980 set_gdbarch_register_reggroup_p (arch, m32c_register_reggroup_p);
981
982 reggroup_add (arch, general_reggroup);
983 reggroup_add (arch, all_reggroup);
984 reggroup_add (arch, save_reggroup);
985 reggroup_add (arch, restore_reggroup);
986 reggroup_add (arch, system_reggroup);
987 reggroup_add (arch, m32c_dma_reggroup);
988 }
989
990
991
992 /* Breakpoints. */
993 constexpr gdb_byte m32c_break_insn[] = { 0x00 }; /* brk */
994
995 typedef BP_MANIPULATION (m32c_break_insn) m32c_breakpoint;
996
997
998 /* Prologue analysis. */
999
1000 enum m32c_prologue_kind
1001 {
1002 /* This function uses a frame pointer. */
1003 prologue_with_frame_ptr,
1004
1005 /* This function has no frame pointer. */
1006 prologue_sans_frame_ptr,
1007
1008 /* This function sets up the stack, so its frame is the first
1009 frame on the stack. */
1010 prologue_first_frame
1011 };
1012
1013 struct m32c_prologue
1014 {
1015 /* For consistency with the DWARF 2 .debug_frame info generated by
1016 GCC, a frame's CFA is the address immediately after the saved
1017 return address. */
1018
1019 /* The architecture for which we generated this prologue info. */
1020 struct gdbarch *arch;
1021
1022 enum m32c_prologue_kind kind;
1023
1024 /* If KIND is prologue_with_frame_ptr, this is the offset from the
1025 CFA to where the frame pointer points. This is always zero or
1026 negative. */
1027 LONGEST frame_ptr_offset;
1028
1029 /* If KIND is prologue_sans_frame_ptr, the offset from the CFA to
1030 the stack pointer --- always zero or negative.
1031
1032 Calling this a "size" is a bit misleading, but given that the
1033 stack grows downwards, using offsets for everything keeps one
1034 from going completely sign-crazy: you never change anything's
1035 sign for an ADD instruction; always change the second operand's
1036 sign for a SUB instruction; and everything takes care of
1037 itself.
1038
1039 Functions that use alloca don't have a constant frame size. But
1040 they always have frame pointers, so we must use that to find the
1041 CFA (and perhaps to unwind the stack pointer). */
1042 LONGEST frame_size;
1043
1044 /* The address of the first instruction at which the frame has been
1045 set up and the arguments are where the debug info says they are
1046 --- as best as we can tell. */
1047 CORE_ADDR prologue_end;
1048
1049 /* reg_offset[R] is the offset from the CFA at which register R is
1050 saved, or 1 if register R has not been saved. (Real values are
1051 always zero or negative.) */
1052 LONGEST reg_offset[M32C_MAX_NUM_REGS];
1053 };
1054
1055
1056 /* The longest I've seen, anyway. */
1057 #define M32C_MAX_INSN_LEN (9)
1058
1059 /* Processor state, for the prologue analyzer. */
1060 struct m32c_pv_state
1061 {
1062 struct gdbarch *arch;
1063 pv_t r0, r1, r2, r3;
1064 pv_t a0, a1;
1065 pv_t sb, fb, sp;
1066 pv_t pc;
1067 struct pv_area *stack;
1068
1069 /* Bytes from the current PC, the address they were read from,
1070 and the address of the next unconsumed byte. */
1071 gdb_byte insn[M32C_MAX_INSN_LEN];
1072 CORE_ADDR scan_pc, next_addr;
1073 };
1074
1075
1076 /* Push VALUE on STATE's stack, occupying SIZE bytes. Return zero if
1077 all went well, or non-zero if simulating the action would trash our
1078 state. */
1079 static int
1080 m32c_pv_push (struct m32c_pv_state *state, pv_t value, int size)
1081 {
1082 if (state->stack->store_would_trash (state->sp))
1083 return 1;
1084
1085 state->sp = pv_add_constant (state->sp, -size);
1086 state->stack->store (state->sp, size, value);
1087
1088 return 0;
1089 }
1090
1091
1092 enum srcdest_kind
1093 {
1094 srcdest_reg,
1095 srcdest_partial_reg,
1096 srcdest_mem
1097 };
1098
1099 /* A source or destination location for an m16c or m32c
1100 instruction. */
1101 struct srcdest
1102 {
1103 /* If srcdest_reg, the location is a register pointed to by REG.
1104 If srcdest_partial_reg, the location is part of a register pointed
1105 to by REG. We don't try to handle this too well.
1106 If srcdest_mem, the location is memory whose address is ADDR. */
1107 enum srcdest_kind kind;
1108 pv_t *reg, addr;
1109 };
1110
1111
1112 /* Return the SIZE-byte value at LOC in STATE. */
1113 static pv_t
1114 m32c_srcdest_fetch (struct m32c_pv_state *state, struct srcdest loc, int size)
1115 {
1116 if (loc.kind == srcdest_mem)
1117 return state->stack->fetch (loc.addr, size);
1118 else if (loc.kind == srcdest_partial_reg)
1119 return pv_unknown ();
1120 else
1121 return *loc.reg;
1122 }
1123
1124
1125 /* Write VALUE, a SIZE-byte value, to LOC in STATE. Return zero if
1126 all went well, or non-zero if simulating the store would trash our
1127 state. */
1128 static int
1129 m32c_srcdest_store (struct m32c_pv_state *state, struct srcdest loc,
1130 pv_t value, int size)
1131 {
1132 if (loc.kind == srcdest_mem)
1133 {
1134 if (state->stack->store_would_trash (loc.addr))
1135 return 1;
1136 state->stack->store (loc.addr, size, value);
1137 }
1138 else if (loc.kind == srcdest_partial_reg)
1139 *loc.reg = pv_unknown ();
1140 else
1141 *loc.reg = value;
1142
1143 return 0;
1144 }
1145
1146
1147 static int
1148 m32c_sign_ext (int v, int bits)
1149 {
1150 int mask = 1 << (bits - 1);
1151 return (v ^ mask) - mask;
1152 }
1153
1154 static unsigned int
1155 m32c_next_byte (struct m32c_pv_state *st)
1156 {
1157 gdb_assert (st->next_addr - st->scan_pc < sizeof (st->insn));
1158 return st->insn[st->next_addr++ - st->scan_pc];
1159 }
1160
1161 static int
1162 m32c_udisp8 (struct m32c_pv_state *st)
1163 {
1164 return m32c_next_byte (st);
1165 }
1166
1167
1168 static int
1169 m32c_sdisp8 (struct m32c_pv_state *st)
1170 {
1171 return m32c_sign_ext (m32c_next_byte (st), 8);
1172 }
1173
1174
1175 static int
1176 m32c_udisp16 (struct m32c_pv_state *st)
1177 {
1178 int low = m32c_next_byte (st);
1179 int high = m32c_next_byte (st);
1180
1181 return low + (high << 8);
1182 }
1183
1184
1185 static int
1186 m32c_sdisp16 (struct m32c_pv_state *st)
1187 {
1188 int low = m32c_next_byte (st);
1189 int high = m32c_next_byte (st);
1190
1191 return m32c_sign_ext (low + (high << 8), 16);
1192 }
1193
1194
1195 static int
1196 m32c_udisp24 (struct m32c_pv_state *st)
1197 {
1198 int low = m32c_next_byte (st);
1199 int mid = m32c_next_byte (st);
1200 int high = m32c_next_byte (st);
1201
1202 return low + (mid << 8) + (high << 16);
1203 }
1204
1205
1206 /* Extract the 'source' field from an m32c MOV.size:G-format instruction. */
1207 static int
1208 m32c_get_src23 (unsigned char *i)
1209 {
1210 return (((i[0] & 0x70) >> 2)
1211 | ((i[1] & 0x30) >> 4));
1212 }
1213
1214
1215 /* Extract the 'dest' field from an m32c MOV.size:G-format instruction. */
1216 static int
1217 m32c_get_dest23 (unsigned char *i)
1218 {
1219 return (((i[0] & 0x0e) << 1)
1220 | ((i[1] & 0xc0) >> 6));
1221 }
1222
1223
1224 static struct srcdest
1225 m32c_decode_srcdest4 (struct m32c_pv_state *st,
1226 int code, int size)
1227 {
1228 struct srcdest sd;
1229
1230 if (code < 6)
1231 sd.kind = (size == 2 ? srcdest_reg : srcdest_partial_reg);
1232 else
1233 sd.kind = srcdest_mem;
1234
1235 sd.addr = pv_unknown ();
1236 sd.reg = 0;
1237
1238 switch (code)
1239 {
1240 case 0x0: sd.reg = (size == 1 ? &st->r0 : &st->r0); break;
1241 case 0x1: sd.reg = (size == 1 ? &st->r0 : &st->r1); break;
1242 case 0x2: sd.reg = (size == 1 ? &st->r1 : &st->r2); break;
1243 case 0x3: sd.reg = (size == 1 ? &st->r1 : &st->r3); break;
1244
1245 case 0x4: sd.reg = &st->a0; break;
1246 case 0x5: sd.reg = &st->a1; break;
1247
1248 case 0x6: sd.addr = st->a0; break;
1249 case 0x7: sd.addr = st->a1; break;
1250
1251 case 0x8: sd.addr = pv_add_constant (st->a0, m32c_udisp8 (st)); break;
1252 case 0x9: sd.addr = pv_add_constant (st->a1, m32c_udisp8 (st)); break;
1253 case 0xa: sd.addr = pv_add_constant (st->sb, m32c_udisp8 (st)); break;
1254 case 0xb: sd.addr = pv_add_constant (st->fb, m32c_sdisp8 (st)); break;
1255
1256 case 0xc: sd.addr = pv_add_constant (st->a0, m32c_udisp16 (st)); break;
1257 case 0xd: sd.addr = pv_add_constant (st->a1, m32c_udisp16 (st)); break;
1258 case 0xe: sd.addr = pv_add_constant (st->sb, m32c_udisp16 (st)); break;
1259 case 0xf: sd.addr = pv_constant (m32c_udisp16 (st)); break;
1260
1261 default:
1262 gdb_assert_not_reached ("unexpected srcdest4");
1263 }
1264
1265 return sd;
1266 }
1267
1268
1269 static struct srcdest
1270 m32c_decode_sd23 (struct m32c_pv_state *st, int code, int size, int ind)
1271 {
1272 struct srcdest sd;
1273
1274 sd.addr = pv_unknown ();
1275 sd.reg = 0;
1276
1277 switch (code)
1278 {
1279 case 0x12:
1280 case 0x13:
1281 case 0x10:
1282 case 0x11:
1283 sd.kind = (size == 1) ? srcdest_partial_reg : srcdest_reg;
1284 break;
1285
1286 case 0x02:
1287 case 0x03:
1288 sd.kind = (size == 4) ? srcdest_reg : srcdest_partial_reg;
1289 break;
1290
1291 default:
1292 sd.kind = srcdest_mem;
1293 break;
1294
1295 }
1296
1297 switch (code)
1298 {
1299 case 0x12: sd.reg = &st->r0; break;
1300 case 0x13: sd.reg = &st->r1; break;
1301 case 0x10: sd.reg = ((size == 1) ? &st->r0 : &st->r2); break;
1302 case 0x11: sd.reg = ((size == 1) ? &st->r1 : &st->r3); break;
1303 case 0x02: sd.reg = &st->a0; break;
1304 case 0x03: sd.reg = &st->a1; break;
1305
1306 case 0x00: sd.addr = st->a0; break;
1307 case 0x01: sd.addr = st->a1; break;
1308 case 0x04: sd.addr = pv_add_constant (st->a0, m32c_udisp8 (st)); break;
1309 case 0x05: sd.addr = pv_add_constant (st->a1, m32c_udisp8 (st)); break;
1310 case 0x06: sd.addr = pv_add_constant (st->sb, m32c_udisp8 (st)); break;
1311 case 0x07: sd.addr = pv_add_constant (st->fb, m32c_sdisp8 (st)); break;
1312 case 0x08: sd.addr = pv_add_constant (st->a0, m32c_udisp16 (st)); break;
1313 case 0x09: sd.addr = pv_add_constant (st->a1, m32c_udisp16 (st)); break;
1314 case 0x0a: sd.addr = pv_add_constant (st->sb, m32c_udisp16 (st)); break;
1315 case 0x0b: sd.addr = pv_add_constant (st->fb, m32c_sdisp16 (st)); break;
1316 case 0x0c: sd.addr = pv_add_constant (st->a0, m32c_udisp24 (st)); break;
1317 case 0x0d: sd.addr = pv_add_constant (st->a1, m32c_udisp24 (st)); break;
1318 case 0x0f: sd.addr = pv_constant (m32c_udisp16 (st)); break;
1319 case 0x0e: sd.addr = pv_constant (m32c_udisp24 (st)); break;
1320 default:
1321 gdb_assert_not_reached ("unexpected sd23");
1322 }
1323
1324 if (ind)
1325 {
1326 sd.addr = m32c_srcdest_fetch (st, sd, 4);
1327 sd.kind = srcdest_mem;
1328 }
1329
1330 return sd;
1331 }
1332
1333
1334 /* The r16c and r32c machines have instructions with similar
1335 semantics, but completely different machine language encodings. So
1336 we break out the semantics into their own functions, and leave
1337 machine-specific decoding in m32c_analyze_prologue.
1338
1339 The following functions all expect their arguments already decoded,
1340 and they all return zero if analysis should continue past this
1341 instruction, or non-zero if analysis should stop. */
1342
1343
1344 /* Simulate an 'enter SIZE' instruction in STATE. */
1345 static int
1346 m32c_pv_enter (struct m32c_pv_state *state, int size)
1347 {
1348 struct gdbarch_tdep *tdep = gdbarch_tdep (state->arch);
1349
1350 /* If simulating this store would require us to forget
1351 everything we know about the stack frame in the name of
1352 accuracy, it would be better to just quit now. */
1353 if (state->stack->store_would_trash (state->sp))
1354 return 1;
1355
1356 if (m32c_pv_push (state, state->fb, tdep->push_addr_bytes))
1357 return 1;
1358 state->fb = state->sp;
1359 state->sp = pv_add_constant (state->sp, -size);
1360
1361 return 0;
1362 }
1363
1364
1365 static int
1366 m32c_pv_pushm_one (struct m32c_pv_state *state, pv_t reg,
1367 int bit, int src, int size)
1368 {
1369 if (bit & src)
1370 {
1371 if (m32c_pv_push (state, reg, size))
1372 return 1;
1373 }
1374
1375 return 0;
1376 }
1377
1378
1379 /* Simulate a 'pushm SRC' instruction in STATE. */
1380 static int
1381 m32c_pv_pushm (struct m32c_pv_state *state, int src)
1382 {
1383 struct gdbarch_tdep *tdep = gdbarch_tdep (state->arch);
1384
1385 /* The bits in SRC indicating which registers to save are:
1386 r0 r1 r2 r3 a0 a1 sb fb */
1387 return
1388 ( m32c_pv_pushm_one (state, state->fb, 0x01, src, tdep->push_addr_bytes)
1389 || m32c_pv_pushm_one (state, state->sb, 0x02, src, tdep->push_addr_bytes)
1390 || m32c_pv_pushm_one (state, state->a1, 0x04, src, tdep->push_addr_bytes)
1391 || m32c_pv_pushm_one (state, state->a0, 0x08, src, tdep->push_addr_bytes)
1392 || m32c_pv_pushm_one (state, state->r3, 0x10, src, 2)
1393 || m32c_pv_pushm_one (state, state->r2, 0x20, src, 2)
1394 || m32c_pv_pushm_one (state, state->r1, 0x40, src, 2)
1395 || m32c_pv_pushm_one (state, state->r0, 0x80, src, 2));
1396 }
1397
1398 /* Return non-zero if VALUE is the first incoming argument register. */
1399
1400 static int
1401 m32c_is_1st_arg_reg (struct m32c_pv_state *state, pv_t value)
1402 {
1403 struct gdbarch_tdep *tdep = gdbarch_tdep (state->arch);
1404 return (value.kind == pvk_register
1405 && (gdbarch_bfd_arch_info (state->arch)->mach == bfd_mach_m16c
1406 ? (value.reg == tdep->r1->num)
1407 : (value.reg == tdep->r0->num))
1408 && value.k == 0);
1409 }
1410
1411 /* Return non-zero if VALUE is an incoming argument register. */
1412
1413 static int
1414 m32c_is_arg_reg (struct m32c_pv_state *state, pv_t value)
1415 {
1416 struct gdbarch_tdep *tdep = gdbarch_tdep (state->arch);
1417 return (value.kind == pvk_register
1418 && (gdbarch_bfd_arch_info (state->arch)->mach == bfd_mach_m16c
1419 ? (value.reg == tdep->r1->num || value.reg == tdep->r2->num)
1420 : (value.reg == tdep->r0->num))
1421 && value.k == 0);
1422 }
1423
1424 /* Return non-zero if a store of VALUE to LOC is probably spilling an
1425 argument register to its stack slot in STATE. Such instructions
1426 should be included in the prologue, if possible.
1427
1428 The store is a spill if:
1429 - the value being stored is the original value of an argument register;
1430 - the value has not already been stored somewhere in STACK; and
1431 - LOC is a stack slot (e.g., a memory location whose address is
1432 relative to the original value of the SP). */
1433
1434 static int
1435 m32c_is_arg_spill (struct m32c_pv_state *st,
1436 struct srcdest loc,
1437 pv_t value)
1438 {
1439 struct gdbarch_tdep *tdep = gdbarch_tdep (st->arch);
1440
1441 return (m32c_is_arg_reg (st, value)
1442 && loc.kind == srcdest_mem
1443 && pv_is_register (loc.addr, tdep->sp->num)
1444 && ! st->stack->find_reg (st->arch, value.reg, 0));
1445 }
1446
1447 /* Return non-zero if a store of VALUE to LOC is probably
1448 copying the struct return address into an address register
1449 for immediate use. This is basically a "spill" into the
1450 address register, instead of onto the stack.
1451
1452 The prerequisites are:
1453 - value being stored is original value of the FIRST arg register;
1454 - value has not already been stored on stack; and
1455 - LOC is an address register (a0 or a1). */
1456
1457 static int
1458 m32c_is_struct_return (struct m32c_pv_state *st,
1459 struct srcdest loc,
1460 pv_t value)
1461 {
1462 struct gdbarch_tdep *tdep = gdbarch_tdep (st->arch);
1463
1464 return (m32c_is_1st_arg_reg (st, value)
1465 && !st->stack->find_reg (st->arch, value.reg, 0)
1466 && loc.kind == srcdest_reg
1467 && (pv_is_register (*loc.reg, tdep->a0->num)
1468 || pv_is_register (*loc.reg, tdep->a1->num)));
1469 }
1470
1471 /* Return non-zero if a 'pushm' saving the registers indicated by SRC
1472 was a register save:
1473 - all the named registers should have their original values, and
1474 - the stack pointer should be at a constant offset from the
1475 original stack pointer. */
1476 static int
1477 m32c_pushm_is_reg_save (struct m32c_pv_state *st, int src)
1478 {
1479 struct gdbarch_tdep *tdep = gdbarch_tdep (st->arch);
1480 /* The bits in SRC indicating which registers to save are:
1481 r0 r1 r2 r3 a0 a1 sb fb */
1482 return
1483 (pv_is_register (st->sp, tdep->sp->num)
1484 && (! (src & 0x01) || pv_is_register_k (st->fb, tdep->fb->num, 0))
1485 && (! (src & 0x02) || pv_is_register_k (st->sb, tdep->sb->num, 0))
1486 && (! (src & 0x04) || pv_is_register_k (st->a1, tdep->a1->num, 0))
1487 && (! (src & 0x08) || pv_is_register_k (st->a0, tdep->a0->num, 0))
1488 && (! (src & 0x10) || pv_is_register_k (st->r3, tdep->r3->num, 0))
1489 && (! (src & 0x20) || pv_is_register_k (st->r2, tdep->r2->num, 0))
1490 && (! (src & 0x40) || pv_is_register_k (st->r1, tdep->r1->num, 0))
1491 && (! (src & 0x80) || pv_is_register_k (st->r0, tdep->r0->num, 0)));
1492 }
1493
1494
1495 /* Function for finding saved registers in a 'struct pv_area'; we pass
1496 this to pv_area::scan.
1497
1498 If VALUE is a saved register, ADDR says it was saved at a constant
1499 offset from the frame base, and SIZE indicates that the whole
1500 register was saved, record its offset in RESULT_UNTYPED. */
1501 static void
1502 check_for_saved (void *prologue_untyped, pv_t addr, CORE_ADDR size, pv_t value)
1503 {
1504 struct m32c_prologue *prologue = (struct m32c_prologue *) prologue_untyped;
1505 struct gdbarch *arch = prologue->arch;
1506 struct gdbarch_tdep *tdep = gdbarch_tdep (arch);
1507
1508 /* Is this the unchanged value of some register being saved on the
1509 stack? */
1510 if (value.kind == pvk_register
1511 && value.k == 0
1512 && pv_is_register (addr, tdep->sp->num))
1513 {
1514 /* Some registers require special handling: they're saved as a
1515 larger value than the register itself. */
1516 CORE_ADDR saved_size = register_size (arch, value.reg);
1517
1518 if (value.reg == tdep->pc->num)
1519 saved_size = tdep->ret_addr_bytes;
1520 else if (register_type (arch, value.reg)
1521 == tdep->data_addr_reg_type)
1522 saved_size = tdep->push_addr_bytes;
1523
1524 if (size == saved_size)
1525 {
1526 /* Find which end of the saved value corresponds to our
1527 register. */
1528 if (gdbarch_byte_order (arch) == BFD_ENDIAN_BIG)
1529 prologue->reg_offset[value.reg]
1530 = (addr.k + saved_size - register_size (arch, value.reg));
1531 else
1532 prologue->reg_offset[value.reg] = addr.k;
1533 }
1534 }
1535 }
1536
1537
1538 /* Analyze the function prologue for ARCH at START, going no further
1539 than LIMIT, and place a description of what we found in
1540 PROLOGUE. */
1541 static void
1542 m32c_analyze_prologue (struct gdbarch *arch,
1543 CORE_ADDR start, CORE_ADDR limit,
1544 struct m32c_prologue *prologue)
1545 {
1546 struct gdbarch_tdep *tdep = gdbarch_tdep (arch);
1547 unsigned long mach = gdbarch_bfd_arch_info (arch)->mach;
1548 CORE_ADDR after_last_frame_related_insn;
1549 struct m32c_pv_state st;
1550
1551 st.arch = arch;
1552 st.r0 = pv_register (tdep->r0->num, 0);
1553 st.r1 = pv_register (tdep->r1->num, 0);
1554 st.r2 = pv_register (tdep->r2->num, 0);
1555 st.r3 = pv_register (tdep->r3->num, 0);
1556 st.a0 = pv_register (tdep->a0->num, 0);
1557 st.a1 = pv_register (tdep->a1->num, 0);
1558 st.sb = pv_register (tdep->sb->num, 0);
1559 st.fb = pv_register (tdep->fb->num, 0);
1560 st.sp = pv_register (tdep->sp->num, 0);
1561 st.pc = pv_register (tdep->pc->num, 0);
1562 pv_area stack (tdep->sp->num, gdbarch_addr_bit (arch));
1563 st.stack = &stack;
1564
1565 /* Record that the call instruction has saved the return address on
1566 the stack. */
1567 m32c_pv_push (&st, st.pc, tdep->ret_addr_bytes);
1568
1569 memset (prologue, 0, sizeof (*prologue));
1570 prologue->arch = arch;
1571 {
1572 int i;
1573 for (i = 0; i < M32C_MAX_NUM_REGS; i++)
1574 prologue->reg_offset[i] = 1;
1575 }
1576
1577 st.scan_pc = after_last_frame_related_insn = start;
1578
1579 while (st.scan_pc < limit)
1580 {
1581 pv_t pre_insn_fb = st.fb;
1582 pv_t pre_insn_sp = st.sp;
1583
1584 /* In theory we could get in trouble by trying to read ahead
1585 here, when we only know we're expecting one byte. In
1586 practice I doubt anyone will care, and it makes the rest of
1587 the code easier. */
1588 if (target_read_memory (st.scan_pc, st.insn, sizeof (st.insn)))
1589 /* If we can't fetch the instruction from memory, stop here
1590 and hope for the best. */
1591 break;
1592 st.next_addr = st.scan_pc;
1593
1594 /* The assembly instructions are written as they appear in the
1595 section of the processor manuals that describe the
1596 instruction encodings.
1597
1598 When a single assembly language instruction has several
1599 different machine-language encodings, the manual
1600 distinguishes them by a number in parens, before the
1601 mnemonic. Those numbers are included, as well.
1602
1603 The srcdest decoding instructions have the same names as the
1604 analogous functions in the simulator. */
1605 if (mach == bfd_mach_m16c)
1606 {
1607 /* (1) ENTER #imm8 */
1608 if (st.insn[0] == 0x7c && st.insn[1] == 0xf2)
1609 {
1610 if (m32c_pv_enter (&st, st.insn[2]))
1611 break;
1612 st.next_addr += 3;
1613 }
1614 /* (1) PUSHM src */
1615 else if (st.insn[0] == 0xec)
1616 {
1617 int src = st.insn[1];
1618 if (m32c_pv_pushm (&st, src))
1619 break;
1620 st.next_addr += 2;
1621
1622 if (m32c_pushm_is_reg_save (&st, src))
1623 after_last_frame_related_insn = st.next_addr;
1624 }
1625
1626 /* (6) MOV.size:G src, dest */
1627 else if ((st.insn[0] & 0xfe) == 0x72)
1628 {
1629 int size = (st.insn[0] & 0x01) ? 2 : 1;
1630 struct srcdest src;
1631 struct srcdest dest;
1632 pv_t src_value;
1633 st.next_addr += 2;
1634
1635 src
1636 = m32c_decode_srcdest4 (&st, (st.insn[1] >> 4) & 0xf, size);
1637 dest
1638 = m32c_decode_srcdest4 (&st, st.insn[1] & 0xf, size);
1639 src_value = m32c_srcdest_fetch (&st, src, size);
1640
1641 if (m32c_is_arg_spill (&st, dest, src_value))
1642 after_last_frame_related_insn = st.next_addr;
1643 else if (m32c_is_struct_return (&st, dest, src_value))
1644 after_last_frame_related_insn = st.next_addr;
1645
1646 if (m32c_srcdest_store (&st, dest, src_value, size))
1647 break;
1648 }
1649
1650 /* (1) LDC #IMM16, sp */
1651 else if (st.insn[0] == 0xeb
1652 && st.insn[1] == 0x50)
1653 {
1654 st.next_addr += 2;
1655 st.sp = pv_constant (m32c_udisp16 (&st));
1656 }
1657
1658 else
1659 /* We've hit some instruction we don't know how to simulate.
1660 Strictly speaking, we should set every value we're
1661 tracking to "unknown". But we'll be optimistic, assume
1662 that we have enough information already, and stop
1663 analysis here. */
1664 break;
1665 }
1666 else
1667 {
1668 int src_indirect = 0;
1669 int dest_indirect = 0;
1670 int i = 0;
1671
1672 gdb_assert (mach == bfd_mach_m32c);
1673
1674 /* Check for prefix bytes indicating indirect addressing. */
1675 if (st.insn[0] == 0x41)
1676 {
1677 src_indirect = 1;
1678 i++;
1679 }
1680 else if (st.insn[0] == 0x09)
1681 {
1682 dest_indirect = 1;
1683 i++;
1684 }
1685 else if (st.insn[0] == 0x49)
1686 {
1687 src_indirect = dest_indirect = 1;
1688 i++;
1689 }
1690
1691 /* (1) ENTER #imm8 */
1692 if (st.insn[i] == 0xec)
1693 {
1694 if (m32c_pv_enter (&st, st.insn[i + 1]))
1695 break;
1696 st.next_addr += 2;
1697 }
1698
1699 /* (1) PUSHM src */
1700 else if (st.insn[i] == 0x8f)
1701 {
1702 int src = st.insn[i + 1];
1703 if (m32c_pv_pushm (&st, src))
1704 break;
1705 st.next_addr += 2;
1706
1707 if (m32c_pushm_is_reg_save (&st, src))
1708 after_last_frame_related_insn = st.next_addr;
1709 }
1710
1711 /* (7) MOV.size:G src, dest */
1712 else if ((st.insn[i] & 0x80) == 0x80
1713 && (st.insn[i + 1] & 0x0f) == 0x0b
1714 && m32c_get_src23 (&st.insn[i]) < 20
1715 && m32c_get_dest23 (&st.insn[i]) < 20)
1716 {
1717 struct srcdest src;
1718 struct srcdest dest;
1719 pv_t src_value;
1720 int bw = st.insn[i] & 0x01;
1721 int size = bw ? 2 : 1;
1722 st.next_addr += 2;
1723
1724 src
1725 = m32c_decode_sd23 (&st, m32c_get_src23 (&st.insn[i]),
1726 size, src_indirect);
1727 dest
1728 = m32c_decode_sd23 (&st, m32c_get_dest23 (&st.insn[i]),
1729 size, dest_indirect);
1730 src_value = m32c_srcdest_fetch (&st, src, size);
1731
1732 if (m32c_is_arg_spill (&st, dest, src_value))
1733 after_last_frame_related_insn = st.next_addr;
1734
1735 if (m32c_srcdest_store (&st, dest, src_value, size))
1736 break;
1737 }
1738 /* (2) LDC #IMM24, sp */
1739 else if (st.insn[i] == 0xd5
1740 && st.insn[i + 1] == 0x29)
1741 {
1742 st.next_addr += 2;
1743 st.sp = pv_constant (m32c_udisp24 (&st));
1744 }
1745 else
1746 /* We've hit some instruction we don't know how to simulate.
1747 Strictly speaking, we should set every value we're
1748 tracking to "unknown". But we'll be optimistic, assume
1749 that we have enough information already, and stop
1750 analysis here. */
1751 break;
1752 }
1753
1754 /* If this instruction changed the FB or decreased the SP (i.e.,
1755 allocated more stack space), then this may be a good place to
1756 declare the prologue finished. However, there are some
1757 exceptions:
1758
1759 - If the instruction just changed the FB back to its original
1760 value, then that's probably a restore instruction. The
1761 prologue should definitely end before that.
1762
1763 - If the instruction increased the value of the SP (that is,
1764 shrunk the frame), then it's probably part of a frame
1765 teardown sequence, and the prologue should end before
1766 that. */
1767
1768 if (! pv_is_identical (st.fb, pre_insn_fb))
1769 {
1770 if (! pv_is_register_k (st.fb, tdep->fb->num, 0))
1771 after_last_frame_related_insn = st.next_addr;
1772 }
1773 else if (! pv_is_identical (st.sp, pre_insn_sp))
1774 {
1775 /* The comparison of the constants looks odd, there, because
1776 .k is unsigned. All it really means is that the SP is
1777 lower than it was before the instruction. */
1778 if ( pv_is_register (pre_insn_sp, tdep->sp->num)
1779 && pv_is_register (st.sp, tdep->sp->num)
1780 && ((pre_insn_sp.k - st.sp.k) < (st.sp.k - pre_insn_sp.k)))
1781 after_last_frame_related_insn = st.next_addr;
1782 }
1783
1784 st.scan_pc = st.next_addr;
1785 }
1786
1787 /* Did we load a constant value into the stack pointer? */
1788 if (pv_is_constant (st.sp))
1789 prologue->kind = prologue_first_frame;
1790
1791 /* Alternatively, did we initialize the frame pointer? Remember
1792 that the CFA is the address after the return address. */
1793 if (pv_is_register (st.fb, tdep->sp->num))
1794 {
1795 prologue->kind = prologue_with_frame_ptr;
1796 prologue->frame_ptr_offset = st.fb.k;
1797 }
1798
1799 /* Is the frame size a known constant? Remember that frame_size is
1800 actually the offset from the CFA to the SP (i.e., a negative
1801 value). */
1802 else if (pv_is_register (st.sp, tdep->sp->num))
1803 {
1804 prologue->kind = prologue_sans_frame_ptr;
1805 prologue->frame_size = st.sp.k;
1806 }
1807
1808 /* We haven't been able to make sense of this function's frame. Treat
1809 it as the first frame. */
1810 else
1811 prologue->kind = prologue_first_frame;
1812
1813 /* Record where all the registers were saved. */
1814 st.stack->scan (check_for_saved, (void *) prologue);
1815
1816 prologue->prologue_end = after_last_frame_related_insn;
1817 }
1818
1819
1820 static CORE_ADDR
1821 m32c_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR ip)
1822 {
1823 const char *name;
1824 CORE_ADDR func_addr, func_end, sal_end;
1825 struct m32c_prologue p;
1826
1827 /* Try to find the extent of the function that contains IP. */
1828 if (! find_pc_partial_function (ip, &name, &func_addr, &func_end))
1829 return ip;
1830
1831 /* Find end by prologue analysis. */
1832 m32c_analyze_prologue (gdbarch, ip, func_end, &p);
1833 /* Find end by line info. */
1834 sal_end = skip_prologue_using_sal (gdbarch, ip);
1835 /* Return whichever is lower. */
1836 if (sal_end != 0 && sal_end != ip && sal_end < p.prologue_end)
1837 return sal_end;
1838 else
1839 return p.prologue_end;
1840 }
1841
1842
1843
1844 /* Stack unwinding. */
1845
1846 static struct m32c_prologue *
1847 m32c_analyze_frame_prologue (struct frame_info *this_frame,
1848 void **this_prologue_cache)
1849 {
1850 if (! *this_prologue_cache)
1851 {
1852 CORE_ADDR func_start = get_frame_func (this_frame);
1853 CORE_ADDR stop_addr = get_frame_pc (this_frame);
1854
1855 /* If we couldn't find any function containing the PC, then
1856 just initialize the prologue cache, but don't do anything. */
1857 if (! func_start)
1858 stop_addr = func_start;
1859
1860 *this_prologue_cache = FRAME_OBSTACK_ZALLOC (struct m32c_prologue);
1861 m32c_analyze_prologue (get_frame_arch (this_frame),
1862 func_start, stop_addr,
1863 (struct m32c_prologue *) *this_prologue_cache);
1864 }
1865
1866 return (struct m32c_prologue *) *this_prologue_cache;
1867 }
1868
1869
1870 static CORE_ADDR
1871 m32c_frame_base (struct frame_info *this_frame,
1872 void **this_prologue_cache)
1873 {
1874 struct m32c_prologue *p
1875 = m32c_analyze_frame_prologue (this_frame, this_prologue_cache);
1876 struct gdbarch_tdep *tdep = gdbarch_tdep (get_frame_arch (this_frame));
1877
1878 /* In functions that use alloca, the distance between the stack
1879 pointer and the frame base varies dynamically, so we can't use
1880 the SP plus static information like prologue analysis to find the
1881 frame base. However, such functions must have a frame pointer,
1882 to be able to restore the SP on exit. So whenever we do have a
1883 frame pointer, use that to find the base. */
1884 switch (p->kind)
1885 {
1886 case prologue_with_frame_ptr:
1887 {
1888 CORE_ADDR fb
1889 = get_frame_register_unsigned (this_frame, tdep->fb->num);
1890 return fb - p->frame_ptr_offset;
1891 }
1892
1893 case prologue_sans_frame_ptr:
1894 {
1895 CORE_ADDR sp
1896 = get_frame_register_unsigned (this_frame, tdep->sp->num);
1897 return sp - p->frame_size;
1898 }
1899
1900 case prologue_first_frame:
1901 return 0;
1902
1903 default:
1904 gdb_assert_not_reached ("unexpected prologue kind");
1905 }
1906 }
1907
1908
1909 static void
1910 m32c_this_id (struct frame_info *this_frame,
1911 void **this_prologue_cache,
1912 struct frame_id *this_id)
1913 {
1914 CORE_ADDR base = m32c_frame_base (this_frame, this_prologue_cache);
1915
1916 if (base)
1917 *this_id = frame_id_build (base, get_frame_func (this_frame));
1918 /* Otherwise, leave it unset, and that will terminate the backtrace. */
1919 }
1920
1921
1922 static struct value *
1923 m32c_prev_register (struct frame_info *this_frame,
1924 void **this_prologue_cache, int regnum)
1925 {
1926 struct gdbarch_tdep *tdep = gdbarch_tdep (get_frame_arch (this_frame));
1927 struct m32c_prologue *p
1928 = m32c_analyze_frame_prologue (this_frame, this_prologue_cache);
1929 CORE_ADDR frame_base = m32c_frame_base (this_frame, this_prologue_cache);
1930
1931 if (regnum == tdep->sp->num)
1932 return frame_unwind_got_constant (this_frame, regnum, frame_base);
1933
1934 /* If prologue analysis says we saved this register somewhere,
1935 return a description of the stack slot holding it. */
1936 if (p->reg_offset[regnum] != 1)
1937 return frame_unwind_got_memory (this_frame, regnum,
1938 frame_base + p->reg_offset[regnum]);
1939
1940 /* Otherwise, presume we haven't changed the value of this
1941 register, and get it from the next frame. */
1942 return frame_unwind_got_register (this_frame, regnum, regnum);
1943 }
1944
1945
1946 static const struct frame_unwind m32c_unwind = {
1947 NORMAL_FRAME,
1948 default_frame_unwind_stop_reason,
1949 m32c_this_id,
1950 m32c_prev_register,
1951 NULL,
1952 default_frame_sniffer
1953 };
1954
1955
1956 static CORE_ADDR
1957 m32c_unwind_pc (struct gdbarch *arch, struct frame_info *next_frame)
1958 {
1959 struct gdbarch_tdep *tdep = gdbarch_tdep (arch);
1960 return frame_unwind_register_unsigned (next_frame, tdep->pc->num);
1961 }
1962
1963
1964 static CORE_ADDR
1965 m32c_unwind_sp (struct gdbarch *arch, struct frame_info *next_frame)
1966 {
1967 struct gdbarch_tdep *tdep = gdbarch_tdep (arch);
1968 return frame_unwind_register_unsigned (next_frame, tdep->sp->num);
1969 }
1970
1971
1972 /* Inferior calls. */
1973
1974 /* The calling conventions, according to GCC:
1975
1976 r8c, m16c
1977 ---------
1978 First arg may be passed in r1l or r1 if it (1) fits (QImode or
1979 HImode), (2) is named, and (3) is an integer or pointer type (no
1980 structs, floats, etc). Otherwise, it's passed on the stack.
1981
1982 Second arg may be passed in r2, same restrictions (but not QImode),
1983 even if the first arg is passed on the stack.
1984
1985 Third and further args are passed on the stack. No padding is
1986 used, stack "alignment" is 8 bits.
1987
1988 m32cm, m32c
1989 -----------
1990
1991 First arg may be passed in r0l or r0, same restrictions as above.
1992
1993 Second and further args are passed on the stack. Padding is used
1994 after QImode parameters (i.e. lower-addressed byte is the value,
1995 higher-addressed byte is the padding), stack "alignment" is 16
1996 bits. */
1997
1998
1999 /* Return true if TYPE is a type that can be passed in registers. (We
2000 ignore the size, and pay attention only to the type code;
2001 acceptable sizes depends on which register is being considered to
2002 hold it.) */
2003 static int
2004 m32c_reg_arg_type (struct type *type)
2005 {
2006 enum type_code code = TYPE_CODE (type);
2007
2008 return (code == TYPE_CODE_INT
2009 || code == TYPE_CODE_ENUM
2010 || code == TYPE_CODE_PTR
2011 || TYPE_IS_REFERENCE (type)
2012 || code == TYPE_CODE_BOOL
2013 || code == TYPE_CODE_CHAR);
2014 }
2015
2016
2017 static CORE_ADDR
2018 m32c_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
2019 struct regcache *regcache, CORE_ADDR bp_addr, int nargs,
2020 struct value **args, CORE_ADDR sp, int struct_return,
2021 CORE_ADDR struct_addr)
2022 {
2023 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2024 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
2025 unsigned long mach = gdbarch_bfd_arch_info (gdbarch)->mach;
2026 CORE_ADDR cfa;
2027 int i;
2028
2029 /* The number of arguments given in this function's prototype, or
2030 zero if it has a non-prototyped function type. The m32c ABI
2031 passes arguments mentioned in the prototype differently from
2032 those in the ellipsis of a varargs function, or from those passed
2033 to a non-prototyped function. */
2034 int num_prototyped_args = 0;
2035
2036 {
2037 struct type *func_type = value_type (function);
2038
2039 /* Dereference function pointer types. */
2040 if (TYPE_CODE (func_type) == TYPE_CODE_PTR)
2041 func_type = TYPE_TARGET_TYPE (func_type);
2042
2043 gdb_assert (TYPE_CODE (func_type) == TYPE_CODE_FUNC ||
2044 TYPE_CODE (func_type) == TYPE_CODE_METHOD);
2045
2046 #if 0
2047 /* The ABI description in gcc/config/m32c/m32c.abi says that
2048 we need to handle prototyped and non-prototyped functions
2049 separately, but the code in GCC doesn't actually do so. */
2050 if (TYPE_PROTOTYPED (func_type))
2051 #endif
2052 num_prototyped_args = TYPE_NFIELDS (func_type);
2053 }
2054
2055 /* First, if the function returns an aggregate by value, push a
2056 pointer to a buffer for it. This doesn't affect the way
2057 subsequent arguments are allocated to registers. */
2058 if (struct_return)
2059 {
2060 int ptr_len = TYPE_LENGTH (tdep->ptr_voyd);
2061 sp -= ptr_len;
2062 write_memory_unsigned_integer (sp, ptr_len, byte_order, struct_addr);
2063 }
2064
2065 /* Push the arguments. */
2066 for (i = nargs - 1; i >= 0; i--)
2067 {
2068 struct value *arg = args[i];
2069 const gdb_byte *arg_bits = value_contents (arg);
2070 struct type *arg_type = value_type (arg);
2071 ULONGEST arg_size = TYPE_LENGTH (arg_type);
2072
2073 /* Can it go in r1 or r1l (for m16c) or r0 or r0l (for m32c)? */
2074 if (i == 0
2075 && arg_size <= 2
2076 && i < num_prototyped_args
2077 && m32c_reg_arg_type (arg_type))
2078 {
2079 /* Extract and re-store as an integer as a terse way to make
2080 sure it ends up in the least significant end of r1. (GDB
2081 should avoid assuming endianness, even on uni-endian
2082 processors.) */
2083 ULONGEST u = extract_unsigned_integer (arg_bits, arg_size,
2084 byte_order);
2085 struct m32c_reg *reg = (mach == bfd_mach_m16c) ? tdep->r1 : tdep->r0;
2086 regcache_cooked_write_unsigned (regcache, reg->num, u);
2087 }
2088
2089 /* Can it go in r2? */
2090 else if (mach == bfd_mach_m16c
2091 && i == 1
2092 && arg_size == 2
2093 && i < num_prototyped_args
2094 && m32c_reg_arg_type (arg_type))
2095 regcache_cooked_write (regcache, tdep->r2->num, arg_bits);
2096
2097 /* Everything else goes on the stack. */
2098 else
2099 {
2100 sp -= arg_size;
2101
2102 /* Align the stack. */
2103 if (mach == bfd_mach_m32c)
2104 sp &= ~1;
2105
2106 write_memory (sp, arg_bits, arg_size);
2107 }
2108 }
2109
2110 /* This is the CFA we use to identify the dummy frame. */
2111 cfa = sp;
2112
2113 /* Push the return address. */
2114 sp -= tdep->ret_addr_bytes;
2115 write_memory_unsigned_integer (sp, tdep->ret_addr_bytes, byte_order,
2116 bp_addr);
2117
2118 /* Update the stack pointer. */
2119 regcache_cooked_write_unsigned (regcache, tdep->sp->num, sp);
2120
2121 /* We need to borrow an odd trick from the i386 target here.
2122
2123 The value we return from this function gets used as the stack
2124 address (the CFA) for the dummy frame's ID. The obvious thing is
2125 to return the new TOS. However, that points at the return
2126 address, saved on the stack, which is inconsistent with the CFA's
2127 described by GCC's DWARF 2 .debug_frame information: DWARF 2
2128 .debug_frame info uses the address immediately after the saved
2129 return address. So you end up with a dummy frame whose CFA
2130 points at the return address, but the frame for the function
2131 being called has a CFA pointing after the return address: the
2132 younger CFA is *greater than* the older CFA. The sanity checks
2133 in frame.c don't like that.
2134
2135 So we try to be consistent with the CFA's used by DWARF 2.
2136 Having a dummy frame and a real frame with the *same* CFA is
2137 tolerable. */
2138 return cfa;
2139 }
2140
2141
2142 static struct frame_id
2143 m32c_dummy_id (struct gdbarch *gdbarch, struct frame_info *this_frame)
2144 {
2145 /* This needs to return a frame ID whose PC is the return address
2146 passed to m32c_push_dummy_call, and whose stack_addr is the SP
2147 m32c_push_dummy_call returned.
2148
2149 m32c_unwind_sp gives us the CFA, which is the value the SP had
2150 before the return address was pushed. */
2151 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2152 CORE_ADDR sp = get_frame_register_unsigned (this_frame, tdep->sp->num);
2153 return frame_id_build (sp, get_frame_pc (this_frame));
2154 }
2155
2156
2157
2158 /* Return values. */
2159
2160 /* Return value conventions, according to GCC:
2161
2162 r8c, m16c
2163 ---------
2164
2165 QImode in r0l
2166 HImode in r0
2167 SImode in r2r0
2168 near pointer in r0
2169 far pointer in r2r0
2170
2171 Aggregate values (regardless of size) are returned by pushing a
2172 pointer to a temporary area on the stack after the args are pushed.
2173 The function fills in this area with the value. Note that this
2174 pointer on the stack does not affect how register arguments, if any,
2175 are configured.
2176
2177 m32cm, m32c
2178 -----------
2179 Same. */
2180
2181 /* Return non-zero if values of type TYPE are returned by storing them
2182 in a buffer whose address is passed on the stack, ahead of the
2183 other arguments. */
2184 static int
2185 m32c_return_by_passed_buf (struct type *type)
2186 {
2187 enum type_code code = TYPE_CODE (type);
2188
2189 return (code == TYPE_CODE_STRUCT
2190 || code == TYPE_CODE_UNION);
2191 }
2192
2193 static enum return_value_convention
2194 m32c_return_value (struct gdbarch *gdbarch,
2195 struct value *function,
2196 struct type *valtype,
2197 struct regcache *regcache,
2198 gdb_byte *readbuf,
2199 const gdb_byte *writebuf)
2200 {
2201 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2202 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
2203 enum return_value_convention conv;
2204 ULONGEST valtype_len = TYPE_LENGTH (valtype);
2205
2206 if (m32c_return_by_passed_buf (valtype))
2207 conv = RETURN_VALUE_STRUCT_CONVENTION;
2208 else
2209 conv = RETURN_VALUE_REGISTER_CONVENTION;
2210
2211 if (readbuf)
2212 {
2213 /* We should never be called to find values being returned by
2214 RETURN_VALUE_STRUCT_CONVENTION. Those can't be located,
2215 unless we made the call ourselves. */
2216 gdb_assert (conv == RETURN_VALUE_REGISTER_CONVENTION);
2217
2218 gdb_assert (valtype_len <= 8);
2219
2220 /* Anything that fits in r0 is returned there. */
2221 if (valtype_len <= TYPE_LENGTH (tdep->r0->type))
2222 {
2223 ULONGEST u;
2224 regcache_cooked_read_unsigned (regcache, tdep->r0->num, &u);
2225 store_unsigned_integer (readbuf, valtype_len, byte_order, u);
2226 }
2227 else
2228 {
2229 /* Everything else is passed in mem0, using as many bytes as
2230 needed. This is not what the Renesas tools do, but it's
2231 what GCC does at the moment. */
2232 struct bound_minimal_symbol mem0
2233 = lookup_minimal_symbol ("mem0", NULL, NULL);
2234
2235 if (! mem0.minsym)
2236 error (_("The return value is stored in memory at 'mem0', "
2237 "but GDB cannot find\n"
2238 "its address."));
2239 read_memory (BMSYMBOL_VALUE_ADDRESS (mem0), readbuf, valtype_len);
2240 }
2241 }
2242
2243 if (writebuf)
2244 {
2245 /* We should never be called to store values to be returned
2246 using RETURN_VALUE_STRUCT_CONVENTION. We have no way of
2247 finding the buffer, unless we made the call ourselves. */
2248 gdb_assert (conv == RETURN_VALUE_REGISTER_CONVENTION);
2249
2250 gdb_assert (valtype_len <= 8);
2251
2252 /* Anything that fits in r0 is returned there. */
2253 if (valtype_len <= TYPE_LENGTH (tdep->r0->type))
2254 {
2255 ULONGEST u = extract_unsigned_integer (writebuf, valtype_len,
2256 byte_order);
2257 regcache_cooked_write_unsigned (regcache, tdep->r0->num, u);
2258 }
2259 else
2260 {
2261 /* Everything else is passed in mem0, using as many bytes as
2262 needed. This is not what the Renesas tools do, but it's
2263 what GCC does at the moment. */
2264 struct bound_minimal_symbol mem0
2265 = lookup_minimal_symbol ("mem0", NULL, NULL);
2266
2267 if (! mem0.minsym)
2268 error (_("The return value is stored in memory at 'mem0', "
2269 "but GDB cannot find\n"
2270 " its address."));
2271 write_memory (BMSYMBOL_VALUE_ADDRESS (mem0), writebuf, valtype_len);
2272 }
2273 }
2274
2275 return conv;
2276 }
2277
2278
2279
2280 /* Trampolines. */
2281
2282 /* The m16c and m32c use a trampoline function for indirect function
2283 calls. An indirect call looks like this:
2284
2285 ... push arguments ...
2286 ... push target function address ...
2287 jsr.a m32c_jsri16
2288
2289 The code for m32c_jsri16 looks like this:
2290
2291 m32c_jsri16:
2292
2293 # Save return address.
2294 pop.w m32c_jsri_ret
2295 pop.b m32c_jsri_ret+2
2296
2297 # Store target function address.
2298 pop.w m32c_jsri_addr
2299
2300 # Re-push return address.
2301 push.b m32c_jsri_ret+2
2302 push.w m32c_jsri_ret
2303
2304 # Call the target function.
2305 jmpi.a m32c_jsri_addr
2306
2307 Without further information, GDB will treat calls to m32c_jsri16
2308 like calls to any other function. Since m32c_jsri16 doesn't have
2309 debugging information, that normally means that GDB sets a step-
2310 resume breakpoint and lets the program continue --- which is not
2311 what the user wanted. (Giving the trampoline debugging info
2312 doesn't help: the user expects the program to stop in the function
2313 their program is calling, not in some trampoline code they've never
2314 seen before.)
2315
2316 The gdbarch_skip_trampoline_code method tells GDB how to step
2317 through such trampoline functions transparently to the user. When
2318 given the address of a trampoline function's first instruction,
2319 gdbarch_skip_trampoline_code should return the address of the first
2320 instruction of the function really being called. If GDB decides it
2321 wants to step into that function, it will set a breakpoint there
2322 and silently continue to it.
2323
2324 We recognize the trampoline by name, and extract the target address
2325 directly from the stack. This isn't great, but recognizing by its
2326 code sequence seems more fragile. */
2327
2328 static CORE_ADDR
2329 m32c_skip_trampoline_code (struct frame_info *frame, CORE_ADDR stop_pc)
2330 {
2331 struct gdbarch *gdbarch = get_frame_arch (frame);
2332 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2333 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
2334
2335 /* It would be nicer to simply look up the addresses of known
2336 trampolines once, and then compare stop_pc with them. However,
2337 we'd need to ensure that that cached address got invalidated when
2338 someone loaded a new executable, and I'm not quite sure of the
2339 best way to do that. find_pc_partial_function does do some
2340 caching, so we'll see how this goes. */
2341 const char *name;
2342 CORE_ADDR start, end;
2343
2344 if (find_pc_partial_function (stop_pc, &name, &start, &end))
2345 {
2346 /* Are we stopped at the beginning of the trampoline function? */
2347 if (strcmp (name, "m32c_jsri16") == 0
2348 && stop_pc == start)
2349 {
2350 /* Get the stack pointer. The return address is at the top,
2351 and the target function's address is just below that. We
2352 know it's a two-byte address, since the trampoline is
2353 m32c_jsri*16*. */
2354 CORE_ADDR sp = get_frame_sp (get_current_frame ());
2355 CORE_ADDR target
2356 = read_memory_unsigned_integer (sp + tdep->ret_addr_bytes,
2357 2, byte_order);
2358
2359 /* What we have now is the address of a jump instruction.
2360 What we need is the destination of that jump.
2361 The opcode is 1 byte, and the destination is the next 3 bytes. */
2362
2363 target = read_memory_unsigned_integer (target + 1, 3, byte_order);
2364 return target;
2365 }
2366 }
2367
2368 return 0;
2369 }
2370
2371
2372 /* Address/pointer conversions. */
2373
2374 /* On the m16c, there is a 24-bit address space, but only a very few
2375 instructions can generate addresses larger than 0xffff: jumps,
2376 jumps to subroutines, and the lde/std (load/store extended)
2377 instructions.
2378
2379 Since GCC can only support one size of pointer, we can't have
2380 distinct 'near' and 'far' pointer types; we have to pick one size
2381 for everything. If we wanted to use 24-bit pointers, then GCC
2382 would have to use lde and ste for all memory references, which
2383 would be terrible for performance and code size. So the GNU
2384 toolchain uses 16-bit pointers for everything, and gives up the
2385 ability to have pointers point outside the first 64k of memory.
2386
2387 However, as a special hack, we let the linker place functions at
2388 addresses above 0xffff, as long as it also places a trampoline in
2389 the low 64k for every function whose address is taken. Each
2390 trampoline consists of a single jmp.a instruction that jumps to the
2391 function's real entry point. Pointers to functions can be 16 bits
2392 long, even though the functions themselves are at higher addresses:
2393 the pointers refer to the trampolines, not the functions.
2394
2395 This complicates things for GDB, however: given the address of a
2396 function (from debug info or linker symbols, say) which could be
2397 anywhere in the 24-bit address space, how can we find an
2398 appropriate 16-bit value to use as a pointer to it?
2399
2400 If the linker has not generated a trampoline for the function,
2401 we're out of luck. Well, I guess we could malloc some space and
2402 write a jmp.a instruction to it, but I'm not going to get into that
2403 at the moment.
2404
2405 If the linker has generated a trampoline for the function, then it
2406 also emitted a symbol for the trampoline: if the function's linker
2407 symbol is named NAME, then the function's trampoline's linker
2408 symbol is named NAME.plt.
2409
2410 So, given a code address:
2411 - We try to find a linker symbol at that address.
2412 - If we find such a symbol named NAME, we look for a linker symbol
2413 named NAME.plt.
2414 - If we find such a symbol, we assume it is a trampoline, and use
2415 its address as the pointer value.
2416
2417 And, given a function pointer:
2418 - We try to find a linker symbol at that address named NAME.plt.
2419 - If we find such a symbol, we look for a linker symbol named NAME.
2420 - If we find that, we provide that as the function's address.
2421 - If any of the above steps fail, we return the original address
2422 unchanged; it might really be a function in the low 64k.
2423
2424 See? You *knew* there was a reason you wanted to be a computer
2425 programmer! :) */
2426
2427 static void
2428 m32c_m16c_address_to_pointer (struct gdbarch *gdbarch,
2429 struct type *type, gdb_byte *buf, CORE_ADDR addr)
2430 {
2431 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
2432 enum type_code target_code;
2433 gdb_assert (TYPE_CODE (type) == TYPE_CODE_PTR || TYPE_IS_REFERENCE (type));
2434
2435 target_code = TYPE_CODE (TYPE_TARGET_TYPE (type));
2436
2437 if (target_code == TYPE_CODE_FUNC || target_code == TYPE_CODE_METHOD)
2438 {
2439 const char *func_name;
2440 char *tramp_name;
2441 struct bound_minimal_symbol tramp_msym;
2442
2443 /* Try to find a linker symbol at this address. */
2444 struct bound_minimal_symbol func_msym
2445 = lookup_minimal_symbol_by_pc (addr);
2446
2447 if (! func_msym.minsym)
2448 error (_("Cannot convert code address %s to function pointer:\n"
2449 "couldn't find a symbol at that address, to find trampoline."),
2450 paddress (gdbarch, addr));
2451
2452 func_name = MSYMBOL_LINKAGE_NAME (func_msym.minsym);
2453 tramp_name = (char *) xmalloc (strlen (func_name) + 5);
2454 strcpy (tramp_name, func_name);
2455 strcat (tramp_name, ".plt");
2456
2457 /* Try to find a linker symbol for the trampoline. */
2458 tramp_msym = lookup_minimal_symbol (tramp_name, NULL, NULL);
2459
2460 /* We've either got another copy of the name now, or don't need
2461 the name any more. */
2462 xfree (tramp_name);
2463
2464 if (! tramp_msym.minsym)
2465 {
2466 CORE_ADDR ptrval;
2467
2468 /* No PLT entry found. Mask off the upper bits of the address
2469 to make a pointer. As noted in the warning to the user
2470 below, this value might be useful if converted back into
2471 an address by GDB, but will otherwise, almost certainly,
2472 be garbage.
2473
2474 Using this masked result does seem to be useful
2475 in gdb.cp/cplusfuncs.exp in which ~40 FAILs turn into
2476 PASSes. These results appear to be correct as well.
2477
2478 We print a warning here so that the user can make a
2479 determination about whether the result is useful or not. */
2480 ptrval = addr & 0xffff;
2481
2482 warning (_("Cannot convert code address %s to function pointer:\n"
2483 "couldn't find trampoline named '%s.plt'.\n"
2484 "Returning pointer value %s instead; this may produce\n"
2485 "a useful result if converted back into an address by GDB,\n"
2486 "but will most likely not be useful otherwise.\n"),
2487 paddress (gdbarch, addr), func_name,
2488 paddress (gdbarch, ptrval));
2489
2490 addr = ptrval;
2491
2492 }
2493 else
2494 {
2495 /* The trampoline's address is our pointer. */
2496 addr = BMSYMBOL_VALUE_ADDRESS (tramp_msym);
2497 }
2498 }
2499
2500 store_unsigned_integer (buf, TYPE_LENGTH (type), byte_order, addr);
2501 }
2502
2503
2504 static CORE_ADDR
2505 m32c_m16c_pointer_to_address (struct gdbarch *gdbarch,
2506 struct type *type, const gdb_byte *buf)
2507 {
2508 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
2509 CORE_ADDR ptr;
2510 enum type_code target_code;
2511
2512 gdb_assert (TYPE_CODE (type) == TYPE_CODE_PTR || TYPE_IS_REFERENCE (type));
2513
2514 ptr = extract_unsigned_integer (buf, TYPE_LENGTH (type), byte_order);
2515
2516 target_code = TYPE_CODE (TYPE_TARGET_TYPE (type));
2517
2518 if (target_code == TYPE_CODE_FUNC || target_code == TYPE_CODE_METHOD)
2519 {
2520 /* See if there is a minimal symbol at that address whose name is
2521 "NAME.plt". */
2522 struct bound_minimal_symbol ptr_msym = lookup_minimal_symbol_by_pc (ptr);
2523
2524 if (ptr_msym.minsym)
2525 {
2526 const char *ptr_msym_name = MSYMBOL_LINKAGE_NAME (ptr_msym.minsym);
2527 int len = strlen (ptr_msym_name);
2528
2529 if (len > 4
2530 && strcmp (ptr_msym_name + len - 4, ".plt") == 0)
2531 {
2532 struct bound_minimal_symbol func_msym;
2533 /* We have a .plt symbol; try to find the symbol for the
2534 corresponding function.
2535
2536 Since the trampoline contains a jump instruction, we
2537 could also just extract the jump's target address. I
2538 don't see much advantage one way or the other. */
2539 char *func_name = (char *) xmalloc (len - 4 + 1);
2540 memcpy (func_name, ptr_msym_name, len - 4);
2541 func_name[len - 4] = '\0';
2542 func_msym
2543 = lookup_minimal_symbol (func_name, NULL, NULL);
2544
2545 /* If we do have such a symbol, return its value as the
2546 function's true address. */
2547 if (func_msym.minsym)
2548 ptr = BMSYMBOL_VALUE_ADDRESS (func_msym);
2549 }
2550 }
2551 else
2552 {
2553 int aspace;
2554
2555 for (aspace = 1; aspace <= 15; aspace++)
2556 {
2557 ptr_msym = lookup_minimal_symbol_by_pc ((aspace << 16) | ptr);
2558
2559 if (ptr_msym.minsym)
2560 ptr |= aspace << 16;
2561 }
2562 }
2563 }
2564
2565 return ptr;
2566 }
2567
2568 static void
2569 m32c_virtual_frame_pointer (struct gdbarch *gdbarch, CORE_ADDR pc,
2570 int *frame_regnum,
2571 LONGEST *frame_offset)
2572 {
2573 const char *name;
2574 CORE_ADDR func_addr, func_end;
2575 struct m32c_prologue p;
2576
2577 struct regcache *regcache = get_current_regcache ();
2578 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2579
2580 if (!find_pc_partial_function (pc, &name, &func_addr, &func_end))
2581 internal_error (__FILE__, __LINE__,
2582 _("No virtual frame pointer available"));
2583
2584 m32c_analyze_prologue (gdbarch, func_addr, pc, &p);
2585 switch (p.kind)
2586 {
2587 case prologue_with_frame_ptr:
2588 *frame_regnum = m32c_banked_register (tdep->fb, regcache)->num;
2589 *frame_offset = p.frame_ptr_offset;
2590 break;
2591 case prologue_sans_frame_ptr:
2592 *frame_regnum = m32c_banked_register (tdep->sp, regcache)->num;
2593 *frame_offset = p.frame_size;
2594 break;
2595 default:
2596 *frame_regnum = m32c_banked_register (tdep->sp, regcache)->num;
2597 *frame_offset = 0;
2598 break;
2599 }
2600 /* Sanity check */
2601 if (*frame_regnum > gdbarch_num_regs (gdbarch))
2602 internal_error (__FILE__, __LINE__,
2603 _("No virtual frame pointer available"));
2604 }
2605
2606
2607 /* Initialization. */
2608
2609 static struct gdbarch *
2610 m32c_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
2611 {
2612 struct gdbarch *gdbarch;
2613 struct gdbarch_tdep *tdep;
2614 unsigned long mach = info.bfd_arch_info->mach;
2615
2616 /* Find a candidate among the list of architectures we've created
2617 already. */
2618 for (arches = gdbarch_list_lookup_by_info (arches, &info);
2619 arches != NULL;
2620 arches = gdbarch_list_lookup_by_info (arches->next, &info))
2621 return arches->gdbarch;
2622
2623 tdep = XCNEW (struct gdbarch_tdep);
2624 gdbarch = gdbarch_alloc (&info, tdep);
2625
2626 /* Essential types. */
2627 make_types (gdbarch);
2628
2629 /* Address/pointer conversions. */
2630 if (mach == bfd_mach_m16c)
2631 {
2632 set_gdbarch_address_to_pointer (gdbarch, m32c_m16c_address_to_pointer);
2633 set_gdbarch_pointer_to_address (gdbarch, m32c_m16c_pointer_to_address);
2634 }
2635
2636 /* Register set. */
2637 make_regs (gdbarch);
2638
2639 /* Breakpoints. */
2640 set_gdbarch_breakpoint_kind_from_pc (gdbarch, m32c_breakpoint::kind_from_pc);
2641 set_gdbarch_sw_breakpoint_from_kind (gdbarch, m32c_breakpoint::bp_from_kind);
2642
2643 /* Prologue analysis and unwinding. */
2644 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
2645 set_gdbarch_skip_prologue (gdbarch, m32c_skip_prologue);
2646 set_gdbarch_unwind_pc (gdbarch, m32c_unwind_pc);
2647 set_gdbarch_unwind_sp (gdbarch, m32c_unwind_sp);
2648 #if 0
2649 /* I'm dropping the dwarf2 sniffer because it has a few problems.
2650 They may be in the dwarf2 cfi code in GDB, or they may be in
2651 the debug info emitted by the upstream toolchain. I don't
2652 know which, but I do know that the prologue analyzer works better.
2653 MVS 04/13/06 */
2654 dwarf2_append_sniffers (gdbarch);
2655 #endif
2656 frame_unwind_append_unwinder (gdbarch, &m32c_unwind);
2657
2658 /* Inferior calls. */
2659 set_gdbarch_push_dummy_call (gdbarch, m32c_push_dummy_call);
2660 set_gdbarch_return_value (gdbarch, m32c_return_value);
2661 set_gdbarch_dummy_id (gdbarch, m32c_dummy_id);
2662
2663 /* Trampolines. */
2664 set_gdbarch_skip_trampoline_code (gdbarch, m32c_skip_trampoline_code);
2665
2666 set_gdbarch_virtual_frame_pointer (gdbarch, m32c_virtual_frame_pointer);
2667
2668 /* m32c function boundary addresses are not necessarily even.
2669 Therefore, the `vbit', which indicates a pointer to a virtual
2670 member function, is stored in the delta field, rather than as
2671 the low bit of a function pointer address.
2672
2673 In order to verify this, see the definition of
2674 TARGET_PTRMEMFUNC_VBIT_LOCATION in gcc/defaults.h along with the
2675 definition of FUNCTION_BOUNDARY in gcc/config/m32c/m32c.h. */
2676 set_gdbarch_vbit_in_delta (gdbarch, 1);
2677
2678 return gdbarch;
2679 }
2680
2681 void
2682 _initialize_m32c_tdep (void)
2683 {
2684 register_gdbarch_init (bfd_arch_m32c, m32c_gdbarch_init);
2685
2686 m32c_dma_reggroup = reggroup_new ("dma", USER_REGGROUP);
2687 }
reggroup_add
void reggroup_add(struct gdbarch *gdbarch, struct reggroup *group)
Definition: reggroups.c:117
m32c_pv_enter
static int m32c_pv_enter(struct m32c_pv_state *state, int size)
Definition: m32c-tdep.c:1346
set_gdbarch_num_regs
void set_gdbarch_num_regs(struct gdbarch *gdbarch, int num_regs)
Definition: gdbarch.c:2050
m32c_pv_state::fb
pv_t fb
Definition: m32c-tdep.c:1065
gdbarch
Definition: gdbarch.c:127
M32C_MAX_NUM_REGS
#define M32C_MAX_NUM_REGS
Definition: m32c-tdep.c:100
pv_area::store_would_trash
bool store_would_trash(pv_t addr)
Definition: prologue-value.c:345
m32c_m16c_address_to_pointer
static void m32c_m16c_address_to_pointer(struct gdbarch *gdbarch, struct type *type, gdb_byte *buf, CORE_ADDR addr)
Definition: m32c-tdep.c:2428
m32c_get_src23
static int m32c_get_src23(unsigned char *i)
Definition: m32c-tdep.c:1208
read
ssize_t read(int fd, void *buf, size_t count)
Definition: expect-read1.c:26
m32c_r3r2r1r0_read
static m32c_read_reg_t m32c_r3r2r1r0_read
Definition: m32c-tdep.c:302
m32c_sb_write
static m32c_write_reg_t m32c_sb_write
Definition: m32c-tdep.c:306
TYPE_CODE_BOOL
Definition: gdbtypes.h:164
gdbarch_tdep::a0
struct m32c_reg * a0
Definition: m32c-tdep.c:117
CCAT
#define CCAT(high, low, type)
Definition: m32c-tdep.c:787
extract_bp_kind::loc
gdbarch_tdep::sb
struct m32c_reg * sb
Definition: m32c-tdep.c:119
type_code
type_code
Definition: gdbtypes.h:80
m32c_unwind_sp
static CORE_ADDR m32c_unwind_sp(struct gdbarch *arch, struct frame_info *next_frame)
Definition: m32c-tdep.c:1965
frame_id_build
struct frame_id frame_id_build(CORE_ADDR stack_addr, CORE_ADDR code_addr)
Definition: frame.c:624
m32c_pv_state::a1
pv_t a1
Definition: m32c-tdep.c:1064
arch_type
struct type * arch_type(struct gdbarch *gdbarch, enum type_code code, int bit, const char *name)
Definition: gdbtypes.c:4941
gdbarch_tdep::ptr_voyd
struct type * ptr_voyd
Definition: m32c-tdep.c:128
m32c_frame_base
static CORE_ADDR m32c_frame_base(struct frame_info *this_frame, void **this_prologue_cache)
Definition: m32c-tdep.c:1871
REG_VALID
Definition: common-regcache.h:32
m32c_pv_state::pc
pv_t pc
Definition: m32c-tdep.c:1066
TYPE_CODE_ENUM
Definition: gdbtypes.h:108
m32c_pv_state::r1
pv_t r1
Definition: m32c-tdep.c:1063
m32c_banked_write
static m32c_write_reg_t m32c_banked_write
Definition: m32c-tdep.c:305
get_frame_pc
CORE_ADDR get_frame_pc(struct frame_info *frame)
Definition: frame.c:2376
MSYMBOL_LINKAGE_NAME
#define MSYMBOL_LINKAGE_NAME(symbol)
Definition: symtab.h:707
reg::name
const char * name
Definition: regdef.h:25
get_current_frame
struct frame_info * get_current_frame(void)
Definition: frame.c:1563
CORE_ADDR
bfd_vma CORE_ADDR
Definition: common-types.h:41
m32c_skip_trampoline_code
static CORE_ADDR m32c_skip_trampoline_code(struct frame_info *frame, CORE_ADDR stop_pc)
Definition: m32c-tdep.c:2329
m32c_part_write
static m32c_write_reg_t m32c_part_write
Definition: m32c-tdep.c:307
reggroup_new
struct reggroup * reggroup_new(const char *name, enum reggroup_type type)
Definition: reggroups.c:40
pv_add_constant
pv_t pv_add_constant(pv_t v, CORE_ADDR k)
Definition: prologue-value.c:105
gdbarch_tdep::fb
struct m32c_reg * fb
Definition: m32c-tdep.c:119
m32c_virtual_frame_pointer
static void m32c_virtual_frame_pointer(struct gdbarch *gdbarch, CORE_ADDR pc, int *frame_regnum, LONGEST *frame_offset)
Definition: m32c-tdep.c:2569
xfree
void xfree(void *)
BP_MANIPULATION
typedef BP_MANIPULATION(m32c_break_insn)
Definition: m32c-tdep.c:995
frame_unwind_got_memory
struct value * frame_unwind_got_memory(struct frame_info *frame, int regnum, CORE_ADDR addr)
Definition: frame-unwind.c:233
write_memory_unsigned_integer
void write_memory_unsigned_integer(CORE_ADDR addr, int len, enum bfd_endian byte_order, ULONGEST value)
Definition: corefile.c:417
BMSYMBOL_VALUE_ADDRESS
#define BMSYMBOL_VALUE_ADDRESS(symbol)
Definition: symtab.h:691
m32c_reg_arg_type
static int m32c_reg_arg_type(struct type *type)
Definition: m32c-tdep.c:2004
func_type
Definition: gdbtypes.h:1059
gdbarch_tdep::data_addr_reg_type
struct type * data_addr_reg_type
Definition: m32c-tdep.c:133
set_gdbarch_skip_trampoline_code
void set_gdbarch_skip_trampoline_code(struct gdbarch *gdbarch, gdbarch_skip_trampoline_code_ftype skip_trampoline_code)
Definition: gdbarch.c:3316
warning
void warning(const char *fmt,...)
Definition: errors.c:26
m32c_dma_reggroup
static struct reggroup * m32c_dma_reggroup
Definition: m32c-tdep.c:43
set_gdbarch_stab_reg_to_regnum
void set_gdbarch_stab_reg_to_regnum(struct gdbarch *gdbarch, gdbarch_stab_reg_to_regnum_ftype stab_reg_to_regnum)
Definition: gdbarch.c:2224
gdbarch_tdep::r2
struct m32c_reg * r2
Definition: m32c-tdep.c:117
gdbarch_ptr_bit
int gdbarch_ptr_bit(struct gdbarch *gdbarch)
Definition: gdbarch.c:1831
RETURN_VALUE_STRUCT_CONVENTION
Definition: defs.h:258
prologue-value.h
m32c_srcdest_store
static int m32c_srcdest_store(struct m32c_pv_state *state, struct srcdest loc, pv_t value, int size)
Definition: m32c-tdep.c:1129
frame_unwind_register_unsigned
ULONGEST frame_unwind_register_unsigned(struct frame_info *frame, int regnum)
Definition: frame.c:1279
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pv_t a0
Definition: m32c-tdep.c:1064
mark_general
static struct m32c_reg * mark_general(struct m32c_reg *reg)
Definition: m32c-tdep.c:685
reggroups.h
m32c_prologue::reg_offset
LONGEST reg_offset[M32C_MAX_NUM_REGS]
Definition: m32c-tdep.c:1052
prologue_value
Definition: prologue-value.h:140
get_frame_sp
CORE_ADDR get_frame_sp(struct frame_info *this_frame)
Definition: frame.c:2782
TYPE_CODE_INT
Definition: gdbtypes.h:111
pv_is_register
int pv_is_register(pv_t a, int r)
Definition: prologue-value.c:216
memset
void * memset(T *s, int c, size_t n)=delete
internal_error
void internal_error(const char *file, int line, const char *fmt,...)
Definition: errors.c:50
m32c_unwind
static const struct frame_unwind m32c_unwind
Definition: m32c-tdep.c:1946
gdbarch_tdep::pc
struct m32c_reg * pc
Definition: m32c-tdep.c:116
gdbarch_tdep
Definition: aarch64-tdep.h:55
return_value_convention
return_value_convention
Definition: defs.h:247
srcdest_mem
Definition: m32c-tdep.c:1096
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int num_regs
Definition: m32c-tdep.c:113
set_gdbarch_register_reggroup_p
void set_gdbarch_register_reggroup_p(struct gdbarch *gdbarch, gdbarch_register_reggroup_p_ftype register_reggroup_p)
Definition: gdbarch.c:3599
FLAGBIT_U
#define FLAGBIT_U
Definition: m32c-tdep.c:720
frame_info
Definition: frame.c:85
regcache_cooked_write_part
void regcache_cooked_write_part(struct regcache *regcache, int regnum, int offset, int len, const gdb_byte *buf)
Definition: regcache.c:987
gdbarch_list_lookup_by_info
struct gdbarch_list * gdbarch_list_lookup_by_info(struct gdbarch_list *arches, const struct gdbarch_info *info)
Definition: gdbarch.c:5309
register_status
register_status
Definition: common-regcache.h:25
skip_prologue_using_sal
CORE_ADDR skip_prologue_using_sal(struct gdbarch *gdbarch, CORE_ADDR func_addr)
Definition: symtab.c:3854
gdbarch_list::next
struct gdbarch_list * next
Definition: gdbarch.h:1623
restore_reggroup
struct reggroup *const restore_reggroup
Definition: reggroups.c:320
m32c_pseudo_register_write
static void m32c_pseudo_register_write(struct gdbarch *arch, struct regcache *cache, int cookednum, const gdb_byte *buf)
Definition: m32c-tdep.c:610
gdbarch_num_regs
int gdbarch_num_regs(struct gdbarch *gdbarch)
Definition: gdbarch.c:2039
check_for_saved
static void check_for_saved(void *prologue_untyped, pv_t addr, CORE_ADDR size, pv_t value)
Definition: m32c-tdep.c:1502
all_reggroup
struct reggroup *const all_reggroup
Definition: reggroups.c:318
_
#define _(String)
Definition: gdb_locale.h:35
gdbarch_info::bfd_arch_info
const struct bfd_arch_info * bfd_arch_info
Definition: gdbarch.h:1629
m32c_write_reg_t
enum register_status() m32c_write_reg_t(struct m32c_reg *reg, struct regcache *cache, const gdb_byte *buf)
prologue_value::k
CORE_ADDR k
Definition: prologue-value.h:149
set_gdbarch_dwarf2_reg_to_regnum
void set_gdbarch_dwarf2_reg_to_regnum(struct gdbarch *gdbarch, gdbarch_dwarf2_reg_to_regnum_ftype dwarf2_reg_to_regnum)
Definition: gdbarch.c:2275
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pv_t pv_unknown(void)
Definition: prologue-value.c:27
defs.h
gdbarch_tdep::dwarf_regs
struct m32c_reg * dwarf_regs[M32C_MAX_DWARF_REGNUM+1]
Definition: m32c-tdep.c:123
m32c_sdisp16
static int m32c_sdisp16(struct m32c_pv_state *st)
Definition: m32c-tdep.c:1186
m32c_read_flg
static int m32c_read_flg(struct regcache *cache)
Definition: m32c-tdep.c:332
bits
#define bits(obj, st, fn)
Definition: aarch64-tdep.c:64
gdbarch_tdep
struct gdbarch_tdep * gdbarch_tdep(struct gdbarch *gdbarch)
Definition: gdbarch.c:1491
gdbarch_tdep::int8
struct type * int8
Definition: m32c-tdep.c:130
TYPE_PROTOTYPED
#define TYPE_PROTOTYPED(t)
Definition: gdbtypes.h:232
m32c_register_sim_regno
static int m32c_register_sim_regno(struct gdbarch *gdbarch, int reg_nr)
Definition: m32c-tdep.c:235
gdbarch_tdep::r0
struct m32c_reg * r0
Definition: m32c-tdep.c:117
RA
#define RA(name)
Definition: m32c-tdep.c:741
reggroup
Definition: reggroups.c:33
m32c_reg::arch
struct gdbarch * arch
Definition: m32c-tdep.c:66
frame_unwind_append_unwinder
void frame_unwind_append_unwinder(struct gdbarch *gdbarch, const struct frame_unwind *unwinder)
Definition: frame-unwind.c:79
pv_constant
pv_t pv_constant(CORE_ADDR k)
Definition: prologue-value.c:36
get_current_regcache
struct regcache * get_current_regcache(void)
Definition: regcache.c:446
m32c_is_arg_spill
static int m32c_is_arg_spill(struct m32c_pv_state *st, struct srcdest loc, pv_t value)
Definition: m32c-tdep.c:1435
m32c_break_insn
constexpr gdb_byte m32c_break_insn[]
Definition: m32c-tdep.c:993
FRAME_OBSTACK_ZALLOC
#define FRAME_OBSTACK_ZALLOC(TYPE)
Definition: frame.h:678
m32c_is_arg_reg
static int m32c_is_arg_reg(struct m32c_pv_state *state, pv_t value)
Definition: m32c-tdep.c:1414
srcdest::kind
enum srcdest_kind kind
Definition: m32c-tdep.c:1107
paddress
const char * paddress(struct gdbarch *gdbarch, CORE_ADDR addr)
Definition: utils.c:2745
objfiles.h
arch_integer_type
struct type * arch_integer_type(struct gdbarch *gdbarch, int bit, int unsigned_p, const char *name)
Definition: gdbtypes.c:4962
arch-utils.h
frame_unwind_got_constant
struct value * frame_unwind_got_constant(struct frame_info *frame, int regnum, ULONGEST val)
Definition: frame-unwind.c:246
TYPE_IS_REFERENCE
#define TYPE_IS_REFERENCE(t)
Definition: gdbtypes.h:332
pv_is_identical
int pv_is_identical(pv_t a, pv_t b)
Definition: prologue-value.c:189
m32c_this_id
static void m32c_this_id(struct frame_info *this_frame, void **this_prologue_cache, struct frame_id *this_id)
Definition: m32c-tdep.c:1910
TYPE_CODE_VOID
Definition: gdbtypes.h:124
symtab.h
set_gdbarch_addr_bit
void set_gdbarch_addr_bit(struct gdbarch *gdbarch, int addr_bit)
Definition: gdbarch.c:1859
gdbarch_tdep::r3r2r1r0
struct m32c_reg * r3r2r1r0
Definition: m32c-tdep.c:118
m32c_cat_write
static m32c_write_reg_t m32c_cat_write
Definition: m32c-tdep.c:308
dwarf2expr.h
name
const char *const name
Definition: aarch64-tdep.c:76
RBA
#define RBA(name)
Definition: m32c-tdep.c:763
make_types
static void make_types(struct gdbarch *arch)
Definition: m32c-tdep.c:148
pvk_register
Definition: prologue-value.h:40
set_gdbarch_pseudo_register_write
void set_gdbarch_pseudo_register_write(struct gdbarch *gdbarch, gdbarch_pseudo_register_write_ftype pseudo_register_write)
Definition: gdbarch.c:2032
set_dwarf_regnum
static void set_dwarf_regnum(struct m32c_reg *reg, int num)
Definition: m32c-tdep.c:669
set_gdbarch_register_type
void set_gdbarch_register_type(struct gdbarch *gdbarch, gdbarch_register_type_ftype register_type)
Definition: gdbarch.c:2316
NORMAL_FRAME
Definition: frame.h:244
value_contents
const gdb_byte * value_contents(struct value *value)
Definition: value.c:1407
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struct reggroup *const general_reggroup
Definition: reggroups.c:314
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int num
Definition: m32c-tdep.c:69
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static void make_regs(struct gdbarch *arch)
Definition: m32c-tdep.c:799
TYPE_CODE_CHAR
Definition: gdbtypes.h:160
M32C_MAX_INSN_LEN
#define M32C_MAX_INSN_LEN
Definition: m32c-tdep.c:1057
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struct type * int16
Definition: m32c-tdep.c:130
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static struct srcdest m32c_decode_srcdest4(struct m32c_pv_state *st, int code, int size)
Definition: m32c-tdep.c:1225
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struct m32c_reg * ry
Definition: m32c-tdep.c:91
srcdest::addr
pv_t addr
Definition: m32c-tdep.c:1108
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struct value::@186::@187 reg
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pv_t r3
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static int m32c_register_reggroup_p(struct gdbarch *gdbarch, int regnum, struct reggroup *group)
Definition: m32c-tdep.c:256
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LONGEST frame_size
Definition: m32c-tdep.c:1042
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static ULONGEST extract_unsigned_integer(const gdb_byte *addr, int len, enum bfd_endian byte_order)
Definition: defs.h:577
regcache_cooked_read_unsigned
enum register_status regcache_cooked_read_unsigned(struct regcache *regcache, int regnum, ULONGEST *val)
Definition: regcache.c:777
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struct reggroup *const system_reggroup
Definition: reggroups.c:316
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void set_gdbarch_sp_regnum(struct gdbarch *gdbarch, int sp_regnum)
Definition: gdbarch.c:2156
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struct m32c_reg * r3
Definition: m32c-tdep.c:117
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static int m32c_debug_info_reg_to_regnum(struct gdbarch *gdbarch, int reg_nr)
Definition: m32c-tdep.c:242
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Definition: minsyms.h:29
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static m32c_read_reg_t m32c_part_read
Definition: m32c-tdep.c:300
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struct type * register_type(struct gdbarch *gdbarch, int regnum)
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Definition: gdbarch.c:2340
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static CORE_ADDR m32c_skip_prologue(struct gdbarch *gdbarch, CORE_ADDR ip)
Definition: m32c-tdep.c:1821
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struct_return
Definition: arm-tdep.h:88
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Definition: gdbarch.c:2690
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static int m32c_get_dest23(unsigned char *i)
Definition: m32c-tdep.c:1217
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Definition: gdb_assert.h:55
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Definition: m32c-tdep.c:1162
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enum bfd_endian gdbarch_byte_order(struct gdbarch *gdbarch)
Definition: gdbarch.c:1509
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Definition: prologue-value.c:224
set_gdbarch_register_sim_regno
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int dwarf_num
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struct type * int32
Definition: m32c-tdep.c:130
TYPE_CODE_UNION
Definition: gdbtypes.h:107
TARGET_CHAR_BIT
#define TARGET_CHAR_BIT
Definition: host-defs.h:29
type
Definition: gdbtypes.h:749
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struct type * int64
Definition: m32c-tdep.c:130
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static struct srcdest m32c_decode_sd23(struct m32c_pv_state *st, int code, int size, int ind)
Definition: m32c-tdep.c:1270
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Definition: m32c-tdep.c:1060
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Definition: blockframe.c:320
gdbarch_tdep::uint16
struct type * uint16
Definition: m32c-tdep.c:129
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struct m32c_reg * r3r1r2r0
Definition: m32c-tdep.c:118
frame-unwind.h
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void set_gdbarch_unwind_pc(struct gdbarch *gdbarch, gdbarch_unwind_pc_ftype unwind_pc)
Definition: gdbarch.c:3079
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static pv_t m32c_srcdest_fetch(struct m32c_pv_state *state, struct srcdest loc, int size)
Definition: m32c-tdep.c:1114
G
#define G(reg)
Definition: m32c-tdep.c:792
default_frame_sniffer
int default_frame_sniffer(const struct frame_unwind *self, struct frame_info *this_frame, void **this_prologue_cache)
Definition: frame-unwind.c:174
m32c_register_name
static const char * m32c_register_name(struct gdbarch *gdbarch, int num)
Definition: m32c-tdep.c:221
type
static const char * type
Definition: language.c:113
m32c_pv_state::sb
pv_t sb
Definition: m32c-tdep.c:1065
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void store(pv_t addr, CORE_ADDR size, pv_t value)
Definition: prologue-value.c:409
pv_area::scan
void scan(void(*func)(void *closure, pv_t addr, CORE_ADDR size, pv_t value), void *closure)
Definition: prologue-value.c:524
S
#define S(reg)
Definition: m32c-tdep.c:793
status
mach_port_t mach_port_t name mach_port_t mach_port_t name kern_return_t int status
Definition: gnu-nat.c:1822
m32c_pv_push
static int m32c_pv_push(struct m32c_pv_state *state, pv_t value, int size)
Definition: m32c-tdep.c:1080
m32c_unwind_pc
static CORE_ADDR m32c_unwind_pc(struct gdbarch *arch, struct frame_info *next_frame)
Definition: m32c-tdep.c:1957
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unsigned int system_p
Definition: m32c-tdep.c:80
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pv_t sp
Definition: m32c-tdep.c:1065
m32c_sdisp8
static int m32c_sdisp8(struct m32c_pv_state *st)
Definition: m32c-tdep.c:1169
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static struct frame_id m32c_dummy_id(struct gdbarch *gdbarch, struct frame_info *this_frame)
Definition: m32c-tdep.c:2143
pv_area
Definition: prologue-value.h:226
USER_REGGROUP
Definition: reggroups.h:28
set_gdbarch_pointer_to_address
void set_gdbarch_pointer_to_address(struct gdbarch *gdbarch, gdbarch_pointer_to_address_ftype pointer_to_address)
Definition: gdbarch.c:2673
gdbarch_addr_bit
int gdbarch_addr_bit(struct gdbarch *gdbarch)
Definition: gdbarch.c:1848
set_gdbarch_unwind_sp
void set_gdbarch_unwind_sp(struct gdbarch *gdbarch, gdbarch_unwind_sp_ftype unwind_sp)
Definition: gdbarch.c:3103
m32c_reg::type
struct type * type
Definition: m32c-tdep.c:63
DMA
#define DMA(reg)
Definition: m32c-tdep.c:794
gdbarch_list::gdbarch
struct gdbarch * gdbarch
Definition: gdbarch.h:1622
regnum
int regnum
Definition: aarch64-tdep.c:77
frame_base
Definition: frame-base.h:58
m32c_pv_pushm_one
static int m32c_pv_pushm_one(struct m32c_pv_state *state, pv_t reg, int bit, int src, int size)
Definition: m32c-tdep.c:1366
read_memory
void read_memory(CORE_ADDR memaddr, gdb_byte *myaddr, ssize_t len)
Definition: corefile.c:258
m32c_pv_state::arch
struct gdbarch * arch
Definition: m32c-tdep.c:1062
srcdest::reg
pv_t * reg
Definition: m32c-tdep.c:1108
get_frame_register_unsigned
ULONGEST get_frame_register_unsigned(struct frame_info *frame, int regnum)
Definition: frame.c:1308
xmalloc
void * xmalloc(YYSIZE_T)
m32c_sb_read
static m32c_read_reg_t m32c_sb_read
Definition: m32c-tdep.c:299
TYPE_CODE_STRUCT
Definition: gdbtypes.h:106
set_gdbarch_breakpoint_kind_from_pc
void set_gdbarch_breakpoint_kind_from_pc(struct gdbarch *gdbarch, gdbarch_breakpoint_kind_from_pc_ftype breakpoint_kind_from_pc)
Definition: gdbarch.c:2871
gdbarch_tdep::prologue
struct insn_sequence * prologue
Definition: m68hc11-tdep.c:135
m32c_reg::write
m32c_write_reg_t * write
Definition: m32c-tdep.c:86
TYPE_CODE_FUNC
Definition: gdbtypes.h:110
gdbarch_tdep::a1
struct m32c_reg * a1
Definition: m32c-tdep.c:117
_initialize_m32c_tdep
void _initialize_m32c_tdep(void)
Definition: m32c-tdep.c:2682
reg
Definition: regdef.h:22
m32c_register_type
static struct type * m32c_register_type(struct gdbarch *arch, int reg_nr)
Definition: m32c-tdep.c:228
gdb_assert
#define gdb_assert(expr)
Definition: gdb_assert.h:32
value
Definition: value.c:169
srcdest_reg
Definition: m32c-tdep.c:1094
gdbarch_tdep::func_voyd
struct type * func_voyd
Definition: m32c-tdep.c:128
M32C_MAX_DWARF_REGNUM
#define M32C_MAX_DWARF_REGNUM
Definition: m32c-tdep.c:103
gdbarch_tdep::r2r0
struct m32c_reg * r2r0
Definition: m32c-tdep.c:118
TYPE_CODE_PTR
Definition: gdbtypes.h:84
srcdest_kind
srcdest_kind
Definition: m32c-tdep.c:1092
mark_system
static struct m32c_reg * mark_system(struct m32c_reg *reg)
Definition: m32c-tdep.c:703
m32c_pseudo_register_read
static enum register_status m32c_pseudo_register_read(struct gdbarch *arch, struct regcache *cache, int cookednum, gdb_byte *buf)
Definition: m32c-tdep.c:592
m32c_raw_write
static m32c_write_reg_t m32c_raw_write
Definition: m32c-tdep.c:304
core_addr_lessthan
int core_addr_lessthan(CORE_ADDR lhs, CORE_ADDR rhs)
Definition: arch-utils.c:117
gdb_byte
bfd_byte gdb_byte
Definition: common-types.h:38
m32c_return_value
static enum return_value_convention m32c_return_value(struct gdbarch *gdbarch, struct value *function, struct type *valtype, struct regcache *regcache, gdb_byte *readbuf, const gdb_byte *writebuf)
Definition: m32c-tdep.c:2194
m32c_pv_state::stack
struct pv_area * stack
Definition: m32c-tdep.c:1067
set_gdbarch_pseudo_register_read
void set_gdbarch_pseudo_register_read(struct gdbarch *gdbarch, gdbarch_pseudo_register_read_ftype pseudo_register_read)
Definition: gdbarch.c:1984
m32c_m16c_pointer_to_address
static CORE_ADDR m32c_m16c_pointer_to_address(struct gdbarch *gdbarch, struct type *type, const gdb_byte *buf)
Definition: m32c-tdep.c:2505
TYPE_TARGET_TYPE
#define TYPE_TARGET_TYPE(thistype)
Definition: gdbtypes.h:1226
m32c_raw_read
static m32c_read_reg_t m32c_raw_read
Definition: m32c-tdep.c:297
lookup_minimal_symbol_by_pc
struct bound_minimal_symbol lookup_minimal_symbol_by_pc(CORE_ADDR pc)
Definition: minsyms.c:928
m32c_reg::dma_p
unsigned int dma_p
Definition: m32c-tdep.c:79
dwarf2-frame.h
m32c_cat_read
static m32c_read_reg_t m32c_cat_read
Definition: m32c-tdep.c:301
RP
#define RP(name, type)
Definition: m32c-tdep.c:751
mark_save_restore
static struct m32c_reg * mark_save_restore(struct m32c_reg *reg)
Definition: m32c-tdep.c:712
mark_dma
static struct m32c_reg * mark_dma(struct m32c_reg *reg)
Definition: m32c-tdep.c:694
XCNEW
#define XCNEW(T)
Definition: poison.h:121
gdbcore.h
add_reg
static struct m32c_reg * add_reg(struct gdbarch *arch, const char *name, struct type *type, int sim_num, m32c_read_reg_t *read, m32c_write_reg_t *write, struct m32c_reg *rx, struct m32c_reg *ry, int n)
Definition: m32c-tdep.c:630
xsnprintf
int xsnprintf(char *str, size_t size, const char *format,...)
Definition: common-utils.c:134
srcdest_partial_reg
Definition: m32c-tdep.c:1095
m32c_pv_state::next_addr
CORE_ADDR next_addr
Definition: m32c-tdep.c:1072
TYPE_CODE
#define TYPE_CODE(thistype)
Definition: gdbtypes.h:1238
regcache_raw_read
enum register_status regcache_raw_read(struct regcache *regcache, int regnum, gdb_byte *buf)
Definition: regcache.c:565
regcache_cooked_write_unsigned
void regcache_cooked_write_unsigned(struct regcache *regcache, int regnum, ULONGEST val)
Definition: regcache.c:806
frame_unwind_got_register
struct value * frame_unwind_got_register(struct frame_info *frame, int regnum, int new_regnum)
Definition: frame-unwind.c:223
target_read_memory
int target_read_memory(CORE_ADDR memaddr, gdb_byte *myaddr, ssize_t len)
Definition: target.c:1370
m32c_gdbarch_init
static struct gdbarch * m32c_gdbarch_init(struct gdbarch_info info, struct gdbarch_list *arches)
Definition: m32c-tdep.c:2610
m32c_prologue::arch
struct gdbarch * arch
Definition: m32c-tdep.c:1020
m32c_return_by_passed_buf
static int m32c_return_by_passed_buf(struct type *type)
Definition: m32c-tdep.c:2185
gdbarch_tdep::uint8
struct type * uint8
Definition: m32c-tdep.c:129
set_gdbarch_int_bit
void set_gdbarch_int_bit(struct gdbarch *gdbarch, int int_bit)
Definition: gdbarch.c:1589
bound_minimal_symbol::minsym
struct minimal_symbol * minsym
Definition: minsyms.h:34
RC
#define RC(name)
Definition: m32c-tdep.c:746
m32c_banked_register
static struct m32c_reg * m32c_banked_register(struct m32c_reg *reg, struct regcache *cache)
Definition: m32c-tdep.c:343
m32c_analyze_frame_prologue
static struct m32c_prologue * m32c_analyze_frame_prologue(struct frame_info *this_frame, void **this_prologue_cache)
Definition: m32c-tdep.c:1847
m32c_sign_ext
static int m32c_sign_ext(int v, int bits)
Definition: m32c-tdep.c:1148
bit
#define bit(obj, st)
Definition: aarch64-tdep.c:63
offset
int offset
Definition: agent.c:65
m32c_reg::rx
struct m32c_reg * rx
Definition: m32c-tdep.c:91
set_gdbarch_virtual_frame_pointer
void set_gdbarch_virtual_frame_pointer(struct gdbarch *gdbarch, gdbarch_virtual_frame_pointer_ftype virtual_frame_pointer)
Definition: gdbarch.c:1960
code
int code
Definition: ser-unix.c:239
m32c_analyze_prologue
static void m32c_analyze_prologue(struct gdbarch *arch, CORE_ADDR start, CORE_ADDR limit, struct m32c_prologue *prologue)
Definition: m32c-tdep.c:1542
m32c_is_struct_return
static int m32c_is_struct_return(struct m32c_pv_state *st, struct srcdest loc, pv_t value)
Definition: m32c-tdep.c:1458
TYPE_NFIELDS
#define TYPE_NFIELDS(thistype)
Definition: gdbtypes.h:1239
m32c_reg::general_p
unsigned int general_p
Definition: m32c-tdep.c:78
set_gdbarch_num_pseudo_regs
void set_gdbarch_num_pseudo_regs(struct gdbarch *gdbarch, int num_pseudo_regs)
Definition: gdbarch.c:2067
regcache::arch
gdbarch * arch() const
Definition: regcache.c:221
regcache_cooked_read
enum register_status regcache_cooked_read(struct regcache *regcache, int regnum, gdb_byte *buf)
Definition: regcache.c:661
stop_pc
CORE_ADDR stop_pc
Definition: infcmd.c:98
m32c_pv_state::insn
gdb_byte insn[M32C_MAX_INSN_LEN]
Definition: m32c-tdep.c:1071
target.h
gdbarch_tdep::regs
struct m32c_reg regs[M32C_MAX_NUM_REGS]
Definition: m32c-tdep.c:110
m32c_push_dummy_call
static CORE_ADDR m32c_push_dummy_call(struct gdbarch *gdbarch, struct value *function, struct regcache *regcache, CORE_ADDR bp_addr, int nargs, struct value **args, CORE_ADDR sp, int struct_return, CORE_ADDR struct_addr)
Definition: m32c-tdep.c:2018
m32c_prologue
Definition: m32c-tdep.c:1013
value.h
frame_unwind
Definition: frame-unwind.h:144
m32c_prev_register
static struct value * m32c_prev_register(struct frame_info *this_frame, void **this_prologue_cache, int regnum)
Definition: m32c-tdep.c:1923
m32c_r3r2r1r0_write
static m32c_write_reg_t m32c_r3r2r1r0_write
Definition: m32c-tdep.c:309
gdbarch_tdep::sp
struct m32c_reg * sp
Definition: m32c-tdep.c:119
m32c_find_part
static void m32c_find_part(struct m32c_reg *reg, int *offset_p, int *len_p)
Definition: m32c-tdep.c:409
m32c_next_byte
static unsigned int m32c_next_byte(struct m32c_pv_state *st)
Definition: m32c-tdep.c:1155
gdbtypes.h
m32c_reg::name
const char * name
Definition: m32c-tdep.c:60
m32c_prologue::prologue_end
CORE_ADDR prologue_end
Definition: m32c-tdep.c:1047
ULONGEST
unsigned long long ULONGEST
Definition: common-types.h:53
default_frame_unwind_stop_reason
enum unwind_stop_reason default_frame_unwind_stop_reason(struct frame_info *this_frame, void **this_cache)
Definition: frame-unwind.c:184
m32c_prologue::frame_ptr_offset
LONGEST frame_ptr_offset
Definition: m32c-tdep.c:1027
m32c_read_reg_t
enum register_status() m32c_read_reg_t(struct m32c_reg *reg, struct regcache *cache, gdb_byte *buf)
m32c_udisp24
static int m32c_udisp24(struct m32c_pv_state *st)
Definition: m32c-tdep.c:1196
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unsigned int save_restore_p
Definition: m32c-tdep.c:81
register_size
int register_size(struct gdbarch *gdbarch, int regnum)
Definition: regcache.c:164
regcache
Definition: regcache.h:232
m32c_pv_state::r2
pv_t r2
Definition: m32c-tdep.c:1063
gdbarch_info
Definition: gdbarch.h:1626
value_type
struct type * value_type(const struct value *value)
Definition: value.c:1095
m32c_pushm_is_reg_save
static int m32c_pushm_is_reg_save(struct m32c_pv_state *st, int src)
Definition: m32c-tdep.c:1477
regcache_cooked_read_part
enum register_status regcache_cooked_read_part(struct regcache *regcache, int regnum, int offset, int len, gdb_byte *buf)
Definition: regcache.c:972
set_gdbarch_return_value
void set_gdbarch_return_value(struct gdbarch *gdbarch, gdbarch_return_value_ftype return_value)
Definition: gdbarch.c:2738
gdbarch_bfd_arch_info
const struct bfd_arch_info * gdbarch_bfd_arch_info(struct gdbarch *gdbarch)
Definition: gdbarch.c:1500
m32c_pv_state::scan_pc
CORE_ADDR scan_pc
Definition: m32c-tdep.c:1072
pv_area::find_reg
bool find_reg(struct gdbarch *gdbarch, int reg, CORE_ADDR *offset_p)
Definition: prologue-value.c:496
gdbarch_tdep::code_addr_reg_type
struct type * code_addr_reg_type
Definition: m32c-tdep.c:133
gdbarch_tdep::push_addr_bytes
int push_addr_bytes
Definition: m32c-tdep.c:141
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static m32c_read_reg_t m32c_banked_read
Definition: m32c-tdep.c:298
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struct reggroup *const save_reggroup
Definition: reggroups.c:319
TYPE_LENGTH
#define TYPE_LENGTH(thistype)
Definition: gdbtypes.h:1235
srcdest
Definition: m32c-tdep.c:1101
set_gdbarch_ptr_bit
void set_gdbarch_ptr_bit(struct gdbarch *gdbarch, int ptr_bit)
Definition: gdbarch.c:1841
RBD
#define RBD(name)
Definition: m32c-tdep.c:757
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enum register_status regcache_raw_read_unsigned(struct regcache *regcache, int regnum, ULONGEST *val)
Definition: regcache.c:612
set_gdbarch_push_dummy_call
void set_gdbarch_push_dummy_call(struct gdbarch *gdbarch, gdbarch_push_dummy_call_ftype push_dummy_call)
Definition: gdbarch.c:2381
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pv_t r0
Definition: m32c-tdep.c:1063
m32c_reg
Definition: m32c-tdep.c:57
read_memory_unsigned_integer
ULONGEST read_memory_unsigned_integer(CORE_ADDR memaddr, int len, enum bfd_endian byte_order)
Definition: corefile.c:326
gdbarch_tdep::r1
struct m32c_reg * r1
Definition: m32c-tdep.c:117
set_gdbarch_sw_breakpoint_from_kind
void set_gdbarch_sw_breakpoint_from_kind(struct gdbarch *gdbarch, gdbarch_sw_breakpoint_from_kind_ftype sw_breakpoint_from_kind)
Definition: gdbarch.c:2888
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pv_t fetch(pv_t addr, CORE_ADDR size)
Definition: prologue-value.c:471
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static int m32c_udisp16(struct m32c_pv_state *st)
Definition: m32c-tdep.c:1176
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void register_gdbarch_init(enum bfd_architecture bfd_architecture, gdbarch_init_ftype *init)
Definition: gdbarch.c:5299
write_memory
void write_memory(CORE_ADDR memaddr, const bfd_byte *myaddr, ssize_t len)
Definition: corefile.c:394
set_gdbarch_skip_prologue
void set_gdbarch_skip_prologue(struct gdbarch *gdbarch, gdbarch_skip_prologue_ftype skip_prologue)
Definition: gdbarch.c:2772
CB
#define CB(name, raw_pair)
Definition: m32c-tdep.c:771
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#define R16U(name)
Definition: m32c-tdep.c:736
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Definition: gdbtypes.h:141
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struct bound_minimal_symbol lookup_minimal_symbol(const char *name, const char *sfile, struct objfile *objf)
Definition: minsyms.c:311
RETURN_VALUE_REGISTER_CONVENTION
Definition: defs.h:251
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int n
Definition: m32c-tdep.c:92
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Definition: gdbarch.c:2173
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void set_gdbarch_register_name(struct gdbarch *gdbarch, gdbarch_register_name_ftype register_name)
Definition: gdbarch.c:2292
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Definition: prologue-value.c:209
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Definition: m32c-tdep.c:1381
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Definition: frame.c:1001
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enum m32c_prologue_kind kind
Definition: m32c-tdep.c:1022
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Definition: errors.c:38
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Definition: m32c-tdep.c:85
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Definition: prologue-value.c:49
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Definition: go32-nat.c:242
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Definition: m32c-tdep.c:72
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Definition: gdbarch.c:361
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void set_gdbarch_inner_than(struct gdbarch *gdbarch, gdbarch_inner_than_ftype inner_than)
Definition: gdbarch.c:2837
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Definition: m32c-tdep.c:137
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Definition: frame.h:111
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Definition: m32c-tdep.c:128
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Definition: frame.c:2691
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Definition: common-types.h:52
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Definition: m32c-tdep.c:116
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Definition: regcache.c:873
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Definition: m32c-tdep.c:1401
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Definition: gdbtypes.c:519
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Definition: defs.h:604
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Definition: regcache.c:831
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void set_gdbarch_vbit_in_delta(struct gdbarch *gdbarch, int vbit_in_delta)
Definition: gdbarch.c:3874
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#define CHL(name, type)
Definition: m32c-tdep.c:779
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Definition: gdbarch.h:1620