GDB (xrefs)

/tmp/gdb-8.1/gdb/rl78-tdep.c
Go to the documentation of this file.
1 /* Target-dependent code for the Renesas RL78 for GDB, the GNU debugger.
2
3 Copyright (C) 2011-2018 Free Software Foundation, Inc.
4
5 Contributed by Red Hat, Inc.
6
7 This file is part of GDB.
8
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 3 of the License, or
12 (at your option) any later version.
13
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
18
19 You should have received a copy of the GNU General Public License
20 along with this program. If not, see <http://www.gnu.org/licenses/>. */
21
22 #include "defs.h"
23 #include "arch-utils.h"
24 #include "prologue-value.h"
25 #include "target.h"
26 #include "regcache.h"
27 #include "opcode/rl78.h"
28 #include "dis-asm.h"
29 #include "gdbtypes.h"
30 #include "frame.h"
31 #include "frame-unwind.h"
32 #include "frame-base.h"
33 #include "value.h"
34 #include "gdbcore.h"
35 #include "dwarf2-frame.h"
36 #include "reggroups.h"
37
38 #include "elf/rl78.h"
39 #include "elf-bfd.h"
40
41 /* Register Banks. */
42
43 enum
44 {
45 RL78_BANK0 = 0,
46 RL78_BANK1 = 1,
47 RL78_BANK2 = 2,
48 RL78_BANK3 = 3,
49 RL78_NUMBANKS = 4,
50 RL78_REGS_PER_BANK = 8
51 };
52
53 /* Register Numbers. */
54
55 enum
56 {
57 /* All general purpose registers are 8 bits wide. */
58 RL78_RAW_BANK0_R0_REGNUM = 0,
59 RL78_RAW_BANK0_R1_REGNUM,
60 RL78_RAW_BANK0_R2_REGNUM,
61 RL78_RAW_BANK0_R3_REGNUM,
62 RL78_RAW_BANK0_R4_REGNUM,
63 RL78_RAW_BANK0_R5_REGNUM,
64 RL78_RAW_BANK0_R6_REGNUM,
65 RL78_RAW_BANK0_R7_REGNUM,
66
67 RL78_RAW_BANK1_R0_REGNUM,
68 RL78_RAW_BANK1_R1_REGNUM,
69 RL78_RAW_BANK1_R2_REGNUM,
70 RL78_RAW_BANK1_R3_REGNUM,
71 RL78_RAW_BANK1_R4_REGNUM,
72 RL78_RAW_BANK1_R5_REGNUM,
73 RL78_RAW_BANK1_R6_REGNUM,
74 RL78_RAW_BANK1_R7_REGNUM,
75
76 RL78_RAW_BANK2_R0_REGNUM,
77 RL78_RAW_BANK2_R1_REGNUM,
78 RL78_RAW_BANK2_R2_REGNUM,
79 RL78_RAW_BANK2_R3_REGNUM,
80 RL78_RAW_BANK2_R4_REGNUM,
81 RL78_RAW_BANK2_R5_REGNUM,
82 RL78_RAW_BANK2_R6_REGNUM,
83 RL78_RAW_BANK2_R7_REGNUM,
84
85 RL78_RAW_BANK3_R0_REGNUM,
86 RL78_RAW_BANK3_R1_REGNUM,
87 RL78_RAW_BANK3_R2_REGNUM,
88 RL78_RAW_BANK3_R3_REGNUM,
89 RL78_RAW_BANK3_R4_REGNUM,
90 RL78_RAW_BANK3_R5_REGNUM,
91 RL78_RAW_BANK3_R6_REGNUM,
92 RL78_RAW_BANK3_R7_REGNUM,
93
94 RL78_PSW_REGNUM, /* 8 bits */
95 RL78_ES_REGNUM, /* 8 bits */
96 RL78_CS_REGNUM, /* 8 bits */
97 RL78_RAW_PC_REGNUM, /* 20 bits; we'll use 32 bits for it. */
98
99 /* Fixed address SFRs (some of those above are SFRs too.) */
100 RL78_SPL_REGNUM, /* 8 bits; lower half of SP */
101 RL78_SPH_REGNUM, /* 8 bits; upper half of SP */
102 RL78_PMC_REGNUM, /* 8 bits */
103 RL78_MEM_REGNUM, /* 8 bits ?? */
104
105 RL78_NUM_REGS,
106
107 /* Pseudo registers. */
108 RL78_PC_REGNUM = RL78_NUM_REGS,
109 RL78_SP_REGNUM,
110
111 RL78_X_REGNUM,
112 RL78_A_REGNUM,
113 RL78_C_REGNUM,
114 RL78_B_REGNUM,
115 RL78_E_REGNUM,
116 RL78_D_REGNUM,
117 RL78_L_REGNUM,
118 RL78_H_REGNUM,
119
120 RL78_AX_REGNUM,
121 RL78_BC_REGNUM,
122 RL78_DE_REGNUM,
123 RL78_HL_REGNUM,
124
125 RL78_BANK0_R0_REGNUM,
126 RL78_BANK0_R1_REGNUM,
127 RL78_BANK0_R2_REGNUM,
128 RL78_BANK0_R3_REGNUM,
129 RL78_BANK0_R4_REGNUM,
130 RL78_BANK0_R5_REGNUM,
131 RL78_BANK0_R6_REGNUM,
132 RL78_BANK0_R7_REGNUM,
133
134 RL78_BANK1_R0_REGNUM,
135 RL78_BANK1_R1_REGNUM,
136 RL78_BANK1_R2_REGNUM,
137 RL78_BANK1_R3_REGNUM,
138 RL78_BANK1_R4_REGNUM,
139 RL78_BANK1_R5_REGNUM,
140 RL78_BANK1_R6_REGNUM,
141 RL78_BANK1_R7_REGNUM,
142
143 RL78_BANK2_R0_REGNUM,
144 RL78_BANK2_R1_REGNUM,
145 RL78_BANK2_R2_REGNUM,
146 RL78_BANK2_R3_REGNUM,
147 RL78_BANK2_R4_REGNUM,
148 RL78_BANK2_R5_REGNUM,
149 RL78_BANK2_R6_REGNUM,
150 RL78_BANK2_R7_REGNUM,
151
152 RL78_BANK3_R0_REGNUM,
153 RL78_BANK3_R1_REGNUM,
154 RL78_BANK3_R2_REGNUM,
155 RL78_BANK3_R3_REGNUM,
156 RL78_BANK3_R4_REGNUM,
157 RL78_BANK3_R5_REGNUM,
158 RL78_BANK3_R6_REGNUM,
159 RL78_BANK3_R7_REGNUM,
160
161 RL78_BANK0_RP0_REGNUM,
162 RL78_BANK0_RP1_REGNUM,
163 RL78_BANK0_RP2_REGNUM,
164 RL78_BANK0_RP3_REGNUM,
165
166 RL78_BANK1_RP0_REGNUM,
167 RL78_BANK1_RP1_REGNUM,
168 RL78_BANK1_RP2_REGNUM,
169 RL78_BANK1_RP3_REGNUM,
170
171 RL78_BANK2_RP0_REGNUM,
172 RL78_BANK2_RP1_REGNUM,
173 RL78_BANK2_RP2_REGNUM,
174 RL78_BANK2_RP3_REGNUM,
175
176 RL78_BANK3_RP0_REGNUM,
177 RL78_BANK3_RP1_REGNUM,
178 RL78_BANK3_RP2_REGNUM,
179 RL78_BANK3_RP3_REGNUM,
180
181 /* These are the same as the above 16 registers, but have
182 a pointer type for use as base registers in expression
183 evaluation. These are not user visible registers. */
184 RL78_BANK0_RP0_PTR_REGNUM,
185 RL78_BANK0_RP1_PTR_REGNUM,
186 RL78_BANK0_RP2_PTR_REGNUM,
187 RL78_BANK0_RP3_PTR_REGNUM,
188
189 RL78_BANK1_RP0_PTR_REGNUM,
190 RL78_BANK1_RP1_PTR_REGNUM,
191 RL78_BANK1_RP2_PTR_REGNUM,
192 RL78_BANK1_RP3_PTR_REGNUM,
193
194 RL78_BANK2_RP0_PTR_REGNUM,
195 RL78_BANK2_RP1_PTR_REGNUM,
196 RL78_BANK2_RP2_PTR_REGNUM,
197 RL78_BANK2_RP3_PTR_REGNUM,
198
199 RL78_BANK3_RP0_PTR_REGNUM,
200 RL78_BANK3_RP1_PTR_REGNUM,
201 RL78_BANK3_RP2_PTR_REGNUM,
202 RL78_BANK3_RP3_PTR_REGNUM,
203
204 RL78_NUM_TOTAL_REGS,
205 RL78_NUM_PSEUDO_REGS = RL78_NUM_TOTAL_REGS - RL78_NUM_REGS
206 };
207
208 #define RL78_SP_ADDR 0xffff8
209
210 /* Architecture specific data. */
211
212 struct gdbarch_tdep
213 {
214 /* The ELF header flags specify the multilib used. */
215 int elf_flags;
216
217 struct type *rl78_void,
218 *rl78_uint8,
219 *rl78_int8,
220 *rl78_uint16,
221 *rl78_int16,
222 *rl78_uint32,
223 *rl78_int32,
224 *rl78_data_pointer,
225 *rl78_code_pointer,
226 *rl78_psw_type;
227 };
228
229 /* This structure holds the results of a prologue analysis. */
230
231 struct rl78_prologue
232 {
233 /* The offset from the frame base to the stack pointer --- always
234 zero or negative.
235
236 Calling this a "size" is a bit misleading, but given that the
237 stack grows downwards, using offsets for everything keeps one
238 from going completely sign-crazy: you never change anything's
239 sign for an ADD instruction; always change the second operand's
240 sign for a SUB instruction; and everything takes care of
241 itself. */
242 int frame_size;
243
244 /* Non-zero if this function has initialized the frame pointer from
245 the stack pointer, zero otherwise. */
246 int has_frame_ptr;
247
248 /* If has_frame_ptr is non-zero, this is the offset from the frame
249 base to where the frame pointer points. This is always zero or
250 negative. */
251 int frame_ptr_offset;
252
253 /* The address of the first instruction at which the frame has been
254 set up and the arguments are where the debug info says they are
255 --- as best as we can tell. */
256 CORE_ADDR prologue_end;
257
258 /* reg_offset[R] is the offset from the CFA at which register R is
259 saved, or 1 if register R has not been saved. (Real values are
260 always zero or negative.) */
261 int reg_offset[RL78_NUM_TOTAL_REGS];
262 };
263
264 /* Construct type for PSW register. */
265
266 static struct type *
267 rl78_psw_type (struct gdbarch *gdbarch)
268 {
269 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
270
271 if (tdep->rl78_psw_type == NULL)
272 {
273 tdep->rl78_psw_type = arch_flags_type (gdbarch,
274 "builtin_type_rl78_psw", 8);
275 append_flags_type_flag (tdep->rl78_psw_type, 0, "CY");
276 append_flags_type_flag (tdep->rl78_psw_type, 1, "ISP0");
277 append_flags_type_flag (tdep->rl78_psw_type, 2, "ISP1");
278 append_flags_type_flag (tdep->rl78_psw_type, 3, "RBS0");
279 append_flags_type_flag (tdep->rl78_psw_type, 4, "AC");
280 append_flags_type_flag (tdep->rl78_psw_type, 5, "RBS1");
281 append_flags_type_flag (tdep->rl78_psw_type, 6, "Z");
282 append_flags_type_flag (tdep->rl78_psw_type, 7, "IE");
283 }
284
285 return tdep->rl78_psw_type;
286 }
287
288 /* Implement the "register_type" gdbarch method. */
289
290 static struct type *
291 rl78_register_type (struct gdbarch *gdbarch, int reg_nr)
292 {
293 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
294
295 if (reg_nr == RL78_PC_REGNUM)
296 return tdep->rl78_code_pointer;
297 else if (reg_nr == RL78_RAW_PC_REGNUM)
298 return tdep->rl78_uint32;
299 else if (reg_nr == RL78_PSW_REGNUM)
300 return rl78_psw_type (gdbarch);
301 else if (reg_nr <= RL78_MEM_REGNUM
302 || (RL78_X_REGNUM <= reg_nr && reg_nr <= RL78_H_REGNUM)
303 || (RL78_BANK0_R0_REGNUM <= reg_nr
304 && reg_nr <= RL78_BANK3_R7_REGNUM))
305 return tdep->rl78_int8;
306 else if (reg_nr == RL78_SP_REGNUM
307 || (RL78_BANK0_RP0_PTR_REGNUM <= reg_nr
308 && reg_nr <= RL78_BANK3_RP3_PTR_REGNUM))
309 return tdep->rl78_data_pointer;
310 else
311 return tdep->rl78_int16;
312 }
313
314 /* Implement the "register_name" gdbarch method. */
315
316 static const char *
317 rl78_register_name (struct gdbarch *gdbarch, int regnr)
318 {
319 static const char *const reg_names[] =
320 {
321 "", /* bank0_r0 */
322 "", /* bank0_r1 */
323 "", /* bank0_r2 */
324 "", /* bank0_r3 */
325 "", /* bank0_r4 */
326 "", /* bank0_r5 */
327 "", /* bank0_r6 */
328 "", /* bank0_r7 */
329
330 "", /* bank1_r0 */
331 "", /* bank1_r1 */
332 "", /* bank1_r2 */
333 "", /* bank1_r3 */
334 "", /* bank1_r4 */
335 "", /* bank1_r5 */
336 "", /* bank1_r6 */
337 "", /* bank1_r7 */
338
339 "", /* bank2_r0 */
340 "", /* bank2_r1 */
341 "", /* bank2_r2 */
342 "", /* bank2_r3 */
343 "", /* bank2_r4 */
344 "", /* bank2_r5 */
345 "", /* bank2_r6 */
346 "", /* bank2_r7 */
347
348 "", /* bank3_r0 */
349 "", /* bank3_r1 */
350 "", /* bank3_r2 */
351 "", /* bank3_r3 */
352 "", /* bank3_r4 */
353 "", /* bank3_r5 */
354 "", /* bank3_r6 */
355 "", /* bank3_r7 */
356
357 "psw",
358 "es",
359 "cs",
360 "",
361
362 "", /* spl */
363 "", /* sph */
364 "pmc",
365 "mem",
366
367 "pc",
368 "sp",
369
370 "x",
371 "a",
372 "c",
373 "b",
374 "e",
375 "d",
376 "l",
377 "h",
378
379 "ax",
380 "bc",
381 "de",
382 "hl",
383
384 "bank0_r0",
385 "bank0_r1",
386 "bank0_r2",
387 "bank0_r3",
388 "bank0_r4",
389 "bank0_r5",
390 "bank0_r6",
391 "bank0_r7",
392
393 "bank1_r0",
394 "bank1_r1",
395 "bank1_r2",
396 "bank1_r3",
397 "bank1_r4",
398 "bank1_r5",
399 "bank1_r6",
400 "bank1_r7",
401
402 "bank2_r0",
403 "bank2_r1",
404 "bank2_r2",
405 "bank2_r3",
406 "bank2_r4",
407 "bank2_r5",
408 "bank2_r6",
409 "bank2_r7",
410
411 "bank3_r0",
412 "bank3_r1",
413 "bank3_r2",
414 "bank3_r3",
415 "bank3_r4",
416 "bank3_r5",
417 "bank3_r6",
418 "bank3_r7",
419
420 "bank0_rp0",
421 "bank0_rp1",
422 "bank0_rp2",
423 "bank0_rp3",
424
425 "bank1_rp0",
426 "bank1_rp1",
427 "bank1_rp2",
428 "bank1_rp3",
429
430 "bank2_rp0",
431 "bank2_rp1",
432 "bank2_rp2",
433 "bank2_rp3",
434
435 "bank3_rp0",
436 "bank3_rp1",
437 "bank3_rp2",
438 "bank3_rp3",
439
440 /* The 16 register slots would be named
441 bank0_rp0_ptr_regnum ... bank3_rp3_ptr_regnum, but we don't
442 want these to be user visible registers. */
443 "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", ""
444 };
445
446 return reg_names[regnr];
447 }
448
449 /* Implement the "register_name" gdbarch method for the g10 variant. */
450
451 static const char *
452 rl78_g10_register_name (struct gdbarch *gdbarch, int regnr)
453 {
454 static const char *const reg_names[] =
455 {
456 "", /* bank0_r0 */
457 "", /* bank0_r1 */
458 "", /* bank0_r2 */
459 "", /* bank0_r3 */
460 "", /* bank0_r4 */
461 "", /* bank0_r5 */
462 "", /* bank0_r6 */
463 "", /* bank0_r7 */
464
465 "", /* bank1_r0 */
466 "", /* bank1_r1 */
467 "", /* bank1_r2 */
468 "", /* bank1_r3 */
469 "", /* bank1_r4 */
470 "", /* bank1_r5 */
471 "", /* bank1_r6 */
472 "", /* bank1_r7 */
473
474 "", /* bank2_r0 */
475 "", /* bank2_r1 */
476 "", /* bank2_r2 */
477 "", /* bank2_r3 */
478 "", /* bank2_r4 */
479 "", /* bank2_r5 */
480 "", /* bank2_r6 */
481 "", /* bank2_r7 */
482
483 "", /* bank3_r0 */
484 "", /* bank3_r1 */
485 "", /* bank3_r2 */
486 "", /* bank3_r3 */
487 "", /* bank3_r4 */
488 "", /* bank3_r5 */
489 "", /* bank3_r6 */
490 "", /* bank3_r7 */
491
492 "psw",
493 "es",
494 "cs",
495 "",
496
497 "", /* spl */
498 "", /* sph */
499 "pmc",
500 "mem",
501
502 "pc",
503 "sp",
504
505 "x",
506 "a",
507 "c",
508 "b",
509 "e",
510 "d",
511 "l",
512 "h",
513
514 "ax",
515 "bc",
516 "de",
517 "hl",
518
519 "bank0_r0",
520 "bank0_r1",
521 "bank0_r2",
522 "bank0_r3",
523 "bank0_r4",
524 "bank0_r5",
525 "bank0_r6",
526 "bank0_r7",
527
528 "",
529 "",
530 "",
531 "",
532 "",
533 "",
534 "",
535 "",
536
537 "",
538 "",
539 "",
540 "",
541 "",
542 "",
543 "",
544 "",
545
546 "",
547 "",
548 "",
549 "",
550 "",
551 "",
552 "",
553 "",
554
555 "bank0_rp0",
556 "bank0_rp1",
557 "bank0_rp2",
558 "bank0_rp3",
559
560 "",
561 "",
562 "",
563 "",
564
565 "",
566 "",
567 "",
568 "",
569
570 "",
571 "",
572 "",
573 "",
574
575 /* The 16 register slots would be named
576 bank0_rp0_ptr_regnum ... bank3_rp3_ptr_regnum, but we don't
577 want these to be user visible registers. */
578 "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", ""
579 };
580
581 return reg_names[regnr];
582 }
583
584 /* Implement the "register_reggroup_p" gdbarch method. */
585
586 static int
587 rl78_register_reggroup_p (struct gdbarch *gdbarch, int regnum,
588 struct reggroup *group)
589 {
590 if (group == all_reggroup)
591 return 1;
592
593 /* All other registers are saved and restored. */
594 if (group == save_reggroup || group == restore_reggroup)
595 {
596 if ((regnum < RL78_NUM_REGS
597 && regnum != RL78_SPL_REGNUM
598 && regnum != RL78_SPH_REGNUM
599 && regnum != RL78_RAW_PC_REGNUM)
600 || regnum == RL78_SP_REGNUM
601 || regnum == RL78_PC_REGNUM)
602 return 1;
603 else
604 return 0;
605 }
606
607 if ((RL78_BANK0_R0_REGNUM <= regnum && regnum <= RL78_BANK3_R7_REGNUM)
608 || regnum == RL78_ES_REGNUM
609 || regnum == RL78_CS_REGNUM
610 || regnum == RL78_SPL_REGNUM
611 || regnum == RL78_SPH_REGNUM
612 || regnum == RL78_PMC_REGNUM
613 || regnum == RL78_MEM_REGNUM
614 || regnum == RL78_RAW_PC_REGNUM
615 || (RL78_BANK0_RP0_REGNUM <= regnum && regnum <= RL78_BANK3_RP3_REGNUM))
616 return group == system_reggroup;
617
618 return group == general_reggroup;
619 }
620
621 /* Strip bits to form an instruction address. (When fetching a
622 32-bit address from the stack, the high eight bits are garbage.
623 This function strips off those unused bits.) */
624
625 static CORE_ADDR
626 rl78_make_instruction_address (CORE_ADDR addr)
627 {
628 return addr & 0xffffff;
629 }
630
631 /* Set / clear bits necessary to make a data address. */
632
633 static CORE_ADDR
634 rl78_make_data_address (CORE_ADDR addr)
635 {
636 return (addr & 0xffff) | 0xf0000;
637 }
638
639 /* Implement the "pseudo_register_read" gdbarch method. */
640
641 static enum register_status
642 rl78_pseudo_register_read (struct gdbarch *gdbarch,
643 struct regcache *regcache,
644 int reg, gdb_byte *buffer)
645 {
646 enum register_status status;
647
648 if (RL78_BANK0_R0_REGNUM <= reg && reg <= RL78_BANK3_R7_REGNUM)
649 {
650 int raw_regnum = RL78_RAW_BANK0_R0_REGNUM
651 + (reg - RL78_BANK0_R0_REGNUM);
652
653 status = regcache_raw_read (regcache, raw_regnum, buffer);
654 }
655 else if (RL78_BANK0_RP0_REGNUM <= reg && reg <= RL78_BANK3_RP3_REGNUM)
656 {
657 int raw_regnum = 2 * (reg - RL78_BANK0_RP0_REGNUM)
658 + RL78_RAW_BANK0_R0_REGNUM;
659
660 status = regcache_raw_read (regcache, raw_regnum, buffer);
661 if (status == REG_VALID)
662 status = regcache_raw_read (regcache, raw_regnum + 1, buffer + 1);
663 }
664 else if (RL78_BANK0_RP0_PTR_REGNUM <= reg && reg <= RL78_BANK3_RP3_PTR_REGNUM)
665 {
666 int raw_regnum = 2 * (reg - RL78_BANK0_RP0_PTR_REGNUM)
667 + RL78_RAW_BANK0_R0_REGNUM;
668
669 status = regcache_raw_read (regcache, raw_regnum, buffer);
670 if (status == REG_VALID)
671 status = regcache_raw_read (regcache, raw_regnum + 1, buffer + 1);
672 }
673 else if (reg == RL78_SP_REGNUM)
674 {
675 status = regcache_raw_read (regcache, RL78_SPL_REGNUM, buffer);
676 if (status == REG_VALID)
677 status = regcache_raw_read (regcache, RL78_SPH_REGNUM, buffer + 1);
678 }
679 else if (reg == RL78_PC_REGNUM)
680 {
681 gdb_byte rawbuf[4];
682
683 status = regcache_raw_read (regcache, RL78_RAW_PC_REGNUM, rawbuf);
684 memcpy (buffer, rawbuf, 3);
685 }
686 else if (RL78_X_REGNUM <= reg && reg <= RL78_H_REGNUM)
687 {
688 ULONGEST psw;
689
690 status = regcache_raw_read_unsigned (regcache, RL78_PSW_REGNUM, &psw);
691 if (status == REG_VALID)
692 {
693 /* RSB0 is at bit 3; RSBS1 is at bit 5. */
694 int bank = ((psw >> 3) & 1) | ((psw >> 4) & 1);
695 int raw_regnum = RL78_RAW_BANK0_R0_REGNUM + bank * RL78_REGS_PER_BANK
696 + (reg - RL78_X_REGNUM);
697 status = regcache_raw_read (regcache, raw_regnum, buffer);
698 }
699 }
700 else if (RL78_AX_REGNUM <= reg && reg <= RL78_HL_REGNUM)
701 {
702 ULONGEST psw;
703
704 status = regcache_raw_read_unsigned (regcache, RL78_PSW_REGNUM, &psw);
705 if (status == REG_VALID)
706 {
707 /* RSB0 is at bit 3; RSBS1 is at bit 5. */
708 int bank = ((psw >> 3) & 1) | ((psw >> 4) & 1);
709 int raw_regnum = RL78_RAW_BANK0_R0_REGNUM + bank * RL78_REGS_PER_BANK
710 + 2 * (reg - RL78_AX_REGNUM);
711 status = regcache_raw_read (regcache, raw_regnum, buffer);
712 if (status == REG_VALID)
713 status = regcache_raw_read (regcache, raw_regnum + 1,
714 buffer + 1);
715 }
716 }
717 else
718 gdb_assert_not_reached ("invalid pseudo register number");
719 return status;
720 }
721
722 /* Implement the "pseudo_register_write" gdbarch method. */
723
724 static void
725 rl78_pseudo_register_write (struct gdbarch *gdbarch,
726 struct regcache *regcache,
727 int reg, const gdb_byte *buffer)
728 {
729 if (RL78_BANK0_R0_REGNUM <= reg && reg <= RL78_BANK3_R7_REGNUM)
730 {
731 int raw_regnum = RL78_RAW_BANK0_R0_REGNUM
732 + (reg - RL78_BANK0_R0_REGNUM);
733
734 regcache_raw_write (regcache, raw_regnum, buffer);
735 }
736 else if (RL78_BANK0_RP0_REGNUM <= reg && reg <= RL78_BANK3_RP3_REGNUM)
737 {
738 int raw_regnum = 2 * (reg - RL78_BANK0_RP0_REGNUM)
739 + RL78_RAW_BANK0_R0_REGNUM;
740
741 regcache_raw_write (regcache, raw_regnum, buffer);
742 regcache_raw_write (regcache, raw_regnum + 1, buffer + 1);
743 }
744 else if (RL78_BANK0_RP0_PTR_REGNUM <= reg && reg <= RL78_BANK3_RP3_PTR_REGNUM)
745 {
746 int raw_regnum = 2 * (reg - RL78_BANK0_RP0_PTR_REGNUM)
747 + RL78_RAW_BANK0_R0_REGNUM;
748
749 regcache_raw_write (regcache, raw_regnum, buffer);
750 regcache_raw_write (regcache, raw_regnum + 1, buffer + 1);
751 }
752 else if (reg == RL78_SP_REGNUM)
753 {
754 regcache_raw_write (regcache, RL78_SPL_REGNUM, buffer);
755 regcache_raw_write (regcache, RL78_SPH_REGNUM, buffer + 1);
756 }
757 else if (reg == RL78_PC_REGNUM)
758 {
759 gdb_byte rawbuf[4];
760
761 memcpy (rawbuf, buffer, 3);
762 rawbuf[3] = 0;
763 regcache_raw_write (regcache, RL78_RAW_PC_REGNUM, rawbuf);
764 }
765 else if (RL78_X_REGNUM <= reg && reg <= RL78_H_REGNUM)
766 {
767 ULONGEST psw;
768 int bank;
769 int raw_regnum;
770
771 regcache_raw_read_unsigned (regcache, RL78_PSW_REGNUM, &psw);
772 bank = ((psw >> 3) & 1) | ((psw >> 4) & 1);
773 /* RSB0 is at bit 3; RSBS1 is at bit 5. */
774 raw_regnum = RL78_RAW_BANK0_R0_REGNUM + bank * RL78_REGS_PER_BANK
775 + (reg - RL78_X_REGNUM);
776 regcache_raw_write (regcache, raw_regnum, buffer);
777 }
778 else if (RL78_AX_REGNUM <= reg && reg <= RL78_HL_REGNUM)
779 {
780 ULONGEST psw;
781 int bank, raw_regnum;
782
783 regcache_raw_read_unsigned (regcache, RL78_PSW_REGNUM, &psw);
784 bank = ((psw >> 3) & 1) | ((psw >> 4) & 1);
785 /* RSB0 is at bit 3; RSBS1 is at bit 5. */
786 raw_regnum = RL78_RAW_BANK0_R0_REGNUM + bank * RL78_REGS_PER_BANK
787 + 2 * (reg - RL78_AX_REGNUM);
788 regcache_raw_write (regcache, raw_regnum, buffer);
789 regcache_raw_write (regcache, raw_regnum + 1, buffer + 1);
790 }
791 else
792 gdb_assert_not_reached ("invalid pseudo register number");
793 }
794
795 /* The documented BRK instruction is actually a two byte sequence,
796 {0x61, 0xcc}, but instructions may be as short as one byte.
797 Correspondence with Renesas revealed that the one byte sequence
798 0xff is used when a one byte breakpoint instruction is required. */
799 constexpr gdb_byte rl78_break_insn[] = { 0xff };
800
801 typedef BP_MANIPULATION (rl78_break_insn) rl78_breakpoint;
802
803 /* Define a "handle" struct for fetching the next opcode. */
804
805 struct rl78_get_opcode_byte_handle
806 {
807 CORE_ADDR pc;
808 };
809
810 static int
811 opc_reg_to_gdb_regnum (int opcreg)
812 {
813 switch (opcreg)
814 {
815 case RL78_Reg_X:
816 return RL78_X_REGNUM;
817 case RL78_Reg_A:
818 return RL78_A_REGNUM;
819 case RL78_Reg_C:
820 return RL78_C_REGNUM;
821 case RL78_Reg_B:
822 return RL78_B_REGNUM;
823 case RL78_Reg_E:
824 return RL78_E_REGNUM;
825 case RL78_Reg_D:
826 return RL78_D_REGNUM;
827 case RL78_Reg_L:
828 return RL78_L_REGNUM;
829 case RL78_Reg_H:
830 return RL78_H_REGNUM;
831 case RL78_Reg_AX:
832 return RL78_AX_REGNUM;
833 case RL78_Reg_BC:
834 return RL78_BC_REGNUM;
835 case RL78_Reg_DE:
836 return RL78_DE_REGNUM;
837 case RL78_Reg_HL:
838 return RL78_HL_REGNUM;
839 case RL78_Reg_SP:
840 return RL78_SP_REGNUM;
841 case RL78_Reg_PSW:
842 return RL78_PSW_REGNUM;
843 case RL78_Reg_CS:
844 return RL78_CS_REGNUM;
845 case RL78_Reg_ES:
846 return RL78_ES_REGNUM;
847 case RL78_Reg_PMC:
848 return RL78_PMC_REGNUM;
849 case RL78_Reg_MEM:
850 return RL78_MEM_REGNUM;
851 default:
852 internal_error (__FILE__, __LINE__,
853 _("Undefined mapping for opc reg %d"),
854 opcreg);
855 }
856
857 /* Not reached. */
858 return 0;
859 }
860
861 /* Fetch a byte on behalf of the opcode decoder. HANDLE contains
862 the memory address of the next byte to fetch. If successful,
863 the address in the handle is updated and the byte fetched is
864 returned as the value of the function. If not successful, -1
865 is returned. */
866
867 static int
868 rl78_get_opcode_byte (void *handle)
869 {
870 struct rl78_get_opcode_byte_handle *opcdata
871 = (struct rl78_get_opcode_byte_handle *) handle;
872 int status;
873 gdb_byte byte;
874
875 status = target_read_memory (opcdata->pc, &byte, 1);
876 if (status == 0)
877 {
878 opcdata->pc += 1;
879 return byte;
880 }
881 else
882 return -1;
883 }
884
885 /* Function for finding saved registers in a 'struct pv_area'; this
886 function is passed to pv_area::scan.
887
888 If VALUE is a saved register, ADDR says it was saved at a constant
889 offset from the frame base, and SIZE indicates that the whole
890 register was saved, record its offset. */
891
892 static void
893 check_for_saved (void *result_untyped, pv_t addr, CORE_ADDR size,
894 pv_t value)
895 {
896 struct rl78_prologue *result = (struct rl78_prologue *) result_untyped;
897
898 if (value.kind == pvk_register
899 && value.k == 0
900 && pv_is_register (addr, RL78_SP_REGNUM)
901 && size == register_size (target_gdbarch (), value.reg))
902 result->reg_offset[value.reg] = addr.k;
903 }
904
905 /* Analyze a prologue starting at START_PC, going no further than
906 LIMIT_PC. Fill in RESULT as appropriate. */
907
908 static void
909 rl78_analyze_prologue (CORE_ADDR start_pc,
910 CORE_ADDR limit_pc, struct rl78_prologue *result)
911 {
912 CORE_ADDR pc, next_pc;
913 int rn;
914 pv_t reg[RL78_NUM_TOTAL_REGS];
915 CORE_ADDR after_last_frame_setup_insn = start_pc;
916 int bank = 0;
917
918 memset (result, 0, sizeof (*result));
919
920 for (rn = 0; rn < RL78_NUM_TOTAL_REGS; rn++)
921 {
922 reg[rn] = pv_register (rn, 0);
923 result->reg_offset[rn] = 1;
924 }
925
926 pv_area stack (RL78_SP_REGNUM, gdbarch_addr_bit (target_gdbarch ()));
927
928 /* The call instruction has saved the return address on the stack. */
929 reg[RL78_SP_REGNUM] = pv_add_constant (reg[RL78_SP_REGNUM], -4);
930 stack.store (reg[RL78_SP_REGNUM], 4, reg[RL78_PC_REGNUM]);
931
932 pc = start_pc;
933 while (pc < limit_pc)
934 {
935 int bytes_read;
936 struct rl78_get_opcode_byte_handle opcode_handle;
937 RL78_Opcode_Decoded opc;
938
939 opcode_handle.pc = pc;
940 bytes_read = rl78_decode_opcode (pc, &opc, rl78_get_opcode_byte,
941 &opcode_handle, RL78_ISA_DEFAULT);
942 next_pc = pc + bytes_read;
943
944 if (opc.id == RLO_sel)
945 {
946 bank = opc.op[1].addend;
947 }
948 else if (opc.id == RLO_mov
949 && opc.op[0].type == RL78_Operand_PreDec
950 && opc.op[0].reg == RL78_Reg_SP
951 && opc.op[1].type == RL78_Operand_Register)
952 {
953 int rsrc = (bank * RL78_REGS_PER_BANK)
954 + 2 * (opc.op[1].reg - RL78_Reg_AX);
955
956 reg[RL78_SP_REGNUM] = pv_add_constant (reg[RL78_SP_REGNUM], -1);
957 stack.store (reg[RL78_SP_REGNUM], 1, reg[rsrc]);
958 reg[RL78_SP_REGNUM] = pv_add_constant (reg[RL78_SP_REGNUM], -1);
959 stack.store (reg[RL78_SP_REGNUM], 1, reg[rsrc + 1]);
960 after_last_frame_setup_insn = next_pc;
961 }
962 else if (opc.id == RLO_sub
963 && opc.op[0].type == RL78_Operand_Register
964 && opc.op[0].reg == RL78_Reg_SP
965 && opc.op[1].type == RL78_Operand_Immediate)
966 {
967 int addend = opc.op[1].addend;
968
969 reg[RL78_SP_REGNUM] = pv_add_constant (reg[RL78_SP_REGNUM],
970 -addend);
971 after_last_frame_setup_insn = next_pc;
972 }
973 else if (opc.id == RLO_mov
974 && opc.size == RL78_Word
975 && opc.op[0].type == RL78_Operand_Register
976 && opc.op[1].type == RL78_Operand_Indirect
977 && opc.op[1].addend == RL78_SP_ADDR)
978 {
979 reg[opc_reg_to_gdb_regnum (opc.op[0].reg)]
980 = reg[RL78_SP_REGNUM];
981 }
982 else if (opc.id == RLO_sub
983 && opc.size == RL78_Word
984 && opc.op[0].type == RL78_Operand_Register
985 && opc.op[1].type == RL78_Operand_Immediate)
986 {
987 int addend = opc.op[1].addend;
988 int regnum = opc_reg_to_gdb_regnum (opc.op[0].reg);
989
990 reg[regnum] = pv_add_constant (reg[regnum], -addend);
991 }
992 else if (opc.id == RLO_mov
993 && opc.size == RL78_Word
994 && opc.op[0].type == RL78_Operand_Indirect
995 && opc.op[0].addend == RL78_SP_ADDR
996 && opc.op[1].type == RL78_Operand_Register)
997 {
998 reg[RL78_SP_REGNUM]
999 = reg[opc_reg_to_gdb_regnum (opc.op[1].reg)];
1000 after_last_frame_setup_insn = next_pc;
1001 }
1002 else
1003 {
1004 /* Terminate the prologue scan. */
1005 break;
1006 }
1007
1008 pc = next_pc;
1009 }
1010
1011 /* Is the frame size (offset, really) a known constant? */
1012 if (pv_is_register (reg[RL78_SP_REGNUM], RL78_SP_REGNUM))
1013 result->frame_size = reg[RL78_SP_REGNUM].k;
1014
1015 /* Record where all the registers were saved. */
1016 stack.scan (check_for_saved, (void *) result);
1017
1018 result->prologue_end = after_last_frame_setup_insn;
1019 }
1020
1021 /* Implement the "addr_bits_remove" gdbarch method. */
1022
1023 static CORE_ADDR
1024 rl78_addr_bits_remove (struct gdbarch *gdbarch, CORE_ADDR addr)
1025 {
1026 return addr & 0xffffff;
1027 }
1028
1029 /* Implement the "address_to_pointer" gdbarch method. */
1030
1031 static void
1032 rl78_address_to_pointer (struct gdbarch *gdbarch,
1033 struct type *type, gdb_byte *buf, CORE_ADDR addr)
1034 {
1035 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1036
1037 store_unsigned_integer (buf, TYPE_LENGTH (type), byte_order,
1038 addr & 0xffffff);
1039 }
1040
1041 /* Implement the "pointer_to_address" gdbarch method. */
1042
1043 static CORE_ADDR
1044 rl78_pointer_to_address (struct gdbarch *gdbarch,
1045 struct type *type, const gdb_byte *buf)
1046 {
1047 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1048 CORE_ADDR addr
1049 = extract_unsigned_integer (buf, TYPE_LENGTH (type), byte_order);
1050
1051 /* Is it a code address? */
1052 if (TYPE_CODE (TYPE_TARGET_TYPE (type)) == TYPE_CODE_FUNC
1053 || TYPE_CODE (TYPE_TARGET_TYPE (type)) == TYPE_CODE_METHOD
1054 || TYPE_CODE_SPACE (TYPE_TARGET_TYPE (type))
1055 || TYPE_LENGTH (type) == 4)
1056 return rl78_make_instruction_address (addr);
1057 else
1058 return rl78_make_data_address (addr);
1059 }
1060
1061 /* Implement the "skip_prologue" gdbarch method. */
1062
1063 static CORE_ADDR
1064 rl78_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc)
1065 {
1066 const char *name;
1067 CORE_ADDR func_addr, func_end;
1068 struct rl78_prologue p;
1069
1070 /* Try to find the extent of the function that contains PC. */
1071 if (!find_pc_partial_function (pc, &name, &func_addr, &func_end))
1072 return pc;
1073
1074 rl78_analyze_prologue (pc, func_end, &p);
1075 return p.prologue_end;
1076 }
1077
1078 /* Implement the "unwind_pc" gdbarch method. */
1079
1080 static CORE_ADDR
1081 rl78_unwind_pc (struct gdbarch *arch, struct frame_info *next_frame)
1082 {
1083 return rl78_addr_bits_remove
1084 (arch, frame_unwind_register_unsigned (next_frame,
1085 RL78_PC_REGNUM));
1086 }
1087
1088 /* Implement the "unwind_sp" gdbarch method. */
1089
1090 static CORE_ADDR
1091 rl78_unwind_sp (struct gdbarch *arch, struct frame_info *next_frame)
1092 {
1093 return frame_unwind_register_unsigned (next_frame, RL78_SP_REGNUM);
1094 }
1095
1096 /* Given a frame described by THIS_FRAME, decode the prologue of its
1097 associated function if there is not cache entry as specified by
1098 THIS_PROLOGUE_CACHE. Save the decoded prologue in the cache and
1099 return that struct as the value of this function. */
1100
1101 static struct rl78_prologue *
1102 rl78_analyze_frame_prologue (struct frame_info *this_frame,
1103 void **this_prologue_cache)
1104 {
1105 if (!*this_prologue_cache)
1106 {
1107 CORE_ADDR func_start, stop_addr;
1108
1109 *this_prologue_cache = FRAME_OBSTACK_ZALLOC (struct rl78_prologue);
1110
1111 func_start = get_frame_func (this_frame);
1112 stop_addr = get_frame_pc (this_frame);
1113
1114 /* If we couldn't find any function containing the PC, then
1115 just initialize the prologue cache, but don't do anything. */
1116 if (!func_start)
1117 stop_addr = func_start;
1118
1119 rl78_analyze_prologue (func_start, stop_addr,
1120 (struct rl78_prologue *) *this_prologue_cache);
1121 }
1122
1123 return (struct rl78_prologue *) *this_prologue_cache;
1124 }
1125
1126 /* Given a frame and a prologue cache, return this frame's base. */
1127
1128 static CORE_ADDR
1129 rl78_frame_base (struct frame_info *this_frame, void **this_prologue_cache)
1130 {
1131 struct rl78_prologue *p
1132 = rl78_analyze_frame_prologue (this_frame, this_prologue_cache);
1133 CORE_ADDR sp = get_frame_register_unsigned (this_frame, RL78_SP_REGNUM);
1134
1135 return rl78_make_data_address (sp - p->frame_size);
1136 }
1137
1138 /* Implement the "frame_this_id" method for unwinding frames. */
1139
1140 static void
1141 rl78_this_id (struct frame_info *this_frame,
1142 void **this_prologue_cache, struct frame_id *this_id)
1143 {
1144 *this_id = frame_id_build (rl78_frame_base (this_frame,
1145 this_prologue_cache),
1146 get_frame_func (this_frame));
1147 }
1148
1149 /* Implement the "frame_prev_register" method for unwinding frames. */
1150
1151 static struct value *
1152 rl78_prev_register (struct frame_info *this_frame,
1153 void **this_prologue_cache, int regnum)
1154 {
1155 struct rl78_prologue *p
1156 = rl78_analyze_frame_prologue (this_frame, this_prologue_cache);
1157 CORE_ADDR frame_base = rl78_frame_base (this_frame, this_prologue_cache);
1158
1159 if (regnum == RL78_SP_REGNUM)
1160 return frame_unwind_got_constant (this_frame, regnum, frame_base);
1161
1162 else if (regnum == RL78_SPL_REGNUM)
1163 return frame_unwind_got_constant (this_frame, regnum,
1164 (frame_base & 0xff));
1165
1166 else if (regnum == RL78_SPH_REGNUM)
1167 return frame_unwind_got_constant (this_frame, regnum,
1168 ((frame_base >> 8) & 0xff));
1169
1170 /* If prologue analysis says we saved this register somewhere,
1171 return a description of the stack slot holding it. */
1172 else if (p->reg_offset[regnum] != 1)
1173 {
1174 struct value *rv =
1175 frame_unwind_got_memory (this_frame, regnum,
1176 frame_base + p->reg_offset[regnum]);
1177
1178 if (regnum == RL78_PC_REGNUM)
1179 {
1180 ULONGEST pc = rl78_make_instruction_address (value_as_long (rv));
1181
1182 return frame_unwind_got_constant (this_frame, regnum, pc);
1183 }
1184 return rv;
1185 }
1186
1187 /* Otherwise, presume we haven't changed the value of this
1188 register, and get it from the next frame. */
1189 else
1190 return frame_unwind_got_register (this_frame, regnum, regnum);
1191 }
1192
1193 static const struct frame_unwind rl78_unwind =
1194 {
1195 NORMAL_FRAME,
1196 default_frame_unwind_stop_reason,
1197 rl78_this_id,
1198 rl78_prev_register,
1199 NULL,
1200 default_frame_sniffer
1201 };
1202
1203 /* Implement the "dwarf_reg_to_regnum" gdbarch method. */
1204
1205 static int
1206 rl78_dwarf_reg_to_regnum (struct gdbarch *gdbarch, int reg)
1207 {
1208 if (0 <= reg && reg <= 31)
1209 {
1210 if ((reg & 1) == 0)
1211 /* Map even registers to their 16-bit counterparts which have a
1212 pointer type. This is usually what is required from the DWARF
1213 info. */
1214 return (reg >> 1) + RL78_BANK0_RP0_PTR_REGNUM;
1215 else
1216 return reg;
1217 }
1218 else if (reg == 32)
1219 return RL78_SP_REGNUM;
1220 else if (reg == 33)
1221 return -1; /* ap */
1222 else if (reg == 34)
1223 return RL78_PSW_REGNUM;
1224 else if (reg == 35)
1225 return RL78_ES_REGNUM;
1226 else if (reg == 36)
1227 return RL78_CS_REGNUM;
1228 else if (reg == 37)
1229 return RL78_PC_REGNUM;
1230 else
1231 return -1;
1232 }
1233
1234 /* Implement the `register_sim_regno' gdbarch method. */
1235
1236 static int
1237 rl78_register_sim_regno (struct gdbarch *gdbarch, int regnum)
1238 {
1239 gdb_assert (regnum < RL78_NUM_REGS);
1240
1241 /* So long as regnum is in [0, RL78_NUM_REGS), it's valid. We
1242 just want to override the default here which disallows register
1243 numbers which have no names. */
1244 return regnum;
1245 }
1246
1247 /* Implement the "return_value" gdbarch method. */
1248
1249 static enum return_value_convention
1250 rl78_return_value (struct gdbarch *gdbarch,
1251 struct value *function,
1252 struct type *valtype,
1253 struct regcache *regcache,
1254 gdb_byte *readbuf, const gdb_byte *writebuf)
1255 {
1256 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1257 ULONGEST valtype_len = TYPE_LENGTH (valtype);
1258 int is_g10 = gdbarch_tdep (gdbarch)->elf_flags & E_FLAG_RL78_G10;
1259
1260 if (valtype_len > 8)
1261 return RETURN_VALUE_STRUCT_CONVENTION;
1262
1263 if (readbuf)
1264 {
1265 ULONGEST u;
1266 int argreg = RL78_RAW_BANK1_R0_REGNUM;
1267 CORE_ADDR g10_raddr = 0xffec8;
1268 int offset = 0;
1269
1270 while (valtype_len > 0)
1271 {
1272 if (is_g10)
1273 u = read_memory_integer (g10_raddr, 1,
1274 gdbarch_byte_order (gdbarch));
1275 else
1276 regcache_cooked_read_unsigned (regcache, argreg, &u);
1277 store_unsigned_integer (readbuf + offset, 1, byte_order, u);
1278 valtype_len -= 1;
1279 offset += 1;
1280 argreg++;
1281 g10_raddr++;
1282 }
1283 }
1284
1285 if (writebuf)
1286 {
1287 ULONGEST u;
1288 int argreg = RL78_RAW_BANK1_R0_REGNUM;
1289 CORE_ADDR g10_raddr = 0xffec8;
1290 int offset = 0;
1291
1292 while (valtype_len > 0)
1293 {
1294 u = extract_unsigned_integer (writebuf + offset, 1, byte_order);
1295 if (is_g10) {
1296 gdb_byte b = u & 0xff;
1297 write_memory (g10_raddr, &b, 1);
1298 }
1299 else
1300 regcache_cooked_write_unsigned (regcache, argreg, u);
1301 valtype_len -= 1;
1302 offset += 1;
1303 argreg++;
1304 g10_raddr++;
1305 }
1306 }
1307
1308 return RETURN_VALUE_REGISTER_CONVENTION;
1309 }
1310
1311
1312 /* Implement the "frame_align" gdbarch method. */
1313
1314 static CORE_ADDR
1315 rl78_frame_align (struct gdbarch *gdbarch, CORE_ADDR sp)
1316 {
1317 return rl78_make_data_address (align_down (sp, 2));
1318 }
1319
1320
1321 /* Implement the "dummy_id" gdbarch method. */
1322
1323 static struct frame_id
1324 rl78_dummy_id (struct gdbarch *gdbarch, struct frame_info *this_frame)
1325 {
1326 return
1327 frame_id_build (rl78_make_data_address
1328 (get_frame_register_unsigned
1329 (this_frame, RL78_SP_REGNUM)),
1330 get_frame_pc (this_frame));
1331 }
1332
1333
1334 /* Implement the "push_dummy_call" gdbarch method. */
1335
1336 static CORE_ADDR
1337 rl78_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
1338 struct regcache *regcache, CORE_ADDR bp_addr,
1339 int nargs, struct value **args, CORE_ADDR sp,
1340 int struct_return, CORE_ADDR struct_addr)
1341 {
1342 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1343 gdb_byte buf[4];
1344 int i;
1345
1346 /* Push arguments in reverse order. */
1347 for (i = nargs - 1; i >= 0; i--)
1348 {
1349 struct type *value_type = value_enclosing_type (args[i]);
1350 int len = TYPE_LENGTH (value_type);
1351 int container_len = (len + 1) & ~1;
1352
1353 sp -= container_len;
1354 write_memory (rl78_make_data_address (sp),
1355 value_contents_all (args[i]), len);
1356 }
1357
1358 /* Store struct value address. */
1359 if (struct_return)
1360 {
1361 store_unsigned_integer (buf, 2, byte_order, struct_addr);
1362 sp -= 2;
1363 write_memory (rl78_make_data_address (sp), buf, 2);
1364 }
1365
1366 /* Store return address. */
1367 sp -= 4;
1368 store_unsigned_integer (buf, 4, byte_order, bp_addr);
1369 write_memory (rl78_make_data_address (sp), buf, 4);
1370
1371 /* Finally, update the stack pointer... */
1372 regcache_cooked_write_unsigned (regcache, RL78_SP_REGNUM, sp);
1373
1374 /* DWARF2/GCC uses the stack address *before* the function call as a
1375 frame's CFA. */
1376 return rl78_make_data_address (sp + 4);
1377 }
1378
1379 /* Allocate and initialize a gdbarch object. */
1380
1381 static struct gdbarch *
1382 rl78_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
1383 {
1384 struct gdbarch *gdbarch;
1385 struct gdbarch_tdep *tdep;
1386 int elf_flags;
1387
1388 /* Extract the elf_flags if available. */
1389 if (info.abfd != NULL
1390 && bfd_get_flavour (info.abfd) == bfd_target_elf_flavour)
1391 elf_flags = elf_elfheader (info.abfd)->e_flags;
1392 else
1393 elf_flags = 0;
1394
1395
1396 /* Try to find the architecture in the list of already defined
1397 architectures. */
1398 for (arches = gdbarch_list_lookup_by_info (arches, &info);
1399 arches != NULL;
1400 arches = gdbarch_list_lookup_by_info (arches->next, &info))
1401 {
1402 if (gdbarch_tdep (arches->gdbarch)->elf_flags != elf_flags)
1403 continue;
1404
1405 return arches->gdbarch;
1406 }
1407
1408 /* None found, create a new architecture from the information
1409 provided. */
1410 tdep = XCNEW (struct gdbarch_tdep);
1411 gdbarch = gdbarch_alloc (&info, tdep);
1412 tdep->elf_flags = elf_flags;
1413
1414 /* Initialize types. */
1415 tdep->rl78_void = arch_type (gdbarch, TYPE_CODE_VOID, TARGET_CHAR_BIT,
1416 "void");
1417 tdep->rl78_uint8 = arch_integer_type (gdbarch, 8, 1, "uint8_t");
1418 tdep->rl78_int8 = arch_integer_type (gdbarch, 8, 0, "int8_t");
1419 tdep->rl78_uint16 = arch_integer_type (gdbarch, 16, 1, "uint16_t");
1420 tdep->rl78_int16 = arch_integer_type (gdbarch, 16, 0, "int16_t");
1421 tdep->rl78_uint32 = arch_integer_type (gdbarch, 32, 1, "uint32_t");
1422 tdep->rl78_int32 = arch_integer_type (gdbarch, 32, 0, "int32_t");
1423
1424 tdep->rl78_data_pointer
1425 = arch_pointer_type (gdbarch, 16, "rl78_data_addr_t", tdep->rl78_void);
1426 tdep->rl78_code_pointer
1427 = arch_pointer_type (gdbarch, 32, "rl78_code_addr_t", tdep->rl78_void);
1428
1429 /* Registers. */
1430 set_gdbarch_num_regs (gdbarch, RL78_NUM_REGS);
1431 set_gdbarch_num_pseudo_regs (gdbarch, RL78_NUM_PSEUDO_REGS);
1432 if (tdep->elf_flags & E_FLAG_RL78_G10)
1433 set_gdbarch_register_name (gdbarch, rl78_g10_register_name);
1434 else
1435 set_gdbarch_register_name (gdbarch, rl78_register_name);
1436 set_gdbarch_register_type (gdbarch, rl78_register_type);
1437 set_gdbarch_pc_regnum (gdbarch, RL78_PC_REGNUM);
1438 set_gdbarch_sp_regnum (gdbarch, RL78_SP_REGNUM);
1439 set_gdbarch_pseudo_register_read (gdbarch, rl78_pseudo_register_read);
1440 set_gdbarch_pseudo_register_write (gdbarch, rl78_pseudo_register_write);
1441 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, rl78_dwarf_reg_to_regnum);
1442 set_gdbarch_register_reggroup_p (gdbarch, rl78_register_reggroup_p);
1443 set_gdbarch_register_sim_regno (gdbarch, rl78_register_sim_regno);
1444
1445 /* Data types. */
1446 set_gdbarch_char_signed (gdbarch, 0);
1447 set_gdbarch_short_bit (gdbarch, 16);
1448 set_gdbarch_int_bit (gdbarch, 16);
1449 set_gdbarch_long_bit (gdbarch, 32);
1450 set_gdbarch_long_long_bit (gdbarch, 64);
1451 set_gdbarch_ptr_bit (gdbarch, 16);
1452 set_gdbarch_addr_bit (gdbarch, 32);
1453 set_gdbarch_dwarf2_addr_size (gdbarch, 4);
1454 set_gdbarch_float_bit (gdbarch, 32);
1455 set_gdbarch_float_format (gdbarch, floatformats_ieee_single);
1456 set_gdbarch_double_bit (gdbarch, 32);
1457 set_gdbarch_long_double_bit (gdbarch, 64);
1458 set_gdbarch_double_format (gdbarch, floatformats_ieee_single);
1459 set_gdbarch_long_double_format (gdbarch, floatformats_ieee_double);
1460 set_gdbarch_pointer_to_address (gdbarch, rl78_pointer_to_address);
1461 set_gdbarch_address_to_pointer (gdbarch, rl78_address_to_pointer);
1462 set_gdbarch_addr_bits_remove (gdbarch, rl78_addr_bits_remove);
1463
1464 /* Breakpoints. */
1465 set_gdbarch_breakpoint_kind_from_pc (gdbarch, rl78_breakpoint::kind_from_pc);
1466 set_gdbarch_sw_breakpoint_from_kind (gdbarch, rl78_breakpoint::bp_from_kind);
1467 set_gdbarch_decr_pc_after_break (gdbarch, 1);
1468
1469 /* Frames, prologues, etc. */
1470 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
1471 set_gdbarch_skip_prologue (gdbarch, rl78_skip_prologue);
1472 set_gdbarch_unwind_pc (gdbarch, rl78_unwind_pc);
1473 set_gdbarch_unwind_sp (gdbarch, rl78_unwind_sp);
1474 set_gdbarch_frame_align (gdbarch, rl78_frame_align);
1475
1476 dwarf2_append_unwinders (gdbarch);
1477 frame_unwind_append_unwinder (gdbarch, &rl78_unwind);
1478
1479 /* Dummy frames, return values. */
1480 set_gdbarch_dummy_id (gdbarch, rl78_dummy_id);
1481 set_gdbarch_push_dummy_call (gdbarch, rl78_push_dummy_call);
1482 set_gdbarch_return_value (gdbarch, rl78_return_value);
1483
1484 /* Virtual tables. */
1485 set_gdbarch_vbit_in_delta (gdbarch, 1);
1486
1487 return gdbarch;
1488 }
1489
1490 /* Register the above initialization routine. */
1491
1492 void
1493 _initialize_rl78_tdep (void)
1494 {
1495 register_gdbarch_init (bfd_arch_rl78, rl78_gdbarch_init);
1496 }
target_gdbarch
struct gdbarch * target_gdbarch(void)
Definition: gdbarch.c:5467
set_gdbarch_num_regs
void set_gdbarch_num_regs(struct gdbarch *gdbarch, int num_regs)
Definition: gdbarch.c:2050
gdbarch
Definition: gdbarch.c:127
rl78_g10_register_name
static const char * rl78_g10_register_name(struct gdbarch *gdbarch, int regnr)
Definition: rl78-tdep.c:452
set_gdbarch_double_bit
void set_gdbarch_double_bit(struct gdbarch *gdbarch, int double_bit)
Definition: gdbarch.c:1723
set_gdbarch_frame_align
void set_gdbarch_frame_align(struct gdbarch *gdbarch, gdbarch_frame_align_ftype frame_align)
Definition: gdbarch.c:3151
set_gdbarch_float_format
void set_gdbarch_float_format(struct gdbarch *gdbarch, const struct floatformat **float_format)
Definition: gdbarch.c:1706
RL78_RAW_BANK2_R7_REGNUM
Definition: rl78-tdep.c:83
RL78_RAW_BANK2_R2_REGNUM
Definition: rl78-tdep.c:78
RL78_BANK2_R5_REGNUM
Definition: rl78-tdep.c:148
gdbarch_tdep::rl78_int8
struct type * rl78_int8
Definition: rl78-tdep.c:217
rl78_unwind
static const struct frame_unwind rl78_unwind
Definition: rl78-tdep.c:1193
RL78_H_REGNUM
Definition: rl78-tdep.c:118
frame_id_build
struct frame_id frame_id_build(CORE_ADDR stack_addr, CORE_ADDR code_addr)
Definition: frame.c:624
RL78_RAW_BANK3_R6_REGNUM
Definition: rl78-tdep.c:91
RL78_BANK3_RP0_REGNUM
Definition: rl78-tdep.c:176
arch_type
struct type * arch_type(struct gdbarch *gdbarch, enum type_code code, int bit, const char *name)
Definition: gdbtypes.c:4941
RL78_BANK2_RP3_REGNUM
Definition: rl78-tdep.c:174
rl78_prologue::frame_ptr_offset
int frame_ptr_offset
Definition: rl78-tdep.c:251
REG_VALID
Definition: common-regcache.h:32
RL78_A_REGNUM
Definition: rl78-tdep.c:112
gdbarch_tdep::rl78_uint16
struct type * rl78_uint16
Definition: rl78-tdep.c:217
rl78_push_dummy_call
static CORE_ADDR rl78_push_dummy_call(struct gdbarch *gdbarch, struct value *function, struct regcache *regcache, CORE_ADDR bp_addr, int nargs, struct value **args, CORE_ADDR sp, int struct_return, CORE_ADDR struct_addr)
Definition: rl78-tdep.c:1337
set_gdbarch_float_bit
void set_gdbarch_float_bit(struct gdbarch *gdbarch, int float_bit)
Definition: gdbarch.c:1690
RL78_BANK0_RP0_PTR_REGNUM
Definition: rl78-tdep.c:184
set_gdbarch_dwarf2_addr_size
void set_gdbarch_dwarf2_addr_size(struct gdbarch *gdbarch, int dwarf2_addr_size)
Definition: gdbarch.c:1877
get_frame_pc
CORE_ADDR get_frame_pc(struct frame_info *frame)
Definition: frame.c:2376
RL78_RAW_BANK3_R7_REGNUM
Definition: rl78-tdep.c:92
RL78_BANK3_R5_REGNUM
Definition: rl78-tdep.c:157
CORE_ADDR
bfd_vma CORE_ADDR
Definition: common-types.h:41
RL78_RAW_BANK1_R6_REGNUM
Definition: rl78-tdep.c:73
pv_add_constant
pv_t pv_add_constant(pv_t v, CORE_ADDR k)
Definition: prologue-value.c:105
RL78_RAW_BANK2_R0_REGNUM
Definition: rl78-tdep.c:76
floatformats_ieee_double
const struct floatformat * floatformats_ieee_double[BFD_ENDIAN_UNKNOWN]
Definition: gdbtypes.c:76
rl78_analyze_frame_prologue
static struct rl78_prologue * rl78_analyze_frame_prologue(struct frame_info *this_frame, void **this_prologue_cache)
Definition: rl78-tdep.c:1102
RL78_RAW_BANK1_R3_REGNUM
Definition: rl78-tdep.c:70
gdbarch_tdep::rl78_int32
struct type * rl78_int32
Definition: rl78-tdep.c:217
RL78_BANK1_RP2_PTR_REGNUM
Definition: rl78-tdep.c:191
RL78_BANK3_R7_REGNUM
Definition: rl78-tdep.c:159
RL78_BANK0_RP1_PTR_REGNUM
Definition: rl78-tdep.c:185
value_as_long
LONGEST value_as_long(struct value *val)
Definition: value.c:2749
frame_unwind_got_memory
struct value * frame_unwind_got_memory(struct frame_info *frame, int regnum, CORE_ADDR addr)
Definition: frame-unwind.c:233
RL78_BANK1_RP0_REGNUM
Definition: rl78-tdep.c:166
set_gdbarch_addr_bits_remove
void set_gdbarch_addr_bits_remove(struct gdbarch *gdbarch, gdbarch_addr_bits_remove_ftype addr_bits_remove)
Definition: gdbarch.c:3218
value_enclosing_type
struct type * value_enclosing_type(const struct value *value)
Definition: value.c:1175
rl78_unwind_sp
static CORE_ADDR rl78_unwind_sp(struct gdbarch *arch, struct frame_info *next_frame)
Definition: rl78-tdep.c:1091
RL78_BANK0_RP2_REGNUM
Definition: rl78-tdep.c:163
RL78_BANK1_R1_REGNUM
Definition: rl78-tdep.c:135
RETURN_VALUE_STRUCT_CONVENTION
Definition: defs.h:258
prologue-value.h
align_down
ULONGEST align_down(ULONGEST v, int n)
Definition: utils.c:3005
frame_unwind_register_unsigned
ULONGEST frame_unwind_register_unsigned(struct frame_info *frame, int regnum)
Definition: frame.c:1279
RL78_BANK1_R4_REGNUM
Definition: rl78-tdep.c:138
reggroups.h
set_gdbarch_short_bit
void set_gdbarch_short_bit(struct gdbarch *gdbarch, int short_bit)
Definition: gdbarch.c:1572
prologue_value
Definition: prologue-value.h:140
RL78_BANK0_RP3_REGNUM
Definition: rl78-tdep.c:164
RL78_BANK0_R4_REGNUM
Definition: rl78-tdep.c:129
pv_is_register
int pv_is_register(pv_t a, int r)
Definition: prologue-value.c:216
memset
void * memset(T *s, int c, size_t n)=delete
internal_error
void internal_error(const char *file, int line, const char *fmt,...)
Definition: errors.c:50
RL78_BANK0_RP0_REGNUM
Definition: rl78-tdep.c:161
gdbarch_tdep
Definition: aarch64-tdep.h:55
return_value_convention
return_value_convention
Definition: defs.h:247
RL78_BANK1_R7_REGNUM
Definition: rl78-tdep.c:141
set_gdbarch_register_reggroup_p
void set_gdbarch_register_reggroup_p(struct gdbarch *gdbarch, gdbarch_register_reggroup_p_ftype register_reggroup_p)
Definition: gdbarch.c:3599
RL78_RAW_BANK0_R3_REGNUM
Definition: rl78-tdep.c:61
check_for_saved
static void check_for_saved(void *result_untyped, pv_t addr, CORE_ADDR size, pv_t value)
Definition: rl78-tdep.c:893
RL78_BANK0_RP3_PTR_REGNUM
Definition: rl78-tdep.c:187
RL78_BANK3_R6_REGNUM
Definition: rl78-tdep.c:158
frame_info
Definition: frame.c:85
gdbarch_list_lookup_by_info
struct gdbarch_list * gdbarch_list_lookup_by_info(struct gdbarch_list *arches, const struct gdbarch_info *info)
Definition: gdbarch.c:5309
register_status
register_status
Definition: common-regcache.h:25
RL78_BANK0_R3_REGNUM
Definition: rl78-tdep.c:128
gdbarch_list::next
struct gdbarch_list * next
Definition: gdbarch.h:1623
restore_reggroup
struct reggroup *const restore_reggroup
Definition: reggroups.c:320
RL78_RAW_BANK1_R0_REGNUM
Definition: rl78-tdep.c:67
RL78_SPH_REGNUM
Definition: rl78-tdep.c:101
RL78_C_REGNUM
Definition: rl78-tdep.c:113
all_reggroup
struct reggroup *const all_reggroup
Definition: reggroups.c:318
_
#define _(String)
Definition: gdb_locale.h:35
prologue_value::k
CORE_ADDR k
Definition: prologue-value.h:149
rl78_prologue::prologue_end
CORE_ADDR prologue_end
Definition: rl78-tdep.c:256
RL78_RAW_BANK0_R1_REGNUM
Definition: rl78-tdep.c:59
set_gdbarch_dwarf2_reg_to_regnum
void set_gdbarch_dwarf2_reg_to_regnum(struct gdbarch *gdbarch, gdbarch_dwarf2_reg_to_regnum_ftype dwarf2_reg_to_regnum)
Definition: gdbarch.c:2275
defs.h
rl78_unwind_pc
static CORE_ADDR rl78_unwind_pc(struct gdbarch *arch, struct frame_info *next_frame)
Definition: rl78-tdep.c:1081
RL78_CS_REGNUM
Definition: rl78-tdep.c:96
gdbarch_tdep
struct gdbarch_tdep * gdbarch_tdep(struct gdbarch *gdbarch)
Definition: gdbarch.c:1491
RL78_BANK1_RP3_PTR_REGNUM
Definition: rl78-tdep.c:192
RL78_RAW_BANK2_R6_REGNUM
Definition: rl78-tdep.c:82
reggroup
Definition: reggroups.c:33
frame_unwind_append_unwinder
void frame_unwind_append_unwinder(struct gdbarch *gdbarch, const struct frame_unwind *unwinder)
Definition: frame-unwind.c:79
RL78_RAW_BANK1_R4_REGNUM
Definition: rl78-tdep.c:71
RL78_BANK2_R4_REGNUM
Definition: rl78-tdep.c:147
rl78_break_insn
constexpr gdb_byte rl78_break_insn[]
Definition: rl78-tdep.c:799
FRAME_OBSTACK_ZALLOC
#define FRAME_OBSTACK_ZALLOC(TYPE)
Definition: frame.h:678
TYPE_CODE_SPACE
#define TYPE_CODE_SPACE(t)
Definition: gdbtypes.h:354
RL78_BANK2_RP2_REGNUM
Definition: rl78-tdep.c:173
arch_integer_type
struct type * arch_integer_type(struct gdbarch *gdbarch, int bit, int unsigned_p, const char *name)
Definition: gdbtypes.c:4962
arch-utils.h
RL78_BANK0_R6_REGNUM
Definition: rl78-tdep.c:131
frame_unwind_got_constant
struct value * frame_unwind_got_constant(struct frame_info *frame, int regnum, ULONGEST val)
Definition: frame-unwind.c:246
RL78_BANK1_R6_REGNUM
Definition: rl78-tdep.c:140
RL78_BANK3_RP3_PTR_REGNUM
Definition: rl78-tdep.c:202
RL78_BANK3_RP2_REGNUM
Definition: rl78-tdep.c:178
RL78_DE_REGNUM
Definition: rl78-tdep.c:122
RL78_PSW_REGNUM
Definition: rl78-tdep.c:94
TYPE_CODE_VOID
Definition: gdbtypes.h:124
set_gdbarch_addr_bit
void set_gdbarch_addr_bit(struct gdbarch *gdbarch, int addr_bit)
Definition: gdbarch.c:1859
name
const char *const name
Definition: aarch64-tdep.c:76
RL78_BANK1_R3_REGNUM
Definition: rl78-tdep.c:137
rl78_register_reggroup_p
static int rl78_register_reggroup_p(struct gdbarch *gdbarch, int regnum, struct reggroup *group)
Definition: rl78-tdep.c:587
rl78_dummy_id
static struct frame_id rl78_dummy_id(struct gdbarch *gdbarch, struct frame_info *this_frame)
Definition: rl78-tdep.c:1324
pvk_register
Definition: prologue-value.h:40
set_gdbarch_pseudo_register_write
void set_gdbarch_pseudo_register_write(struct gdbarch *gdbarch, gdbarch_pseudo_register_write_ftype pseudo_register_write)
Definition: gdbarch.c:2032
set_gdbarch_register_type
void set_gdbarch_register_type(struct gdbarch *gdbarch, gdbarch_register_type_ftype register_type)
Definition: gdbarch.c:2316
arch_flags_type
struct type * arch_flags_type(struct gdbarch *gdbarch, const char *name, int bit)
Definition: gdbtypes.c:5076
read_memory_integer
LONGEST read_memory_integer(CORE_ADDR memaddr, int len, enum bfd_endian byte_order)
Definition: corefile.c:316
rl78_this_id
static void rl78_this_id(struct frame_info *this_frame, void **this_prologue_cache, struct frame_id *this_id)
Definition: rl78-tdep.c:1141
RL78_BANK1_RP2_REGNUM
Definition: rl78-tdep.c:168
NORMAL_FRAME
Definition: frame.h:244
RL78_BANK3_RP0_PTR_REGNUM
Definition: rl78-tdep.c:199
general_reggroup
struct reggroup *const general_reggroup
Definition: reggroups.c:314
gdbarch_tdep::rl78_uint32
struct type * rl78_uint32
Definition: rl78-tdep.c:217
rl78_prologue::reg_offset
int reg_offset[RL78_NUM_TOTAL_REGS]
Definition: rl78-tdep.c:261
RL78_BANK3_R4_REGNUM
Definition: rl78-tdep.c:156
RL78_SPL_REGNUM
Definition: rl78-tdep.c:100
RL78_BANK1_RP1_PTR_REGNUM
Definition: rl78-tdep.c:190
value::reg
struct value::@186::@187 reg
RL78_RAW_BANK0_R7_REGNUM
Definition: rl78-tdep.c:65
rl78_pseudo_register_write
static void rl78_pseudo_register_write(struct gdbarch *gdbarch, struct regcache *regcache, int reg, const gdb_byte *buffer)
Definition: rl78-tdep.c:725
RL78_PC_REGNUM
Definition: rl78-tdep.c:108
rl78_prologue::has_frame_ptr
int has_frame_ptr
Definition: rl78-tdep.c:246
RL78_HL_REGNUM
Definition: rl78-tdep.c:123
rl78_get_opcode_byte
static int rl78_get_opcode_byte(void *handle)
Definition: rl78-tdep.c:868
RL78_BANK0_R1_REGNUM
Definition: rl78-tdep.c:126
extract_unsigned_integer
static ULONGEST extract_unsigned_integer(const gdb_byte *addr, int len, enum bfd_endian byte_order)
Definition: defs.h:577
regcache_cooked_read_unsigned
enum register_status regcache_cooked_read_unsigned(struct regcache *regcache, int regnum, ULONGEST *val)
Definition: regcache.c:777
system_reggroup
struct reggroup *const system_reggroup
Definition: reggroups.c:316
regcache.h
set_gdbarch_sp_regnum
void set_gdbarch_sp_regnum(struct gdbarch *gdbarch, int sp_regnum)
Definition: gdbarch.c:2156
RL78_BANK2_R1_REGNUM
Definition: rl78-tdep.c:144
RL78_RAW_BANK0_R4_REGNUM
Definition: rl78-tdep.c:62
gdbarch_info::abfd
bfd * abfd
Definition: gdbarch.h:1637
set_gdbarch_decr_pc_after_break
void set_gdbarch_decr_pc_after_break(struct gdbarch *gdbarch, CORE_ADDR decr_pc_after_break)
Definition: gdbarch.c:2980
set_gdbarch_dummy_id
void set_gdbarch_dummy_id(struct gdbarch *gdbarch, gdbarch_dummy_id_ftype dummy_id)
Definition: gdbarch.c:2340
RL78_ES_REGNUM
Definition: rl78-tdep.c:95
gdbarch_tdep::rl78_void
struct type * rl78_void
Definition: rl78-tdep.c:217
RL78_RAW_BANK0_R0_REGNUM
Definition: rl78-tdep.c:58
struct_return
struct_return
Definition: arm-tdep.h:88
set_gdbarch_address_to_pointer
void set_gdbarch_address_to_pointer(struct gdbarch *gdbarch, gdbarch_address_to_pointer_ftype address_to_pointer)
Definition: gdbarch.c:2690
value_contents_all
const gdb_byte * value_contents_all(struct value *value)
Definition: value.c:1265
frame.h
BP_MANIPULATION
typedef BP_MANIPULATION(rl78_break_insn)
Definition: rl78-tdep.c:801
gdb_assert_not_reached
#define gdb_assert_not_reached(message)
Definition: gdb_assert.h:55
gdbarch_tdep::rl78_data_pointer
struct type * rl78_data_pointer
Definition: rl78-tdep.c:217
gdbarch_byte_order
enum bfd_endian gdbarch_byte_order(struct gdbarch *gdbarch)
Definition: gdbarch.c:1509
set_gdbarch_register_sim_regno
void set_gdbarch_register_sim_regno(struct gdbarch *gdbarch, gdbarch_register_sim_regno_ftype register_sim_regno)
Definition: gdbarch.c:2514
arch_pointer_type
struct type * arch_pointer_type(struct gdbarch *gdbarch, int bit, const char *name, struct type *target_type)
Definition: gdbtypes.c:5061
TARGET_CHAR_BIT
#define TARGET_CHAR_BIT
Definition: host-defs.h:29
RL78_BANK1_RP0_PTR_REGNUM
Definition: rl78-tdep.c:189
type
Definition: gdbtypes.h:749
find_pc_partial_function
int find_pc_partial_function(CORE_ADDR pc, const char **name, CORE_ADDR *address, CORE_ADDR *endaddr)
Definition: blockframe.c:320
RL78_BANK0
Definition: rl78-tdep.c:45
opc_reg_to_gdb_regnum
static int opc_reg_to_gdb_regnum(int opcreg)
Definition: rl78-tdep.c:811
RL78_BANK0_RP2_PTR_REGNUM
Definition: rl78-tdep.c:186
frame-unwind.h
RL78_BANK3_R0_REGNUM
Definition: rl78-tdep.c:152
set_gdbarch_unwind_pc
void set_gdbarch_unwind_pc(struct gdbarch *gdbarch, gdbarch_unwind_pc_ftype unwind_pc)
Definition: gdbarch.c:3079
RL78_RAW_BANK0_R6_REGNUM
Definition: rl78-tdep.c:64
default_frame_sniffer
int default_frame_sniffer(const struct frame_unwind *self, struct frame_info *this_frame, void **this_prologue_cache)
Definition: frame-unwind.c:174
pv_area::store
void store(pv_t addr, CORE_ADDR size, pv_t value)
Definition: prologue-value.c:409
rl78_make_instruction_address
static CORE_ADDR rl78_make_instruction_address(CORE_ADDR addr)
Definition: rl78-tdep.c:626
pv_area::scan
void scan(void(*func)(void *closure, pv_t addr, CORE_ADDR size, pv_t value), void *closure)
Definition: prologue-value.c:524
append_flags_type_flag
void append_flags_type_flag(struct type *type, int bitpos, const char *name)
Definition: gdbtypes.c:5119
status
mach_port_t mach_port_t name mach_port_t mach_port_t name kern_return_t int status
Definition: gnu-nat.c:1822
rl78_make_data_address
static CORE_ADDR rl78_make_data_address(CORE_ADDR addr)
Definition: rl78-tdep.c:634
RL78_RAW_BANK1_R2_REGNUM
Definition: rl78-tdep.c:69
pv_area
Definition: prologue-value.h:226
RL78_AX_REGNUM
Definition: rl78-tdep.c:120
rl78_pseudo_register_read
static enum register_status rl78_pseudo_register_read(struct gdbarch *gdbarch, struct regcache *regcache, int reg, gdb_byte *buffer)
Definition: rl78-tdep.c:642
set_gdbarch_pointer_to_address
void set_gdbarch_pointer_to_address(struct gdbarch *gdbarch, gdbarch_pointer_to_address_ftype pointer_to_address)
Definition: gdbarch.c:2673
gdbarch_addr_bit
int gdbarch_addr_bit(struct gdbarch *gdbarch)
Definition: gdbarch.c:1848
set_gdbarch_unwind_sp
void set_gdbarch_unwind_sp(struct gdbarch *gdbarch, gdbarch_unwind_sp_ftype unwind_sp)
Definition: gdbarch.c:3103
RL78_BANK2_RP2_PTR_REGNUM
Definition: rl78-tdep.c:196
RL78_BANK3_RP1_PTR_REGNUM
Definition: rl78-tdep.c:200
gdbarch_list::gdbarch
struct gdbarch * gdbarch
Definition: gdbarch.h:1622
regnum
int regnum
Definition: aarch64-tdep.c:77
frame_base
Definition: frame-base.h:58
rl78_addr_bits_remove
static CORE_ADDR rl78_addr_bits_remove(struct gdbarch *gdbarch, CORE_ADDR addr)
Definition: rl78-tdep.c:1024
RL78_RAW_BANK1_R7_REGNUM
Definition: rl78-tdep.c:74
rl78_prev_register
static struct value * rl78_prev_register(struct frame_info *this_frame, void **this_prologue_cache, int regnum)
Definition: rl78-tdep.c:1152
get_frame_register_unsigned
ULONGEST get_frame_register_unsigned(struct frame_info *frame, int regnum)
Definition: frame.c:1308
RL78_NUM_TOTAL_REGS
Definition: rl78-tdep.c:204
frame-base.h
set_gdbarch_breakpoint_kind_from_pc
void set_gdbarch_breakpoint_kind_from_pc(struct gdbarch *gdbarch, gdbarch_breakpoint_kind_from_pc_ftype breakpoint_kind_from_pc)
Definition: gdbarch.c:2871
set_gdbarch_long_long_bit
void set_gdbarch_long_long_bit(struct gdbarch *gdbarch, int long_long_bit)
Definition: gdbarch.c:1623
RL78_BANK1_RP1_REGNUM
Definition: rl78-tdep.c:167
TYPE_CODE_FUNC
Definition: gdbtypes.h:110
rl78_analyze_prologue
static void rl78_analyze_prologue(CORE_ADDR start_pc, CORE_ADDR limit_pc, struct rl78_prologue *result)
Definition: rl78-tdep.c:909
reg
Definition: regdef.h:22
RL78_SP_REGNUM
Definition: rl78-tdep.c:109
gdb_assert
#define gdb_assert(expr)
Definition: gdb_assert.h:32
RL78_RAW_BANK3_R4_REGNUM
Definition: rl78-tdep.c:89
value
Definition: value.c:169
RL78_BANK0_R5_REGNUM
Definition: rl78-tdep.c:130
RL78_RAW_PC_REGNUM
Definition: rl78-tdep.c:97
floatformats_ieee_single
const struct floatformat * floatformats_ieee_single[BFD_ENDIAN_UNKNOWN]
Definition: gdbtypes.c:72
RL78_BANK3_R2_REGNUM
Definition: rl78-tdep.c:154
RL78_RAW_BANK3_R5_REGNUM
Definition: rl78-tdep.c:90
rl78_frame_align
static CORE_ADDR rl78_frame_align(struct gdbarch *gdbarch, CORE_ADDR sp)
Definition: rl78-tdep.c:1315
gdbarch_tdep::rl78_int16
struct type * rl78_int16
Definition: rl78-tdep.c:217
_initialize_rl78_tdep
void _initialize_rl78_tdep(void)
Definition: rl78-tdep.c:1493
RL78_BANK3_R1_REGNUM
Definition: rl78-tdep.c:153
RL78_BANK0_R7_REGNUM
Definition: rl78-tdep.c:132
core_addr_lessthan
int core_addr_lessthan(CORE_ADDR lhs, CORE_ADDR rhs)
Definition: arch-utils.c:117
gdb_byte
bfd_byte gdb_byte
Definition: common-types.h:38
rl78_return_value
static enum return_value_convention rl78_return_value(struct gdbarch *gdbarch, struct value *function, struct type *valtype, struct regcache *regcache, gdb_byte *readbuf, const gdb_byte *writebuf)
Definition: rl78-tdep.c:1250
RL78_RAW_BANK1_R5_REGNUM
Definition: rl78-tdep.c:72
RL78_BANK2_RP0_REGNUM
Definition: rl78-tdep.c:171
RL78_MEM_REGNUM
Definition: rl78-tdep.c:103
RL78_BANK3
Definition: rl78-tdep.c:48
set_gdbarch_pseudo_register_read
void set_gdbarch_pseudo_register_read(struct gdbarch *gdbarch, gdbarch_pseudo_register_read_ftype pseudo_register_read)
Definition: gdbarch.c:1984
gdbarch_tdep::rl78_uint8
struct type * rl78_uint8
Definition: rl78-tdep.c:217
RL78_RAW_BANK2_R3_REGNUM
Definition: rl78-tdep.c:79
set_gdbarch_char_signed
void set_gdbarch_char_signed(struct gdbarch *gdbarch, int char_signed)
Definition: gdbarch.c:1895
gdbarch_tdep::rl78_psw_type
struct type * rl78_psw_type
Definition: rl78-tdep.c:217
TYPE_TARGET_TYPE
#define TYPE_TARGET_TYPE(thistype)
Definition: gdbtypes.h:1226
rl78_dwarf_reg_to_regnum
static int rl78_dwarf_reg_to_regnum(struct gdbarch *gdbarch, int reg)
Definition: rl78-tdep.c:1206
dwarf2-frame.h
RL78_PMC_REGNUM
Definition: rl78-tdep.c:102
RL78_BANK2_R0_REGNUM
Definition: rl78-tdep.c:143
rl78_register_type
static struct type * rl78_register_type(struct gdbarch *gdbarch, int reg_nr)
Definition: rl78-tdep.c:291
XCNEW
#define XCNEW(T)
Definition: poison.h:121
gdbcore.h
rl78_register_sim_regno
static int rl78_register_sim_regno(struct gdbarch *gdbarch, int regnum)
Definition: rl78-tdep.c:1237
TYPE_CODE
#define TYPE_CODE(thistype)
Definition: gdbtypes.h:1238
regcache_raw_read
enum register_status regcache_raw_read(struct regcache *regcache, int regnum, gdb_byte *buf)
Definition: regcache.c:565
regcache_cooked_write_unsigned
void regcache_cooked_write_unsigned(struct regcache *regcache, int regnum, ULONGEST val)
Definition: regcache.c:806
frame_unwind_got_register
struct value * frame_unwind_got_register(struct frame_info *frame, int regnum, int new_regnum)
Definition: frame-unwind.c:223
target_read_memory
int target_read_memory(CORE_ADDR memaddr, gdb_byte *myaddr, ssize_t len)
Definition: target.c:1370
set_gdbarch_int_bit
void set_gdbarch_int_bit(struct gdbarch *gdbarch, int int_bit)
Definition: gdbarch.c:1589
rl78_pointer_to_address
static CORE_ADDR rl78_pointer_to_address(struct gdbarch *gdbarch, struct type *type, const gdb_byte *buf)
Definition: rl78-tdep.c:1044
RL78_BANK2_RP0_PTR_REGNUM
Definition: rl78-tdep.c:194
offset
int offset
Definition: agent.c:65
buffer
Definition: buffer.h:23
set_gdbarch_num_pseudo_regs
void set_gdbarch_num_pseudo_regs(struct gdbarch *gdbarch, int num_pseudo_regs)
Definition: gdbarch.c:2067
rl78_prologue
Definition: rl78-tdep.c:231
RL78_BANK3_R3_REGNUM
Definition: rl78-tdep.c:155
rl78_gdbarch_init
static struct gdbarch * rl78_gdbarch_init(struct gdbarch_info info, struct gdbarch_list *arches)
Definition: rl78-tdep.c:1382
RL78_BANK0_R0_REGNUM
Definition: rl78-tdep.c:125
dwarf2_append_unwinders
void dwarf2_append_unwinders(struct gdbarch *gdbarch)
Definition: dwarf2-frame.c:1384
RL78_BANK1_RP3_REGNUM
Definition: rl78-tdep.c:169
rl78_address_to_pointer
static void rl78_address_to_pointer(struct gdbarch *gdbarch, struct type *type, gdb_byte *buf, CORE_ADDR addr)
Definition: rl78-tdep.c:1032
target.h
RL78_RAW_BANK3_R0_REGNUM
Definition: rl78-tdep.c:85
RL78_BANK2_RP3_PTR_REGNUM
Definition: rl78-tdep.c:197
value.h
frame_unwind
Definition: frame-unwind.h:144
RL78_BANK2
Definition: rl78-tdep.c:47
RL78_BANK3_RP1_REGNUM
Definition: rl78-tdep.c:177
set_gdbarch_double_format
void set_gdbarch_double_format(struct gdbarch *gdbarch, const struct floatformat **double_format)
Definition: gdbarch.c:1739
RL78_BANK2_R7_REGNUM
Definition: rl78-tdep.c:150
gdbtypes.h
ULONGEST
unsigned long long ULONGEST
Definition: common-types.h:53
default_frame_unwind_stop_reason
enum unwind_stop_reason default_frame_unwind_stop_reason(struct frame_info *this_frame, void **this_cache)
Definition: frame-unwind.c:184
RL78_BANK3_RP2_PTR_REGNUM
Definition: rl78-tdep.c:201
register_size
int register_size(struct gdbarch *gdbarch, int regnum)
Definition: regcache.c:164
regcache
Definition: regcache.h:232
RL78_D_REGNUM
Definition: rl78-tdep.c:116
gdbarch_info
Definition: gdbarch.h:1626
set_gdbarch_long_double_bit
void set_gdbarch_long_double_bit(struct gdbarch *gdbarch, int long_double_bit)
Definition: gdbarch.c:1756
value_type
struct type * value_type(const struct value *value)
Definition: value.c:1095
set_gdbarch_long_bit
void set_gdbarch_long_bit(struct gdbarch *gdbarch, int long_bit)
Definition: gdbarch.c:1606
RL78_BANK2_R3_REGNUM
Definition: rl78-tdep.c:146
set_gdbarch_return_value
void set_gdbarch_return_value(struct gdbarch *gdbarch, gdbarch_return_value_ftype return_value)
Definition: gdbarch.c:2738
RL78_NUMBANKS
Definition: rl78-tdep.c:49
RL78_RAW_BANK0_R5_REGNUM
Definition: rl78-tdep.c:63
set_gdbarch_long_double_format
void set_gdbarch_long_double_format(struct gdbarch *gdbarch, const struct floatformat **long_double_format)
Definition: gdbarch.c:1772
RL78_NUM_PSEUDO_REGS
Definition: rl78-tdep.c:205
RL78_BANK2_RP1_PTR_REGNUM
Definition: rl78-tdep.c:195
RL78_X_REGNUM
Definition: rl78-tdep.c:111
save_reggroup
struct reggroup *const save_reggroup
Definition: reggroups.c:319
TYPE_LENGTH
#define TYPE_LENGTH(thistype)
Definition: gdbtypes.h:1235
set_gdbarch_ptr_bit
void set_gdbarch_ptr_bit(struct gdbarch *gdbarch, int ptr_bit)
Definition: gdbarch.c:1841
RL78_RAW_BANK1_R1_REGNUM
Definition: rl78-tdep.c:68
RL78_RAW_BANK3_R3_REGNUM
Definition: rl78-tdep.c:88
regcache_raw_read_unsigned
enum register_status regcache_raw_read_unsigned(struct regcache *regcache, int regnum, ULONGEST *val)
Definition: regcache.c:612
set_gdbarch_push_dummy_call
void set_gdbarch_push_dummy_call(struct gdbarch *gdbarch, gdbarch_push_dummy_call_ftype push_dummy_call)
Definition: gdbarch.c:2381
RL78_BANK2_R2_REGNUM
Definition: rl78-tdep.c:145
RL78_L_REGNUM
Definition: rl78-tdep.c:117
rl78_psw_type
static struct type * rl78_psw_type(struct gdbarch *gdbarch)
Definition: rl78-tdep.c:267
RL78_NUM_REGS
Definition: rl78-tdep.c:105
RL78_B_REGNUM
Definition: rl78-tdep.c:114
set_gdbarch_sw_breakpoint_from_kind
void set_gdbarch_sw_breakpoint_from_kind(struct gdbarch *gdbarch, gdbarch_sw_breakpoint_from_kind_ftype sw_breakpoint_from_kind)
Definition: gdbarch.c:2888
RL78_RAW_BANK2_R4_REGNUM
Definition: rl78-tdep.c:80
register_gdbarch_init
void register_gdbarch_init(enum bfd_architecture bfd_architecture, gdbarch_init_ftype *init)
Definition: gdbarch.c:5299
RL78_BANK1_R0_REGNUM
Definition: rl78-tdep.c:134
write_memory
void write_memory(CORE_ADDR memaddr, const bfd_byte *myaddr, ssize_t len)
Definition: corefile.c:394
set_gdbarch_skip_prologue
void set_gdbarch_skip_prologue(struct gdbarch *gdbarch, gdbarch_skip_prologue_ftype skip_prologue)
Definition: gdbarch.c:2772
TYPE_CODE_METHOD
Definition: gdbtypes.h:141
RL78_RAW_BANK2_R5_REGNUM
Definition: rl78-tdep.c:81
RL78_BANK0_R2_REGNUM
Definition: rl78-tdep.c:127
RETURN_VALUE_REGISTER_CONVENTION
Definition: defs.h:251
RL78_SP_ADDR
#define RL78_SP_ADDR
Definition: rl78-tdep.c:208
rl78_register_name
static const char * rl78_register_name(struct gdbarch *gdbarch, int regnr)
Definition: rl78-tdep.c:317
RL78_BANK2_RP1_REGNUM
Definition: rl78-tdep.c:172
RL78_REGS_PER_BANK
Definition: rl78-tdep.c:50
set_gdbarch_pc_regnum
void set_gdbarch_pc_regnum(struct gdbarch *gdbarch, int pc_regnum)
Definition: gdbarch.c:2173
RL78_BANK2_R6_REGNUM
Definition: rl78-tdep.c:149
RL78_RAW_BANK3_R1_REGNUM
Definition: rl78-tdep.c:86
RL78_RAW_BANK2_R1_REGNUM
Definition: rl78-tdep.c:77
gdbarch_tdep::rl78_code_pointer
struct type * rl78_code_pointer
Definition: rl78-tdep.c:217
RL78_RAW_BANK0_R2_REGNUM
Definition: rl78-tdep.c:60
RL78_BANK1
Definition: rl78-tdep.c:46
set_gdbarch_register_name
void set_gdbarch_register_name(struct gdbarch *gdbarch, gdbarch_register_name_ftype register_name)
Definition: gdbarch.c:2292
get_frame_func
CORE_ADDR get_frame_func(struct frame_info *this_frame)
Definition: frame.c:1001
RL78_BANK0_RP1_REGNUM
Definition: rl78-tdep.c:162
pv_register
pv_t pv_register(int reg, CORE_ADDR k)
Definition: prologue-value.c:49
size
size_t size
Definition: go32-nat.c:242
rl78_frame_base
static CORE_ADDR rl78_frame_base(struct frame_info *this_frame, void **this_prologue_cache)
Definition: rl78-tdep.c:1129
gdbarch_alloc
struct gdbarch * gdbarch_alloc(const struct gdbarch_info *info, struct gdbarch_tdep *tdep)
Definition: gdbarch.c:361
RL78_BC_REGNUM
Definition: rl78-tdep.c:121
set_gdbarch_inner_than
void set_gdbarch_inner_than(struct gdbarch *gdbarch, gdbarch_inner_than_ftype inner_than)
Definition: gdbarch.c:2837
rl78_prologue::frame_size
int frame_size
Definition: rl78-tdep.c:242
frame_id
Definition: frame.h:111
RL78_BANK1_R2_REGNUM
Definition: rl78-tdep.c:136
RL78_E_REGNUM
Definition: rl78-tdep.c:115
RL78_RAW_BANK3_R2_REGNUM
Definition: rl78-tdep.c:87
RL78_BANK1_R5_REGNUM
Definition: rl78-tdep.c:139
gdbarch_tdep::elf_flags
int elf_flags
Definition: m68hc11-tdep.c:142
rl78_skip_prologue
static CORE_ADDR rl78_skip_prologue(struct gdbarch *gdbarch, CORE_ADDR pc)
Definition: rl78-tdep.c:1064
store_unsigned_integer
static void store_unsigned_integer(gdb_byte *addr, int len, enum bfd_endian byte_order, ULONGEST val)
Definition: defs.h:604
regcache_raw_write
void regcache_raw_write(struct regcache *regcache, int regnum, const gdb_byte *buf)
Definition: regcache.c:831
RL78_BANK3_RP3_REGNUM
Definition: rl78-tdep.c:179
set_gdbarch_vbit_in_delta
void set_gdbarch_vbit_in_delta(struct gdbarch *gdbarch, int vbit_in_delta)
Definition: gdbarch.c:3874
gdbarch_list
Definition: gdbarch.h:1620