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linux-crisv32-low.c
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1 /* GNU/Linux/CRIS specific low level interface, for the remote server for GDB.
2 Copyright (C) 1995-2018 Free Software Foundation, Inc.
3
4 This file is part of GDB.
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program. If not, see <http://www.gnu.org/licenses/>. */
18
19 #include "server.h"
20 #include "linux-low.h"
21 #include "nat/gdb_ptrace.h"
22
23 /* Defined in auto-generated file reg-crisv32.c. */
24 void init_registers_crisv32 (void);
25 extern const struct target_desc *tdesc_crisv32;
26
27 /* CRISv32 */
28 #define cris_num_regs 49
29
30 #ifndef PTRACE_GET_THREAD_AREA
31 #define PTRACE_GET_THREAD_AREA 25
32 #endif
33
34 /* Note: Ignoring USP (having the stack pointer in two locations causes trouble
35 without any significant gain). */
36
37 /* Locations need to match <include/asm/arch/ptrace.h>. */
38 static int cris_regmap[] = {
39 1*4, 2*4, 3*4, 4*4,
40 5*4, 6*4, 7*4, 8*4,
41 9*4, 10*4, 11*4, 12*4,
42 13*4, 14*4, 24*4, 15*4,
43
44 -1, -1, -1, 16*4,
45 -1, 22*4, 23*4, 17*4,
46 -1, -1, 21*4, 20*4,
47 -1, 19*4, -1, 18*4,
48
49 25*4,
50
51 26*4, -1, -1, 29*4,
52 30*4, 31*4, 32*4, 33*4,
53 34*4, 35*4, 36*4, 37*4,
54 38*4, 39*4, 40*4, -1
55
56 };
57
58 static const unsigned short cris_breakpoint = 0xe938;
59 #define cris_breakpoint_len 2
60
61 /* Implementation of linux_target_ops method "sw_breakpoint_from_kind". */
62
63 static const gdb_byte *
64 cris_sw_breakpoint_from_kind (int kind, int *size)
65 {
66 *size = cris_breakpoint_len;
67 return (const gdb_byte *) &cris_breakpoint;
68 }
69
70 static int
71 cris_breakpoint_at (CORE_ADDR where)
72 {
73 unsigned short insn;
74
75 (*the_target->read_memory) (where, (unsigned char *) &insn,
76 cris_breakpoint_len);
77 if (insn == cris_breakpoint)
78 return 1;
79
80 /* If necessary, recognize more trap instructions here. GDB only uses the
81 one. */
82 return 0;
83 }
84
85 static void
86 cris_write_data_breakpoint (struct regcache *regcache,
87 int bp, unsigned long start, unsigned long end)
88 {
89 switch (bp)
90 {
91 case 0:
92 supply_register_by_name (regcache, "s3", &start);
93 supply_register_by_name (regcache, "s4", &end);
94 break;
95 case 1:
96 supply_register_by_name (regcache, "s5", &start);
97 supply_register_by_name (regcache, "s6", &end);
98 break;
99 case 2:
100 supply_register_by_name (regcache, "s7", &start);
101 supply_register_by_name (regcache, "s8", &end);
102 break;
103 case 3:
104 supply_register_by_name (regcache, "s9", &start);
105 supply_register_by_name (regcache, "s10", &end);
106 break;
107 case 4:
108 supply_register_by_name (regcache, "s11", &start);
109 supply_register_by_name (regcache, "s12", &end);
110 break;
111 case 5:
112 supply_register_by_name (regcache, "s13", &start);
113 supply_register_by_name (regcache, "s14", &end);
114 break;
115 }
116 }
117
118 static int
119 cris_supports_z_point_type (char z_type)
120 {
121 switch (z_type)
122 {
123 case Z_PACKET_WRITE_WP:
124 case Z_PACKET_READ_WP:
125 case Z_PACKET_ACCESS_WP:
126 return 1;
127 default:
128 return 0;
129 }
130 }
131
132 static int
133 cris_insert_point (enum raw_bkpt_type type, CORE_ADDR addr,
134 int len, struct raw_breakpoint *bp)
135 {
136 int bp;
137 unsigned long bp_ctrl;
138 unsigned long start, end;
139 unsigned long ccs;
140 struct regcache *regcache;
141
142 regcache = get_thread_regcache (current_thread, 1);
143
144 /* Read watchpoints are set as access watchpoints, because of GDB's
145 inability to deal with pure read watchpoints. */
146 if (type == raw_bkpt_type_read_wp)
147 type = raw_bkpt_type_access_wp;
148
149 /* Get the configuration register. */
150 collect_register_by_name (regcache, "s0", &bp_ctrl);
151
152 /* The watchpoint allocation scheme is the simplest possible.
153 For example, if a region is watched for read and
154 a write watch is requested, a new watchpoint will
155 be used. Also, if a watch for a region that is already
156 covered by one or more existing watchpoints, a new
157 watchpoint will be used. */
158
159 /* First, find a free data watchpoint. */
160 for (bp = 0; bp < 6; bp++)
161 {
162 /* Each data watchpoint's control registers occupy 2 bits
163 (hence the 3), starting at bit 2 for D0 (hence the 2)
164 with 4 bits between for each watchpoint (yes, the 4). */
165 if (!(bp_ctrl & (0x3 << (2 + (bp * 4)))))
166 break;
167 }
168
169 if (bp > 5)
170 {
171 /* We're out of watchpoints. */
172 return -1;
173 }
174
175 /* Configure the control register first. */
176 if (type == raw_bkpt_type_read_wp || type == raw_bkpt_type_access_wp)
177 {
178 /* Trigger on read. */
179 bp_ctrl |= (1 << (2 + bp * 4));
180 }
181 if (type == raw_bkpt_type_write_wp || type == raw_bkpt_type_access_wp)
182 {
183 /* Trigger on write. */
184 bp_ctrl |= (2 << (2 + bp * 4));
185 }
186
187 /* Setup the configuration register. */
188 supply_register_by_name (regcache, "s0", &bp_ctrl);
189
190 /* Setup the range. */
191 start = addr;
192 end = addr + len - 1;
193
194 /* Configure the watchpoint register. */
195 cris_write_data_breakpoint (regcache, bp, start, end);
196
197 collect_register_by_name (regcache, "ccs", &ccs);
198 /* Set the S1 flag to enable watchpoints. */
199 ccs |= (1 << 19);
200 supply_register_by_name (regcache, "ccs", &ccs);
201
202 return 0;
203 }
204
205 static int
206 cris_remove_point (enum raw_bkpt_type type, CORE_ADDR addr, int len,
207 struct raw_breakpoint *bp)
208 {
209 int bp;
210 unsigned long bp_ctrl;
211 unsigned long start, end;
212 struct regcache *regcache;
213 unsigned long bp_d_regs[12];
214
215 regcache = get_thread_regcache (current_thread, 1);
216
217 /* Read watchpoints are set as access watchpoints, because of GDB's
218 inability to deal with pure read watchpoints. */
219 if (type == raw_bkpt_type_read_wp)
220 type = raw_bkpt_type_access_wp;
221
222 /* Get the configuration register. */
223 collect_register_by_name (regcache, "s0", &bp_ctrl);
224
225 /* Try to find a watchpoint that is configured for the
226 specified range, then check that read/write also matches. */
227
228 /* Ugly pointer arithmetic, since I cannot rely on a
229 single switch (addr) as there may be several watchpoints with
230 the same start address for example. */
231
232 /* Get all range registers to simplify search. */
233 collect_register_by_name (regcache, "s3", &bp_d_regs[0]);
234 collect_register_by_name (regcache, "s4", &bp_d_regs[1]);
235 collect_register_by_name (regcache, "s5", &bp_d_regs[2]);
236 collect_register_by_name (regcache, "s6", &bp_d_regs[3]);
237 collect_register_by_name (regcache, "s7", &bp_d_regs[4]);
238 collect_register_by_name (regcache, "s8", &bp_d_regs[5]);
239 collect_register_by_name (regcache, "s9", &bp_d_regs[6]);
240 collect_register_by_name (regcache, "s10", &bp_d_regs[7]);
241 collect_register_by_name (regcache, "s11", &bp_d_regs[8]);
242 collect_register_by_name (regcache, "s12", &bp_d_regs[9]);
243 collect_register_by_name (regcache, "s13", &bp_d_regs[10]);
244 collect_register_by_name (regcache, "s14", &bp_d_regs[11]);
245
246 for (bp = 0; bp < 6; bp++)
247 {
248 if (bp_d_regs[bp * 2] == addr
249 && bp_d_regs[bp * 2 + 1] == (addr + len - 1)) {
250 /* Matching range. */
251 int bitpos = 2 + bp * 4;
252 int rw_bits;
253
254 /* Read/write bits for this BP. */
255 rw_bits = (bp_ctrl & (0x3 << bitpos)) >> bitpos;
256
257 if ((type == raw_bkpt_type_read_wp && rw_bits == 0x1)
258 || (type == raw_bkpt_type_write_wp && rw_bits == 0x2)
259 || (type == raw_bkpt_type_access_wp && rw_bits == 0x3))
260 {
261 /* Read/write matched. */
262 break;
263 }
264 }
265 }
266
267 if (bp > 5)
268 {
269 /* No watchpoint matched. */
270 return -1;
271 }
272
273 /* Found a matching watchpoint. Now, deconfigure it by
274 both disabling read/write in bp_ctrl and zeroing its
275 start/end addresses. */
276 bp_ctrl &= ~(3 << (2 + (bp * 4)));
277 /* Setup the configuration register. */
278 supply_register_by_name (regcache, "s0", &bp_ctrl);
279
280 start = end = 0;
281 /* Configure the watchpoint register. */
282 cris_write_data_breakpoint (regcache, bp, start, end);
283
284 /* Note that we don't clear the S1 flag here. It's done when continuing. */
285 return 0;
286 }
287
288 static int
289 cris_stopped_by_watchpoint (void)
290 {
291 unsigned long exs;
292 struct regcache *regcache = get_thread_regcache (current_thread, 1);
293
294 collect_register_by_name (regcache, "exs", &exs);
295
296 return (((exs & 0xff00) >> 8) == 0xc);
297 }
298
299 static CORE_ADDR
300 cris_stopped_data_address (void)
301 {
302 unsigned long eda;
303 struct regcache *regcache = get_thread_regcache (current_thread, 1);
304
305 collect_register_by_name (regcache, "eda", &eda);
306
307 /* FIXME: Possibly adjust to match watched range. */
308 return eda;
309 }
310
311 ps_err_e
312 ps_get_thread_area (struct ps_prochandle *ph,
313 lwpid_t lwpid, int idx, void **base)
314 {
315 if (ptrace (PTRACE_GET_THREAD_AREA, lwpid, NULL, base) != 0)
316 return PS_ERR;
317
318 /* IDX is the bias from the thread pointer to the beginning of the
319 thread descriptor. It has to be subtracted due to implementation
320 quirks in libthread_db. */
321 *base = (void *) ((char *) *base - idx);
322 return PS_OK;
323 }
324
325 static void
326 cris_fill_gregset (struct regcache *regcache, void *buf)
327 {
328 int i;
329
330 for (i = 0; i < cris_num_regs; i++)
331 {
332 if (cris_regmap[i] != -1)
333 collect_register (regcache, i, ((char *) buf) + cris_regmap[i]);
334 }
335 }
336
337 static void
338 cris_store_gregset (struct regcache *regcache, const void *buf)
339 {
340 int i;
341
342 for (i = 0; i < cris_num_regs; i++)
343 {
344 if (cris_regmap[i] != -1)
345 supply_register (regcache, i, ((char *) buf) + cris_regmap[i]);
346 }
347 }
348
349 static void
350 cris_arch_setup (void)
351 {
352 current_process ()->tdesc = tdesc_crisv32;
353 }
354
355 /* Support for hardware single step. */
356
357 static int
358 cris_supports_hardware_single_step (void)
359 {
360 return 1;
361 }
362
363 static struct regset_info cris_regsets[] = {
364 { PTRACE_GETREGS, PTRACE_SETREGS, 0, cris_num_regs * 4,
365 GENERAL_REGS, cris_fill_gregset, cris_store_gregset },
366 NULL_REGSET
367 };
368
369
370 static struct regsets_info cris_regsets_info =
371 {
372 cris_regsets, /* regsets */
373 0, /* num_regsets */
374 NULL, /* disabled_regsets */
375 };
376
377 static struct usrregs_info cris_usrregs_info =
378 {
379 cris_num_regs,
380 cris_regmap,
381 };
382
383 static struct regs_info regs_info =
384 {
385 NULL, /* regset_bitmap */
386 &cris_usrregs_info,
387 &cris_regsets_info
388 };
389
390 static const struct regs_info *
391 cris_regs_info (void)
392 {
393 return &regs_info;
394 }
395
396 struct linux_target_ops the_low_target = {
397 cris_arch_setup,
398 cris_regs_info,
399 NULL,
400 NULL,
401 NULL, /* fetch_register */
402 linux_get_pc_32bit,
403 linux_set_pc_32bit,
404 NULL, /* breakpoint_kind_from_pc */
405 cris_sw_breakpoint_from_kind,
406 NULL, /* get_next_pcs */
407 0,
408 cris_breakpoint_at,
409 cris_supports_z_point_type,
410 cris_insert_point,
411 cris_remove_point,
412 cris_stopped_by_watchpoint,
413 cris_stopped_data_address,
414 NULL, /* collect_ptrace_register */
415 NULL, /* supply_ptrace_register */
416 NULL, /* siginfo_fixup */
417 NULL, /* new_process */
418 NULL, /* delete_process */
419 NULL, /* new_thread */
420 NULL, /* delete_thread */
421 NULL, /* new_fork */
422 NULL, /* prepare_to_resume */
423 NULL, /* process_qsupported */
424 NULL, /* supports_tracepoints */
425 NULL, /* get_thread_area */
426 NULL, /* install_fast_tracepoint_jump_pad */
427 NULL, /* emit_ops */
428 NULL, /* get_min_fast_tracepoint_insn_len */
429 NULL, /* supports_range_stepping */
430 NULL, /* breakpoint_kind_from_current_state */
431 cris_supports_hardware_single_step,
432 };
433
434 void
435 initialize_low_arch (void)
436 {
437 init_registers_crisv32 ();
438
439 initialize_regsets_info (&cris_regsets_info);
440 }
lwpid_t
unsigned int lwpid_t
Definition: gdb_proc_service.h:63
current_thread
struct thread_info * current_thread
Definition: inferiors.c:28
ps_get_thread_area
ps_err_e ps_get_thread_area(struct ps_prochandle *ph, lwpid_t lwpid, int idx, void **base)
Definition: linux-crisv32-low.c:312
collect_register
void collect_register(struct regcache *regcache, int n, void *buf)
Definition: regcache.c:402
cris_supports_hardware_single_step
static int cris_supports_hardware_single_step(void)
Definition: linux-crisv32-low.c:358
CORE_ADDR
bfd_vma CORE_ADDR
Definition: common-types.h:41
supply_register_by_name
void supply_register_by_name(struct regcache *regcache, const char *name, const void *buf)
Definition: regcache.c:393
tdesc_crisv32
const struct target_desc * tdesc_crisv32
cris_insert_point
static int cris_insert_point(enum raw_bkpt_type type, CORE_ADDR addr, int len, struct raw_breakpoint *bp)
Definition: linux-crisv32-low.c:133
ps_prochandle
Definition: gdb_proc_service.h:150
ps_err_e
ps_err_e
Definition: gdb_proc_service.h:51
linux_target_ops
Definition: linux-low.h:128
the_target
struct target_ops * the_target
Definition: target.c:24
cris_write_data_breakpoint
static void cris_write_data_breakpoint(struct regcache *regcache, int bp, unsigned long start, unsigned long end)
Definition: linux-crisv32-low.c:86
process_info::tdesc
const struct target_desc * tdesc
Definition: inferiors.h:67
regcache
Definition: regcache.h:31
ptrace
PTRACE_TYPE_RET ptrace()
raw_bkpt_type_read_wp
Definition: mem-break.h:53
cris_fill_gregset
static void cris_fill_gregset(struct regcache *regcache, void *buf)
Definition: linux-crisv32-low.c:326
cris_stopped_data_address
static CORE_ADDR cris_stopped_data_address(void)
Definition: linux-crisv32-low.c:300
cris_regs_info
static const struct regs_info * cris_regs_info(void)
Definition: linux-crisv32-low.c:391
raw_breakpoint
Definition: mem-break.c:85
linux_get_pc_32bit
CORE_ADDR linux_get_pc_32bit(struct regcache *regcache)
Definition: linux-low.c:7411
raw_bkpt_type_access_wp
Definition: mem-break.h:56
linux-low.h
collect_register_by_name
void collect_register_by_name(struct regcache *regcache, const char *name, void *buf)
Definition: regcache.c:441
raw_bkpt_type
raw_bkpt_type
Definition: mem-break.h:41
Z_PACKET_READ_WP
#define Z_PACKET_READ_WP
Definition: mem-break.h:36
cris_sw_breakpoint_from_kind
static const gdb_byte * cris_sw_breakpoint_from_kind(int kind, int *size)
Definition: linux-crisv32-low.c:64
cris_regsets_info
static struct regsets_info cris_regsets_info
Definition: linux-crisv32-low.c:370
regs_info
Definition: linux-low.h:94
cris_remove_point
static int cris_remove_point(enum raw_bkpt_type type, CORE_ADDR addr, int len, struct raw_breakpoint *bp)
Definition: linux-crisv32-low.c:206
PTRACE_GET_THREAD_AREA
#define PTRACE_GET_THREAD_AREA
Definition: linux-crisv32-low.c:31
raw_bkpt_type_write_wp
Definition: mem-break.h:50
server.h
cris_num_regs
#define cris_num_regs
Definition: linux-crisv32-low.c:28
the_low_target
struct linux_target_ops the_low_target
Definition: linux-crisv32-low.c:396
current_process
struct process_info * current_process(void)
Definition: inferiors.c:210
cris_arch_setup
static void cris_arch_setup(void)
Definition: linux-crisv32-low.c:350
usrregs_info
Definition: linux-low.h:83
cris_breakpoint
static const unsigned short cris_breakpoint
Definition: linux-crisv32-low.c:58
PS_ERR
Definition: gdb_proc_service.h:54
regs_info
static struct regs_info regs_info
Definition: linux-crisv32-low.c:383
linux_set_pc_32bit
void linux_set_pc_32bit(struct regcache *regcache, CORE_ADDR pc)
Definition: linux-low.c:7400
cris_regmap
static int cris_regmap[]
Definition: linux-crisv32-low.c:38
initialize_low_arch
void initialize_low_arch(void)
Definition: linux-crisv32-low.c:435
x3
static const struct aarch64_register x3
Definition: linux-aarch64-low.c:618
cris_breakpoint_len
#define cris_breakpoint_len
Definition: linux-crisv32-low.c:59
gdb_byte
bfd_byte gdb_byte
Definition: common-types.h:38
cris_store_gregset
static void cris_store_gregset(struct regcache *regcache, const void *buf)
Definition: linux-crisv32-low.c:338
init_registers_crisv32
void init_registers_crisv32(void)
cris_regsets
static struct regset_info cris_regsets[]
Definition: linux-crisv32-low.c:363
target_desc
Definition: tdesc.h:33
cris_usrregs_info
static struct usrregs_info cris_usrregs_info
Definition: linux-crisv32-low.c:377
cris_breakpoint_at
static int cris_breakpoint_at(CORE_ADDR where)
Definition: linux-crisv32-low.c:71
target_ops::read_memory
int(* read_memory)(CORE_ADDR memaddr, unsigned char *myaddr, int len)
Definition: target.h:166
get_thread_regcache
struct regcache * get_thread_regcache(struct thread_info *thread, int fetch)
Definition: regcache.c:27
Z_PACKET_ACCESS_WP
#define Z_PACKET_ACCESS_WP
Definition: mem-break.h:37
cris_stopped_by_watchpoint
static int cris_stopped_by_watchpoint(void)
Definition: linux-crisv32-low.c:289
x1
static const struct aarch64_register x1
Definition: linux-aarch64-low.c:616
PS_OK
Definition: gdb_proc_service.h:53
gdb_ptrace.h
cris_supports_z_point_type
static int cris_supports_z_point_type(char z_type)
Definition: linux-crisv32-low.c:119
supply_register
void supply_register(struct regcache *regcache, int n, const void *buf)
Definition: regcache.c:318
Z_PACKET_WRITE_WP
#define Z_PACKET_WRITE_WP
Definition: mem-break.h:35